xref: /rk3399_rockchip-uboot/include/drm_modes.h (revision b27ae02dfdf0e26d23901e9b898629d6ec470a60)
1 /*
2  * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _DRM_MODES_H
8 #define _DRM_MODES_H
9 
10 #define DRM_DISPLAY_INFO_LEN	32
11 #define DRM_CONNECTOR_NAME_LEN	32
12 #define DRM_DISPLAY_MODE_LEN	32
13 #define DRM_PROP_NAME_LEN	32
14 
15 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
16 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
17 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
18 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
19 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
20 #define DRM_MODE_TYPE_USERDEF	(1<<5)
21 #define DRM_MODE_TYPE_DRIVER	(1<<6)
22 
23 /* Video mode flags */
24 /* bit compatible with the xorg definitions. */
25 #define DRM_MODE_FLAG_PHSYNC			(1 << 0)
26 #define DRM_MODE_FLAG_NHSYNC			(1 << 1)
27 #define DRM_MODE_FLAG_PVSYNC			(1 << 2)
28 #define DRM_MODE_FLAG_NVSYNC			(1 << 3)
29 #define DRM_MODE_FLAG_INTERLACE			(1 << 4)
30 #define DRM_MODE_FLAG_DBLSCAN			(1 << 5)
31 #define DRM_MODE_FLAG_CSYNC			(1 << 6)
32 #define DRM_MODE_FLAG_PCSYNC			(1 << 7)
33 #define DRM_MODE_FLAG_NCSYNC			(1 << 8)
34 #define DRM_MODE_FLAG_HSKEW			(1 << 9) /* hskew provided */
35 #define DRM_MODE_FLAG_BCAST			(1 << 10)
36 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
37 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
38 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
39 #define DRM_MODE_FLAG_PPIXDATA			BIT(31)
40 
41 /* Panel Mirror control */
42 #define DRM_MODE_FLAG_XMIRROR			(1<<28)
43 #define DRM_MODE_FLAG_YMIRROR			(1<<29)
44 #define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
45 
46 /* Picture aspect ratio options */
47 #define DRM_MODE_PICTURE_ASPECT_NONE		0
48 #define DRM_MODE_PICTURE_ASPECT_4_3		1
49 #define DRM_MODE_PICTURE_ASPECT_16_9		2
50 #define DRM_MODE_PICTURE_ASPECT_64_27		3
51 #define DRM_MODE_PICTURE_ASPECT_256_135		4
52 
53 /* Aspect ratio flag bitmask (4 bits 22:19) */
54 #define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F << 19)
55 #define  DRM_MODE_FLAG_PIC_AR_NONE \
56 			(DRM_MODE_PICTURE_ASPECT_NONE << 19)
57 #define  DRM_MODE_FLAG_PIC_AR_4_3 \
58 			(DRM_MODE_PICTURE_ASPECT_4_3 << 19)
59 #define  DRM_MODE_FLAG_PIC_AR_16_9 \
60 			(DRM_MODE_PICTURE_ASPECT_16_9 << 19)
61 #define  DRM_MODE_FLAG_PIC_AR_64_27 \
62 			(DRM_MODE_PICTURE_ASPECT_64_27 << 19)
63 #define  DRM_MODE_FLAG_PIC_AR_256_135 \
64 			(DRM_MODE_PICTURE_ASPECT_256_135 << 19)
65 
66 #define DRM_MODE_CONNECTOR_Unknown	0
67 #define DRM_MODE_CONNECTOR_VGA		1
68 #define DRM_MODE_CONNECTOR_DVII		2
69 #define DRM_MODE_CONNECTOR_DVID		3
70 #define DRM_MODE_CONNECTOR_DVIA		4
71 #define DRM_MODE_CONNECTOR_Composite	5
72 #define DRM_MODE_CONNECTOR_SVIDEO	6
73 #define DRM_MODE_CONNECTOR_LVDS		7
74 #define DRM_MODE_CONNECTOR_Component	8
75 #define DRM_MODE_CONNECTOR_9PinDIN	9
76 #define DRM_MODE_CONNECTOR_DisplayPort	10
77 #define DRM_MODE_CONNECTOR_HDMIA	11
78 #define DRM_MODE_CONNECTOR_HDMIB	12
79 #define DRM_MODE_CONNECTOR_TV		13
80 #define DRM_MODE_CONNECTOR_eDP		14
81 #define DRM_MODE_CONNECTOR_VIRTUAL      15
82 #define DRM_MODE_CONNECTOR_DSI		16
83 
84 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
85 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
86 #define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
87 #define DRM_EDID_PT_STEREO         (1 << 5)
88 #define DRM_EDID_PT_INTERLACED     (1 << 7)
89 
90 /* see also http://vektor.theorem.ca/graphics/ycbcr/ */
91 enum v4l2_colorspace {
92 	/*
93 	 * Default colorspace, i.e. let the driver figure it out.
94 	 * Can only be used with video capture.
95 	 */
96 	V4L2_COLORSPACE_DEFAULT       = 0,
97 
98 	/* SMPTE 170M: used for broadcast NTSC/PAL SDTV */
99 	V4L2_COLORSPACE_SMPTE170M     = 1,
100 
101 	/* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
102 	V4L2_COLORSPACE_SMPTE240M     = 2,
103 
104 	/* Rec.709: used for HDTV */
105 	V4L2_COLORSPACE_REC709        = 3,
106 
107 	/*
108 	 * Deprecated, do not use. No driver will ever return this. This was
109 	 * based on a misunderstanding of the bt878 datasheet.
110 	 */
111 	V4L2_COLORSPACE_BT878         = 4,
112 
113 	/*
114 	 * NTSC 1953 colorspace. This only makes sense when dealing with
115 	 * really, really old NTSC recordings. Superseded by SMPTE 170M.
116 	 */
117 	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
118 
119 	/*
120 	 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when
121 	 * dealing with really old PAL/SECAM recordings. Superseded by
122 	 * SMPTE 170M.
123 	 */
124 	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
125 
126 	/*
127 	 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601
128 	 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG.
129 	 */
130 	V4L2_COLORSPACE_JPEG          = 7,
131 
132 	/* For RGB colorspaces such as produces by most webcams. */
133 	V4L2_COLORSPACE_SRGB          = 8,
134 
135 	/* AdobeRGB colorspace */
136 	V4L2_COLORSPACE_ADOBERGB      = 9,
137 
138 	/* BT.2020 colorspace, used for UHDTV. */
139 	V4L2_COLORSPACE_BT2020        = 10,
140 
141 	/* Raw colorspace: for RAW unprocessed images */
142 	V4L2_COLORSPACE_RAW           = 11,
143 
144 	/* DCI-P3 colorspace, used by cinema projectors */
145 	V4L2_COLORSPACE_DCI_P3        = 12,
146 };
147 
148 #define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
149 #define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
150 #define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
151 #define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
152 #define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | \
153 				 CRTC_NO_VSCAN)
154 
155 #define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
156 
157 struct drm_display_mode {
158 	/* Proposed mode values */
159 	int clock;		/* in kHz */
160 	int hdisplay;
161 	int hsync_start;
162 	int hsync_end;
163 	int htotal;
164 	int vdisplay;
165 	int vsync_start;
166 	int vsync_end;
167 	int vtotal;
168 	int vrefresh;
169 	int vscan;
170 	unsigned int flags;
171 	int picture_aspect_ratio;
172 	int hskew;
173 	unsigned int type;
174 	/* Actual mode we give to hw */
175 	int crtc_clock;         /* in KHz */
176 	int crtc_hdisplay;
177 	int crtc_hblank_start;
178 	int crtc_hblank_end;
179 	int crtc_hsync_start;
180 	int crtc_hsync_end;
181 	int crtc_htotal;
182 	int crtc_hskew;
183 	int crtc_vdisplay;
184 	int crtc_vblank_start;
185 	int crtc_vblank_end;
186 	int crtc_vsync_start;
187 	int crtc_vsync_end;
188 	int crtc_vtotal;
189 	bool invalid;
190 };
191 
192 #endif
193