xref: /rk3399_rockchip-uboot/include/drm_modes.h (revision 79feefb1157f4035aaedc183e6039cb3401c756e)
1 /*
2  * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _DRM_MODES_H
8 #define _DRM_MODES_H
9 
10 #define DRM_MODE_TYPE_BUILTIN	BIT(0)
11 #define DRM_MODE_TYPE_CLOCK_C	(BIT(1) | DRM_MODE_TYPE_BUILTIN)
12 #define DRM_MODE_TYPE_CRTC_C	(BIT(2) | DRM_MODE_TYPE_BUILTIN)
13 #define DRM_MODE_TYPE_PREFERRED	BIT(3)
14 #define DRM_MODE_TYPE_DEFAULT	BIT(4)
15 #define DRM_MODE_TYPE_USERDEF	BIT(5)
16 #define DRM_MODE_TYPE_DRIVER	BIT(6)
17 
18 /* Video mode flags */
19 /* bit compatible with the xorg definitions. */
20 #define DRM_MODE_FLAG_PHSYNC			(1 << 0)
21 #define DRM_MODE_FLAG_NHSYNC			(1 << 1)
22 #define DRM_MODE_FLAG_PVSYNC			(1 << 2)
23 #define DRM_MODE_FLAG_NVSYNC			(1 << 3)
24 #define DRM_MODE_FLAG_INTERLACE			(1 << 4)
25 #define DRM_MODE_FLAG_DBLSCAN			(1 << 5)
26 #define DRM_MODE_FLAG_CSYNC			(1 << 6)
27 #define DRM_MODE_FLAG_PCSYNC			(1 << 7)
28 #define DRM_MODE_FLAG_NCSYNC			(1 << 8)
29 #define DRM_MODE_FLAG_HSKEW			(1 << 9) /* hskew provided */
30 #define DRM_MODE_FLAG_BCAST			(1 << 10)
31 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
32 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
33 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
34 
35 #define DRM_MODE_CONNECTOR_Unknown	0
36 #define DRM_MODE_CONNECTOR_VGA		1
37 #define DRM_MODE_CONNECTOR_DVII		2
38 #define DRM_MODE_CONNECTOR_DVID		3
39 #define DRM_MODE_CONNECTOR_DVIA		4
40 #define DRM_MODE_CONNECTOR_Composite	5
41 #define DRM_MODE_CONNECTOR_SVIDEO	6
42 #define DRM_MODE_CONNECTOR_LVDS		7
43 #define DRM_MODE_CONNECTOR_Component	8
44 #define DRM_MODE_CONNECTOR_9PinDIN	9
45 #define DRM_MODE_CONNECTOR_DisplayPort	10
46 #define DRM_MODE_CONNECTOR_HDMIA	11
47 #define DRM_MODE_CONNECTOR_HDMIB	12
48 #define DRM_MODE_CONNECTOR_TV		13
49 #define DRM_MODE_CONNECTOR_eDP		14
50 #define DRM_MODE_CONNECTOR_VIRTUAL      15
51 #define DRM_MODE_CONNECTOR_DSI		16
52 
53 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
54 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
55 #define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
56 #define DRM_EDID_PT_STEREO         (1 << 5)
57 #define DRM_EDID_PT_INTERLACED     (1 << 7)
58 
59 /* see also http://vektor.theorem.ca/graphics/ycbcr/ */
60 enum v4l2_colorspace {
61 	/*
62 	 * Default colorspace, i.e. let the driver figure it out.
63 	 * Can only be used with video capture.
64 	 */
65 	V4L2_COLORSPACE_DEFAULT       = 0,
66 
67 	/* SMPTE 170M: used for broadcast NTSC/PAL SDTV */
68 	V4L2_COLORSPACE_SMPTE170M     = 1,
69 
70 	/* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
71 	V4L2_COLORSPACE_SMPTE240M     = 2,
72 
73 	/* Rec.709: used for HDTV */
74 	V4L2_COLORSPACE_REC709        = 3,
75 
76 	/*
77 	 * Deprecated, do not use. No driver will ever return this. This was
78 	 * based on a misunderstanding of the bt878 datasheet.
79 	 */
80 	V4L2_COLORSPACE_BT878         = 4,
81 
82 	/*
83 	 * NTSC 1953 colorspace. This only makes sense when dealing with
84 	 * really, really old NTSC recordings. Superseded by SMPTE 170M.
85 	 */
86 	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
87 
88 	/*
89 	 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when
90 	 * dealing with really old PAL/SECAM recordings. Superseded by
91 	 * SMPTE 170M.
92 	 */
93 	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
94 
95 	/*
96 	 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601
97 	 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG.
98 	 */
99 	V4L2_COLORSPACE_JPEG          = 7,
100 
101 	/* For RGB colorspaces such as produces by most webcams. */
102 	V4L2_COLORSPACE_SRGB          = 8,
103 
104 	/* AdobeRGB colorspace */
105 	V4L2_COLORSPACE_ADOBERGB      = 9,
106 
107 	/* BT.2020 colorspace, used for UHDTV. */
108 	V4L2_COLORSPACE_BT2020        = 10,
109 
110 	/* Raw colorspace: for RAW unprocessed images */
111 	V4L2_COLORSPACE_RAW           = 11,
112 
113 	/* DCI-P3 colorspace, used by cinema projectors */
114 	V4L2_COLORSPACE_DCI_P3        = 12,
115 };
116 
117 struct drm_display_mode {
118 	/* Proposed mode values */
119 	int clock;		/* in kHz */
120 	int hdisplay;
121 	int hsync_start;
122 	int hsync_end;
123 	int htotal;
124 	int vdisplay;
125 	int vsync_start;
126 	int vsync_end;
127 	int vtotal;
128 	int vrefresh;
129 	int vscan;
130 	unsigned int flags;
131 	int picture_aspect_ratio;
132 };
133 
134 #endif
135