xref: /rk3399_rockchip-uboot/include/drm_modes.h (revision 2602b1ba1429717f5d33bbe0fe45c601c9a6c923)
1 /*
2  * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _DRM_MODES_H
8 #define _DRM_MODES_H
9 
10 #include "fdtdec.h"
11 
12 #define DRM_DISPLAY_INFO_LEN	32
13 #define DRM_CONNECTOR_NAME_LEN	32
14 #define DRM_DISPLAY_MODE_LEN	32
15 #define DRM_PROP_NAME_LEN	32
16 
17 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
18 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
19 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
20 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
21 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
22 #define DRM_MODE_TYPE_USERDEF	(1<<5)
23 #define DRM_MODE_TYPE_DRIVER	(1<<6)
24 
25 /* Video mode flags */
26 /* bit compatible with the xorg definitions. */
27 #define DRM_MODE_FLAG_PHSYNC			(1 << 0)
28 #define DRM_MODE_FLAG_NHSYNC			(1 << 1)
29 #define DRM_MODE_FLAG_PVSYNC			(1 << 2)
30 #define DRM_MODE_FLAG_NVSYNC			(1 << 3)
31 #define DRM_MODE_FLAG_INTERLACE			(1 << 4)
32 #define DRM_MODE_FLAG_DBLSCAN			(1 << 5)
33 #define DRM_MODE_FLAG_CSYNC			(1 << 6)
34 #define DRM_MODE_FLAG_PCSYNC			(1 << 7)
35 #define DRM_MODE_FLAG_NCSYNC			(1 << 8)
36 #define DRM_MODE_FLAG_HSKEW			(1 << 9) /* hskew provided */
37 #define DRM_MODE_FLAG_BCAST			(1 << 10)
38 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
39 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
40 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
41 #define DRM_MODE_FLAG_PPIXDATA			BIT(31)
42 /*
43  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
44  * (define not exposed to user space).
45  */
46 #define DRM_MODE_FLAG_3D_MASK			(0x1f << 14)
47 #define  DRM_MODE_FLAG_3D_NONE			(0 << 14)
48 #define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1 << 14)
49 #define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2 << 14)
50 #define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3 << 14)
51 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4 << 14)
52 #define  DRM_MODE_FLAG_3D_L_DEPTH		(5 << 14)
53 #define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6 << 14)
54 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7 << 14)
55 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8 << 14)
56 
57 /* Panel Mirror control */
58 #define DRM_MODE_FLAG_XMIRROR			(1<<28)
59 #define DRM_MODE_FLAG_YMIRROR			(1<<29)
60 #define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
61 
62 /* Picture aspect ratio options */
63 #define DRM_MODE_PICTURE_ASPECT_NONE		0
64 #define DRM_MODE_PICTURE_ASPECT_4_3		1
65 #define DRM_MODE_PICTURE_ASPECT_16_9		2
66 #define DRM_MODE_PICTURE_ASPECT_64_27		3
67 #define DRM_MODE_PICTURE_ASPECT_256_135		4
68 
69 /* Aspect ratio flag bitmask (4 bits 22:19) */
70 #define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F << 19)
71 #define  DRM_MODE_FLAG_PIC_AR_NONE \
72 			(DRM_MODE_PICTURE_ASPECT_NONE << 19)
73 #define  DRM_MODE_FLAG_PIC_AR_4_3 \
74 			(DRM_MODE_PICTURE_ASPECT_4_3 << 19)
75 #define  DRM_MODE_FLAG_PIC_AR_16_9 \
76 			(DRM_MODE_PICTURE_ASPECT_16_9 << 19)
77 #define  DRM_MODE_FLAG_PIC_AR_64_27 \
78 			(DRM_MODE_PICTURE_ASPECT_64_27 << 19)
79 #define  DRM_MODE_FLAG_PIC_AR_256_135 \
80 			(DRM_MODE_PICTURE_ASPECT_256_135 << 19)
81 
82 #define DRM_MODE_CONNECTOR_Unknown	0
83 #define DRM_MODE_CONNECTOR_VGA		1
84 #define DRM_MODE_CONNECTOR_DVII		2
85 #define DRM_MODE_CONNECTOR_DVID		3
86 #define DRM_MODE_CONNECTOR_DVIA		4
87 #define DRM_MODE_CONNECTOR_Composite	5
88 #define DRM_MODE_CONNECTOR_SVIDEO	6
89 #define DRM_MODE_CONNECTOR_LVDS		7
90 #define DRM_MODE_CONNECTOR_Component	8
91 #define DRM_MODE_CONNECTOR_9PinDIN	9
92 #define DRM_MODE_CONNECTOR_DisplayPort	10
93 #define DRM_MODE_CONNECTOR_HDMIA	11
94 #define DRM_MODE_CONNECTOR_HDMIB	12
95 #define DRM_MODE_CONNECTOR_TV		13
96 #define DRM_MODE_CONNECTOR_eDP		14
97 #define DRM_MODE_CONNECTOR_VIRTUAL      15
98 #define DRM_MODE_CONNECTOR_DSI		16
99 #define DRM_MODE_CONNECTOR_DPI		17
100 
101 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
102 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
103 #define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
104 #define DRM_EDID_PT_STEREO         (1 << 5)
105 #define DRM_EDID_PT_INTERLACED     (1 << 7)
106 
107 /* see also http://vektor.theorem.ca/graphics/ycbcr/ */
108 enum v4l2_colorspace {
109 	/*
110 	 * Default colorspace, i.e. let the driver figure it out.
111 	 * Can only be used with video capture.
112 	 */
113 	V4L2_COLORSPACE_DEFAULT       = 0,
114 
115 	/* SMPTE 170M: used for broadcast NTSC/PAL SDTV */
116 	V4L2_COLORSPACE_SMPTE170M     = 1,
117 
118 	/* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
119 	V4L2_COLORSPACE_SMPTE240M     = 2,
120 
121 	/* Rec.709: used for HDTV */
122 	V4L2_COLORSPACE_REC709        = 3,
123 
124 	/*
125 	 * Deprecated, do not use. No driver will ever return this. This was
126 	 * based on a misunderstanding of the bt878 datasheet.
127 	 */
128 	V4L2_COLORSPACE_BT878         = 4,
129 
130 	/*
131 	 * NTSC 1953 colorspace. This only makes sense when dealing with
132 	 * really, really old NTSC recordings. Superseded by SMPTE 170M.
133 	 */
134 	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
135 
136 	/*
137 	 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when
138 	 * dealing with really old PAL/SECAM recordings. Superseded by
139 	 * SMPTE 170M.
140 	 */
141 	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
142 
143 	/*
144 	 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601
145 	 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG.
146 	 */
147 	V4L2_COLORSPACE_JPEG          = 7,
148 
149 	/* For RGB colorspaces such as produces by most webcams. */
150 	V4L2_COLORSPACE_SRGB          = 8,
151 
152 	/* AdobeRGB colorspace */
153 	V4L2_COLORSPACE_ADOBERGB      = 9,
154 
155 	/* BT.2020 colorspace, used for UHDTV. */
156 	V4L2_COLORSPACE_BT2020        = 10,
157 
158 	/* Raw colorspace: for RAW unprocessed images */
159 	V4L2_COLORSPACE_RAW           = 11,
160 
161 	/* DCI-P3 colorspace, used by cinema projectors */
162 	V4L2_COLORSPACE_DCI_P3        = 12,
163 };
164 
165 #define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
166 #define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
167 #define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
168 #define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
169 #define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | \
170 				 CRTC_NO_VSCAN)
171 
172 #define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
173 
174 #define DRM_MODE_MATCH_TIMINGS		(1 << 0)
175 #define DRM_MODE_MATCH_CLOCK		(1 << 1)
176 #define DRM_MODE_MATCH_FLAGS		(1 << 2)
177 #define DRM_MODE_MATCH_3D_FLAGS		(1 << 3)
178 #define DRM_MODE_MATCH_ASPECT_RATIO	(1 << 4)
179 
180 struct drm_display_mode {
181 	/* Proposed mode values */
182 	int clock;		/* in kHz */
183 	int hdisplay;
184 	int hsync_start;
185 	int hsync_end;
186 	int htotal;
187 	int vdisplay;
188 	int vsync_start;
189 	int vsync_end;
190 	int vtotal;
191 	int vrefresh;
192 	int vscan;
193 	unsigned int flags;
194 	int picture_aspect_ratio;
195 	int hskew;
196 	unsigned int type;
197 	/* Actual mode we give to hw */
198 	int crtc_clock;         /* in KHz */
199 	int crtc_hdisplay;
200 	int crtc_hblank_start;
201 	int crtc_hblank_end;
202 	int crtc_hsync_start;
203 	int crtc_hsync_end;
204 	int crtc_htotal;
205 	int crtc_hskew;
206 	int crtc_vdisplay;
207 	int crtc_vblank_start;
208 	int crtc_vblank_end;
209 	int crtc_vsync_start;
210 	int crtc_vsync_end;
211 	int crtc_vtotal;
212 	bool invalid;
213 };
214 
215 /*
216  * Subsystem independent description of a videomode.
217  * Can be generated from struct display_timing.
218  */
219 struct videomode {
220 	unsigned long pixelclock;	/* pixelclock in Hz */
221 
222 	u32 hactive;
223 	u32 hfront_porch;
224 	u32 hback_porch;
225 	u32 hsync_len;
226 
227 	u32 vactive;
228 	u32 vfront_porch;
229 	u32 vback_porch;
230 	u32 vsync_len;
231 
232 	enum display_flags flags; /* display flags */
233 };
234 
235 struct drm_display_mode *drm_mode_create(void);
236 void drm_mode_destroy(struct drm_display_mode *mode);
237 bool drm_mode_match(const struct drm_display_mode *mode1,
238 		    const struct drm_display_mode *mode2,
239 		    unsigned int match_flags);
240 bool drm_mode_equal(const struct drm_display_mode *mode1,
241 		    const struct drm_display_mode *mode2);
242 void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
243 				   struct videomode *vm);
244 
245 #endif
246