xref: /rk3399_rockchip-uboot/include/drm_modes.h (revision 0c7f2afdd1e1c535f8dad1fb2da77397b32e5ef6)
1 /*
2  * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _DRM_MODES_H
8 #define _DRM_MODES_H
9 
10 #define DRM_DISPLAY_INFO_LEN	32
11 #define DRM_CONNECTOR_NAME_LEN	32
12 #define DRM_DISPLAY_MODE_LEN	32
13 #define DRM_PROP_NAME_LEN	32
14 
15 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
16 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
17 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
18 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
19 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
20 #define DRM_MODE_TYPE_USERDEF	(1<<5)
21 #define DRM_MODE_TYPE_DRIVER	(1<<6)
22 
23 /* Video mode flags */
24 /* bit compatible with the xorg definitions. */
25 #define DRM_MODE_FLAG_PHSYNC			(1 << 0)
26 #define DRM_MODE_FLAG_NHSYNC			(1 << 1)
27 #define DRM_MODE_FLAG_PVSYNC			(1 << 2)
28 #define DRM_MODE_FLAG_NVSYNC			(1 << 3)
29 #define DRM_MODE_FLAG_INTERLACE			(1 << 4)
30 #define DRM_MODE_FLAG_DBLSCAN			(1 << 5)
31 #define DRM_MODE_FLAG_CSYNC			(1 << 6)
32 #define DRM_MODE_FLAG_PCSYNC			(1 << 7)
33 #define DRM_MODE_FLAG_NCSYNC			(1 << 8)
34 #define DRM_MODE_FLAG_HSKEW			(1 << 9) /* hskew provided */
35 #define DRM_MODE_FLAG_BCAST			(1 << 10)
36 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
37 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
38 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
39 #define DRM_MODE_FLAG_PPIXDATA			BIT(31)
40 /*
41  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
42  * (define not exposed to user space).
43  */
44 #define DRM_MODE_FLAG_3D_MASK			(0x1f << 14)
45 #define  DRM_MODE_FLAG_3D_NONE			(0 << 14)
46 #define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1 << 14)
47 #define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2 << 14)
48 #define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3 << 14)
49 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4 << 14)
50 #define  DRM_MODE_FLAG_3D_L_DEPTH		(5 << 14)
51 #define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6 << 14)
52 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7 << 14)
53 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8 << 14)
54 
55 /* Panel Mirror control */
56 #define DRM_MODE_FLAG_XMIRROR			(1<<28)
57 #define DRM_MODE_FLAG_YMIRROR			(1<<29)
58 #define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
59 
60 /* Picture aspect ratio options */
61 #define DRM_MODE_PICTURE_ASPECT_NONE		0
62 #define DRM_MODE_PICTURE_ASPECT_4_3		1
63 #define DRM_MODE_PICTURE_ASPECT_16_9		2
64 #define DRM_MODE_PICTURE_ASPECT_64_27		3
65 #define DRM_MODE_PICTURE_ASPECT_256_135		4
66 
67 /* Aspect ratio flag bitmask (4 bits 22:19) */
68 #define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F << 19)
69 #define  DRM_MODE_FLAG_PIC_AR_NONE \
70 			(DRM_MODE_PICTURE_ASPECT_NONE << 19)
71 #define  DRM_MODE_FLAG_PIC_AR_4_3 \
72 			(DRM_MODE_PICTURE_ASPECT_4_3 << 19)
73 #define  DRM_MODE_FLAG_PIC_AR_16_9 \
74 			(DRM_MODE_PICTURE_ASPECT_16_9 << 19)
75 #define  DRM_MODE_FLAG_PIC_AR_64_27 \
76 			(DRM_MODE_PICTURE_ASPECT_64_27 << 19)
77 #define  DRM_MODE_FLAG_PIC_AR_256_135 \
78 			(DRM_MODE_PICTURE_ASPECT_256_135 << 19)
79 
80 #define DRM_MODE_CONNECTOR_Unknown	0
81 #define DRM_MODE_CONNECTOR_VGA		1
82 #define DRM_MODE_CONNECTOR_DVII		2
83 #define DRM_MODE_CONNECTOR_DVID		3
84 #define DRM_MODE_CONNECTOR_DVIA		4
85 #define DRM_MODE_CONNECTOR_Composite	5
86 #define DRM_MODE_CONNECTOR_SVIDEO	6
87 #define DRM_MODE_CONNECTOR_LVDS		7
88 #define DRM_MODE_CONNECTOR_Component	8
89 #define DRM_MODE_CONNECTOR_9PinDIN	9
90 #define DRM_MODE_CONNECTOR_DisplayPort	10
91 #define DRM_MODE_CONNECTOR_HDMIA	11
92 #define DRM_MODE_CONNECTOR_HDMIB	12
93 #define DRM_MODE_CONNECTOR_TV		13
94 #define DRM_MODE_CONNECTOR_eDP		14
95 #define DRM_MODE_CONNECTOR_VIRTUAL      15
96 #define DRM_MODE_CONNECTOR_DSI		16
97 #define DRM_MODE_CONNECTOR_DPI		17
98 
99 #define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
100 #define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
101 #define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
102 #define DRM_EDID_PT_STEREO         (1 << 5)
103 #define DRM_EDID_PT_INTERLACED     (1 << 7)
104 
105 /* see also http://vektor.theorem.ca/graphics/ycbcr/ */
106 enum v4l2_colorspace {
107 	/*
108 	 * Default colorspace, i.e. let the driver figure it out.
109 	 * Can only be used with video capture.
110 	 */
111 	V4L2_COLORSPACE_DEFAULT       = 0,
112 
113 	/* SMPTE 170M: used for broadcast NTSC/PAL SDTV */
114 	V4L2_COLORSPACE_SMPTE170M     = 1,
115 
116 	/* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
117 	V4L2_COLORSPACE_SMPTE240M     = 2,
118 
119 	/* Rec.709: used for HDTV */
120 	V4L2_COLORSPACE_REC709        = 3,
121 
122 	/*
123 	 * Deprecated, do not use. No driver will ever return this. This was
124 	 * based on a misunderstanding of the bt878 datasheet.
125 	 */
126 	V4L2_COLORSPACE_BT878         = 4,
127 
128 	/*
129 	 * NTSC 1953 colorspace. This only makes sense when dealing with
130 	 * really, really old NTSC recordings. Superseded by SMPTE 170M.
131 	 */
132 	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
133 
134 	/*
135 	 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when
136 	 * dealing with really old PAL/SECAM recordings. Superseded by
137 	 * SMPTE 170M.
138 	 */
139 	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
140 
141 	/*
142 	 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601
143 	 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG.
144 	 */
145 	V4L2_COLORSPACE_JPEG          = 7,
146 
147 	/* For RGB colorspaces such as produces by most webcams. */
148 	V4L2_COLORSPACE_SRGB          = 8,
149 
150 	/* AdobeRGB colorspace */
151 	V4L2_COLORSPACE_ADOBERGB      = 9,
152 
153 	/* BT.2020 colorspace, used for UHDTV. */
154 	V4L2_COLORSPACE_BT2020        = 10,
155 
156 	/* Raw colorspace: for RAW unprocessed images */
157 	V4L2_COLORSPACE_RAW           = 11,
158 
159 	/* DCI-P3 colorspace, used by cinema projectors */
160 	V4L2_COLORSPACE_DCI_P3        = 12,
161 };
162 
163 #define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
164 #define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
165 #define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
166 #define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
167 #define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | \
168 				 CRTC_NO_VSCAN)
169 
170 #define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
171 
172 #define DRM_MODE_MATCH_TIMINGS		(1 << 0)
173 #define DRM_MODE_MATCH_CLOCK		(1 << 1)
174 #define DRM_MODE_MATCH_FLAGS		(1 << 2)
175 #define DRM_MODE_MATCH_3D_FLAGS		(1 << 3)
176 #define DRM_MODE_MATCH_ASPECT_RATIO	(1 << 4)
177 
178 struct drm_display_mode {
179 	/* Proposed mode values */
180 	int clock;		/* in kHz */
181 	int hdisplay;
182 	int hsync_start;
183 	int hsync_end;
184 	int htotal;
185 	int vdisplay;
186 	int vsync_start;
187 	int vsync_end;
188 	int vtotal;
189 	int vrefresh;
190 	int vscan;
191 	unsigned int flags;
192 	int picture_aspect_ratio;
193 	int hskew;
194 	unsigned int type;
195 	/* Actual mode we give to hw */
196 	int crtc_clock;         /* in KHz */
197 	int crtc_hdisplay;
198 	int crtc_hblank_start;
199 	int crtc_hblank_end;
200 	int crtc_hsync_start;
201 	int crtc_hsync_end;
202 	int crtc_htotal;
203 	int crtc_hskew;
204 	int crtc_vdisplay;
205 	int crtc_vblank_start;
206 	int crtc_vblank_end;
207 	int crtc_vsync_start;
208 	int crtc_vsync_end;
209 	int crtc_vtotal;
210 	bool invalid;
211 };
212 
213 struct drm_display_mode *drm_mode_create(void);
214 void drm_mode_destroy(struct drm_display_mode *mode);
215 bool drm_mode_match(const struct drm_display_mode *mode1,
216 		    const struct drm_display_mode *mode2,
217 		    unsigned int match_flags);
218 bool drm_mode_equal(const struct drm_display_mode *mode1,
219 		    const struct drm_display_mode *mode2);
220 
221 #endif
222