xref: /rk3399_rockchip-uboot/include/drm/drm_mipi_dsi.h (revision 87e4c6020eff05133e40ab8b7b0e37e6a2be37e4)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * MIPI DSI Bus
4  *
5  * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
6  * Andrzej Hajda <a.hajda@samsung.com>
7  */
8 
9 #ifndef __DRM_MIPI_DSI_H__
10 #define __DRM_MIPI_DSI_H__
11 
12 #include <mipi_display.h>
13 #include <dm/device.h>
14 
15 struct mipi_dsi_host;
16 struct mipi_dsi_device;
17 
18 /* request ACK from peripheral */
19 #define MIPI_DSI_MSG_REQ_ACK	BIT(0)
20 /* use Low Power Mode to transmit message */
21 #define MIPI_DSI_MSG_USE_LPM	BIT(1)
22 
23 /**
24  * struct mipi_dsi_msg - read/write DSI buffer
25  * @channel: virtual channel id
26  * @type: payload data type
27  * @flags: flags controlling this message transmission
28  * @tx_len: length of @tx_buf
29  * @tx_buf: data to be written
30  * @rx_len: length of @rx_buf
31  * @rx_buf: data to be read, or NULL
32  */
33 struct mipi_dsi_msg {
34 	u8 channel;
35 	u8 type;
36 	u16 flags;
37 
38 	size_t tx_len;
39 	const void *tx_buf;
40 
41 	size_t rx_len;
42 	void *rx_buf;
43 };
44 
45 bool mipi_dsi_packet_format_is_short(u8 type);
46 bool mipi_dsi_packet_format_is_long(u8 type);
47 
48 /**
49  * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
50  * @size: size (in bytes) of the packet
51  * @header: the four bytes that make up the header (Data ID, Word Count or
52  *     Packet Data, and ECC)
53  * @payload_length: number of bytes in the payload
54  * @payload: a pointer to a buffer containing the payload, if any
55  */
56 struct mipi_dsi_packet {
57 	size_t size;
58 	u8 header[4];
59 	size_t payload_length;
60 	const u8 *payload;
61 };
62 
63 int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
64 			   const struct mipi_dsi_msg *msg);
65 
66 /**
67  * struct mipi_dsi_host_ops - DSI bus operations
68  * @attach: attach DSI device to DSI host
69  * @detach: detach DSI device from DSI host
70  * @transfer: transmit a DSI packet
71  *
72  * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
73  * structures. This structure contains information about the type of packet
74  * being transmitted as well as the transmit and receive buffers. When an
75  * error is encountered during transmission, this function will return a
76  * negative error code. On success it shall return the number of bytes
77  * transmitted for write packets or the number of bytes received for read
78  * packets.
79  *
80  * Note that typically DSI packet transmission is atomic, so the .transfer()
81  * function will seldomly return anything other than the number of bytes
82  * contained in the transmit buffer on success.
83  */
84 struct mipi_dsi_host_ops {
85 	int (*attach)(struct mipi_dsi_host *host,
86 		      struct mipi_dsi_device *dsi);
87 	int (*detach)(struct mipi_dsi_host *host,
88 		      struct mipi_dsi_device *dsi);
89 	ssize_t (*transfer)(struct mipi_dsi_host *host,
90 			    const struct mipi_dsi_msg *msg);
91 };
92 
93 /**
94  * struct mipi_dsi_host - DSI host device
95  * @dev: driver model device node for this DSI host
96  * @ops: DSI host operations
97  * @list: list management
98  */
99 struct mipi_dsi_host {
100 	struct udevice *dev;
101 	const struct mipi_dsi_host_ops *ops;
102 };
103 
104 /* DSI mode flags */
105 
106 /* video mode */
107 #define MIPI_DSI_MODE_VIDEO		BIT(0)
108 /* video burst mode */
109 #define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
110 /* video pulse mode */
111 #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
112 /* enable auto vertical count mode */
113 #define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
114 /* enable hsync-end packets in vsync-pulse and v-porch area */
115 #define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
116 /* disable hfront-porch area */
117 #define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
118 /* disable hback-porch area */
119 #define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
120 /* disable hsync-active area */
121 #define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
122 /* flush display FIFO on vsync pulse */
123 #define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
124 /* disable EoT packets in HS mode */
125 #define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
126 /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
127 #define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
128 /* transmit data in low power */
129 #define MIPI_DSI_MODE_LPM		BIT(11)
130 
131 enum mipi_dsi_pixel_format {
132 	MIPI_DSI_FMT_RGB888,
133 	MIPI_DSI_FMT_RGB666,
134 	MIPI_DSI_FMT_RGB666_PACKED,
135 	MIPI_DSI_FMT_RGB565,
136 };
137 
138 #define DSI_DEV_NAME_SIZE		20
139 
140 /**
141  * struct mipi_dsi_device - DSI peripheral device
142  * @host: DSI host for this peripheral
143  * @dev: driver model device node for this peripheral
144  * @name: DSI peripheral chip type
145  * @channel: virtual channel assigned to the peripheral
146  * @format: pixel format for video mode
147  * @lanes: number of active data lanes
148  * @mode_flags: DSI operation mode related flags
149  * @hs_rate: maximum lane frequency for high speed mode in hertz, this should
150  * be set to the real limits of the hardware, zero is only accepted for
151  * legacy drivers
152  * @lp_rate: maximum lane frequency for low power mode in hertz, this should
153  * be set to the real limits of the hardware, zero is only accepted for
154  * legacy drivers
155  */
156 struct mipi_dsi_device {
157 	struct mipi_dsi_host *host;
158 	struct udevice *dev;
159 
160 	char name[DSI_DEV_NAME_SIZE];
161 	unsigned int channel;
162 	unsigned int lanes;
163 	enum mipi_dsi_pixel_format format;
164 	unsigned long mode_flags;
165 	unsigned long hs_rate;
166 	unsigned long lp_rate;
167 };
168 
169 /**
170  * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
171  *                                given pixel format defined by the MIPI DSI
172  *                                specification
173  * @fmt: MIPI DSI pixel format
174  *
175  * Returns: The number of bits per pixel of the given pixel format.
176  */
177 static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
178 {
179 	switch (fmt) {
180 	case MIPI_DSI_FMT_RGB888:
181 	case MIPI_DSI_FMT_RGB666:
182 		return 24;
183 
184 	case MIPI_DSI_FMT_RGB666_PACKED:
185 		return 18;
186 
187 	case MIPI_DSI_FMT_RGB565:
188 		return 16;
189 	}
190 
191 	return -EINVAL;
192 }
193 
194 int mipi_dsi_attach(struct mipi_dsi_device *dsi);
195 int mipi_dsi_detach(struct mipi_dsi_device *dsi);
196 int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
197 int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
198 int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
199 					    u16 value);
200 
201 ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
202 			       size_t size);
203 ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
204 			      size_t num_params, void *data, size_t size);
205 
206 /**
207  * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
208  * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
209  *    information only
210  * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
211  *    V-Blanking and H-Blanking information
212  */
213 enum mipi_dsi_dcs_tear_mode {
214 	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
215 	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
216 };
217 
218 #define MIPI_DSI_DCS_POWER_MODE_DISPLAY BIT(2)
219 #define MIPI_DSI_DCS_POWER_MODE_NORMAL  BIT(3)
220 #define MIPI_DSI_DCS_POWER_MODE_SLEEP   BIT(4)
221 #define MIPI_DSI_DCS_POWER_MODE_PARTIAL BIT(5)
222 #define MIPI_DSI_DCS_POWER_MODE_IDLE    BIT(6)
223 
224 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
225 				  const void *data, size_t len);
226 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
227 			   const void *data, size_t len);
228 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
229 			  size_t len);
230 int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
231 int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
232 int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
233 int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
234 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
235 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
236 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
237 int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
238 int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
239 				    u16 end);
240 int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
241 				  u16 end);
242 int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
243 int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
244 			     enum mipi_dsi_dcs_tear_mode mode);
245 int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
246 int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);
247 int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
248 					u16 brightness);
249 int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
250 					u16 *brightness);
251 
252 #endif /* __DRM_MIPI_DSI__ */
253