1*86256b79SMasahiro Yamada /* 2*86256b79SMasahiro Yamada * Copyright (c) 2014 Google, Inc 3*86256b79SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 4*86256b79SMasahiro Yamada */ 5*86256b79SMasahiro Yamada 6*86256b79SMasahiro Yamada #ifndef __serial_pl01x_h 7*86256b79SMasahiro Yamada #define __serial_pl01x_h 8*86256b79SMasahiro Yamada 9*86256b79SMasahiro Yamada enum pl01x_type { 10*86256b79SMasahiro Yamada TYPE_PL010, 11*86256b79SMasahiro Yamada TYPE_PL011, 12*86256b79SMasahiro Yamada }; 13*86256b79SMasahiro Yamada 14*86256b79SMasahiro Yamada /* 15*86256b79SMasahiro Yamada *Information about a serial port 16*86256b79SMasahiro Yamada * 17*86256b79SMasahiro Yamada * @base: Register base address 18*86256b79SMasahiro Yamada * @type: Port type 19*86256b79SMasahiro Yamada * @clock: Input clock rate, used for calculating the baud rate divisor 20*86256b79SMasahiro Yamada */ 21*86256b79SMasahiro Yamada struct pl01x_serial_platdata { 22*86256b79SMasahiro Yamada unsigned long base; 23*86256b79SMasahiro Yamada enum pl01x_type type; 24*86256b79SMasahiro Yamada unsigned int clock; 25*86256b79SMasahiro Yamada }; 26*86256b79SMasahiro Yamada 27*86256b79SMasahiro Yamada #endif 28