1d90a5a30SMasahiro Yamada /* 2d90a5a30SMasahiro Yamada * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3d90a5a30SMasahiro Yamada * 4d90a5a30SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 5d90a5a30SMasahiro Yamada */ 6d90a5a30SMasahiro Yamada 7d90a5a30SMasahiro Yamada #ifndef __PINCTRL_H 8d90a5a30SMasahiro Yamada #define __PINCTRL_H 9d90a5a30SMasahiro Yamada 10d90a5a30SMasahiro Yamada /** 11d90a5a30SMasahiro Yamada * struct pinconf_param - pin config parameters 12d90a5a30SMasahiro Yamada * 13d90a5a30SMasahiro Yamada * @property: property name in DT nodes 14d90a5a30SMasahiro Yamada * @param: ID for this config parameter 15d90a5a30SMasahiro Yamada * @default_value: default value for this config parameter used in case 16d90a5a30SMasahiro Yamada * no value is specified in DT nodes 17d90a5a30SMasahiro Yamada */ 18d90a5a30SMasahiro Yamada struct pinconf_param { 19d90a5a30SMasahiro Yamada const char * const property; 20d90a5a30SMasahiro Yamada unsigned int param; 21d90a5a30SMasahiro Yamada u32 default_value; 22d90a5a30SMasahiro Yamada }; 23d90a5a30SMasahiro Yamada 24d90a5a30SMasahiro Yamada /** 25d90a5a30SMasahiro Yamada * struct pinctrl_ops - pin control operations, to be implemented by 26d90a5a30SMasahiro Yamada * pin controller drivers. 27d90a5a30SMasahiro Yamada * 28d90a5a30SMasahiro Yamada * The @set_state is the only mandatory operation. You can implement your 29d90a5a30SMasahiro Yamada * pinctrl driver with its own @set_state. In this case, the other callbacks 30d90a5a30SMasahiro Yamada * are not required. Otherwise, generic pinctrl framework is also available; 31d90a5a30SMasahiro Yamada * use pinctrl_generic_set_state for @set_state, and implement other operations 32d90a5a30SMasahiro Yamada * depending on your necessity. 33d90a5a30SMasahiro Yamada * 34d90a5a30SMasahiro Yamada * @get_pins_count: return number of selectable named pins available 35d90a5a30SMasahiro Yamada * in this driver. (necessary to parse "pins" property in DTS) 36d90a5a30SMasahiro Yamada * @get_pin_name: return the pin name of the pin selector, 37d90a5a30SMasahiro Yamada * called by the core to figure out which pin it shall do 38d90a5a30SMasahiro Yamada * operations to. (necessary to parse "pins" property in DTS) 39d90a5a30SMasahiro Yamada * @get_groups_count: return number of selectable named groups available 40d90a5a30SMasahiro Yamada * in this driver. (necessary to parse "groups" property in DTS) 41d90a5a30SMasahiro Yamada * @get_group_name: return the group name of the group selector, 42d90a5a30SMasahiro Yamada * called by the core to figure out which pin group it shall do 43d90a5a30SMasahiro Yamada * operations to. (necessary to parse "groups" property in DTS) 44d90a5a30SMasahiro Yamada * @get_functions_count: return number of selectable named functions available 45d90a5a30SMasahiro Yamada * in this driver. (necessary for pin-muxing) 46d90a5a30SMasahiro Yamada * @get_function_name: return the function name of the muxing selector, 47d90a5a30SMasahiro Yamada * called by the core to figure out which mux setting it shall map a 48d90a5a30SMasahiro Yamada * certain device to. (necessary for pin-muxing) 49d90a5a30SMasahiro Yamada * @pinmux_set: enable a certain muxing function with a certain pin. 50d90a5a30SMasahiro Yamada * The @func_selector selects a certain function whereas @pin_selector 51d90a5a30SMasahiro Yamada * selects a certain pin to be used. On simple controllers one of them 52d90a5a30SMasahiro Yamada * may be ignored. (necessary for pin-muxing against a single pin) 53d90a5a30SMasahiro Yamada * @pinmux_group_set: enable a certain muxing function with a certain pin 54d90a5a30SMasahiro Yamada * group. The @func_selector selects a certain function whereas 55d90a5a30SMasahiro Yamada * @group_selector selects a certain set of pins to be used. On simple 56d90a5a30SMasahiro Yamada * controllers one of them may be ignored. 57d90a5a30SMasahiro Yamada * (necessary for pin-muxing against a pin group) 58d90a5a30SMasahiro Yamada * @pinconf_num_params: number of driver-specific parameters to be parsed 59d90a5a30SMasahiro Yamada * from device trees (necessary for pin-configuration) 60d90a5a30SMasahiro Yamada * @pinconf_params: list of driver_specific parameters to be parsed from 61d90a5a30SMasahiro Yamada * device trees (necessary for pin-configuration) 62d90a5a30SMasahiro Yamada * @pinconf_set: configure an individual pin with a given parameter. 63d90a5a30SMasahiro Yamada * (necessary for pin-configuration against a single pin) 64d90a5a30SMasahiro Yamada * @pinconf_group_set: configure all pins in a group with a given parameter. 65d90a5a30SMasahiro Yamada * (necessary for pin-configuration against a pin group) 66d90a5a30SMasahiro Yamada * @set_state: do pinctrl operations specified by @config, a pseudo device 67d90a5a30SMasahiro Yamada * pointing a config node. (necessary for pinctrl_full) 68d90a5a30SMasahiro Yamada * @set_state_simple: do needed pinctrl operations for a peripherl @periph. 69d90a5a30SMasahiro Yamada * (necessary for pinctrl_simple) 706b9191d0SPatrice Chotard * @get_pin_muxing: display the muxing of a given pin. 71*26ad936dSMarek Vasut * @gpio_request_enable: requests and enables GPIO on a certain pin. 72*26ad936dSMarek Vasut * Implement this only if you can mux every pin individually as GPIO. The 73*26ad936dSMarek Vasut * affected GPIO range is passed along with an offset(pin number) into that 74*26ad936dSMarek Vasut * specific GPIO range - function selectors and pin groups are orthogonal 75*26ad936dSMarek Vasut * to this, the core will however make sure the pins do not collide. 76*26ad936dSMarek Vasut * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of 77*26ad936dSMarek Vasut * @gpio_request_enable 78d90a5a30SMasahiro Yamada */ 79d90a5a30SMasahiro Yamada struct pinctrl_ops { 80d90a5a30SMasahiro Yamada int (*get_pins_count)(struct udevice *dev); 81d90a5a30SMasahiro Yamada const char *(*get_pin_name)(struct udevice *dev, unsigned selector); 82d90a5a30SMasahiro Yamada int (*get_groups_count)(struct udevice *dev); 83d90a5a30SMasahiro Yamada const char *(*get_group_name)(struct udevice *dev, unsigned selector); 84d90a5a30SMasahiro Yamada int (*get_functions_count)(struct udevice *dev); 85d90a5a30SMasahiro Yamada const char *(*get_function_name)(struct udevice *dev, 86d90a5a30SMasahiro Yamada unsigned selector); 87d90a5a30SMasahiro Yamada int (*pinmux_set)(struct udevice *dev, unsigned pin_selector, 88d90a5a30SMasahiro Yamada unsigned func_selector); 89d90a5a30SMasahiro Yamada int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector, 90d90a5a30SMasahiro Yamada unsigned func_selector); 91d90a5a30SMasahiro Yamada unsigned int pinconf_num_params; 92d90a5a30SMasahiro Yamada const struct pinconf_param *pinconf_params; 93d90a5a30SMasahiro Yamada int (*pinconf_set)(struct udevice *dev, unsigned pin_selector, 94d90a5a30SMasahiro Yamada unsigned param, unsigned argument); 95d90a5a30SMasahiro Yamada int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector, 96d90a5a30SMasahiro Yamada unsigned param, unsigned argument); 97d90a5a30SMasahiro Yamada int (*set_state)(struct udevice *dev, struct udevice *config); 98c5acf4a2SSimon Glass 99c5acf4a2SSimon Glass /* for pinctrl-simple */ 100d90a5a30SMasahiro Yamada int (*set_state_simple)(struct udevice *dev, struct udevice *periph); 101c5acf4a2SSimon Glass /** 102c5acf4a2SSimon Glass * request() - Request a particular pinctrl function 103c5acf4a2SSimon Glass * 104c5acf4a2SSimon Glass * This activates the selected function. 105c5acf4a2SSimon Glass * 106c5acf4a2SSimon Glass * @dev: Device to adjust (UCLASS_PINCTRL) 107c5acf4a2SSimon Glass * @func: Function number (driver-specific) 108c5acf4a2SSimon Glass * @return 0 if OK, -ve on error 109c5acf4a2SSimon Glass */ 110c5acf4a2SSimon Glass int (*request)(struct udevice *dev, int func, int flags); 111c5acf4a2SSimon Glass 112c5acf4a2SSimon Glass /** 113c5acf4a2SSimon Glass * get_periph_id() - get the peripheral ID for a device 114c5acf4a2SSimon Glass * 115c5acf4a2SSimon Glass * This generally looks at the peripheral's device tree node to work 116c5acf4a2SSimon Glass * out the peripheral ID. The return value is normally interpreted as 117c5acf4a2SSimon Glass * enum periph_id. so long as this is defined by the platform (which it 118c5acf4a2SSimon Glass * should be). 119c5acf4a2SSimon Glass * 120c5acf4a2SSimon Glass * @dev: Pinctrl device to use for decoding 121c5acf4a2SSimon Glass * @periph: Device to check 122c5acf4a2SSimon Glass * @return peripheral ID of @periph, or -ENOENT on error 123c5acf4a2SSimon Glass */ 124c5acf4a2SSimon Glass int (*get_periph_id)(struct udevice *dev, struct udevice *periph); 12577eaa19eSSimon Glass 12677eaa19eSSimon Glass /** 12777eaa19eSSimon Glass * get_gpio_mux() - get the mux value for a particular GPIO 12877eaa19eSSimon Glass * 12977eaa19eSSimon Glass * This allows the raw mux value for a GPIO to be obtained. It is 13077eaa19eSSimon Glass * useful for displaying the function being used by that GPIO, such 13177eaa19eSSimon Glass * as with the 'gpio' command. This function is internal to the GPIO 13277eaa19eSSimon Glass * subsystem and should not be used by generic code. Typically it is 13377eaa19eSSimon Glass * used by a GPIO driver with knowledge of the SoC pinctrl setup. 13477eaa19eSSimon Glass * 13577eaa19eSSimon Glass * @dev: Pinctrl device to use 13677eaa19eSSimon Glass * @banknum: GPIO bank number 13777eaa19eSSimon Glass * @index: GPIO index within the bank 13877eaa19eSSimon Glass * @return mux value (SoC-specific, e.g. 0 for input, 1 for output) 13977eaa19eSSimon Glass */ 14077eaa19eSSimon Glass int (*get_gpio_mux)(struct udevice *dev, int banknum, int index); 1416b9191d0SPatrice Chotard 1426b9191d0SPatrice Chotard /** 1436b9191d0SPatrice Chotard * get_pin_muxing() - show pin muxing 1446b9191d0SPatrice Chotard * 1456b9191d0SPatrice Chotard * This allows to display the muxing of a given pin. It's useful for 1466b9191d0SPatrice Chotard * debug purpose to know if a pin is configured as GPIO or as an 1476b9191d0SPatrice Chotard * alternate function and which one. 1486b9191d0SPatrice Chotard * Typically it is used by a PINCTRL driver with knowledge of the SoC 1496b9191d0SPatrice Chotard * pinctrl setup. 1506b9191d0SPatrice Chotard * 1516b9191d0SPatrice Chotard * @dev: Pinctrl device to use 1526b9191d0SPatrice Chotard * @selector: Pin selector 1536b9191d0SPatrice Chotard * @buf Pin's muxing description 1546b9191d0SPatrice Chotard * @size Pin's muxing description length 1556b9191d0SPatrice Chotard * return 0 if OK, -ve on error 1566b9191d0SPatrice Chotard */ 1576b9191d0SPatrice Chotard int (*get_pin_muxing)(struct udevice *dev, unsigned int selector, 1586b9191d0SPatrice Chotard char *buf, int size); 159*26ad936dSMarek Vasut 160*26ad936dSMarek Vasut /** 161*26ad936dSMarek Vasut * gpio_request_enable: requests and enables GPIO on a certain pin. 162*26ad936dSMarek Vasut * 163*26ad936dSMarek Vasut * @dev: Pinctrl device to use 164*26ad936dSMarek Vasut * @selector: Pin selector 165*26ad936dSMarek Vasut * return 0 if OK, -ve on error 166*26ad936dSMarek Vasut */ 167*26ad936dSMarek Vasut int (*gpio_request_enable)(struct udevice *dev, unsigned int selector); 168*26ad936dSMarek Vasut 169*26ad936dSMarek Vasut /** 170*26ad936dSMarek Vasut * gpio_disable_free: free up GPIO muxing on a certain pin. 171*26ad936dSMarek Vasut * 172*26ad936dSMarek Vasut * @dev: Pinctrl device to use 173*26ad936dSMarek Vasut * @selector: Pin selector 174*26ad936dSMarek Vasut * return 0 if OK, -ve on error 175*26ad936dSMarek Vasut */ 176*26ad936dSMarek Vasut int (*gpio_disable_free)(struct udevice *dev, unsigned int selector); 177d90a5a30SMasahiro Yamada }; 178d90a5a30SMasahiro Yamada 179d90a5a30SMasahiro Yamada #define pinctrl_get_ops(dev) ((struct pinctrl_ops *)(dev)->driver->ops) 180d90a5a30SMasahiro Yamada 181d90a5a30SMasahiro Yamada /** 182d90a5a30SMasahiro Yamada * Generic pin configuration paramters 183d90a5a30SMasahiro Yamada * 184d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a 185d90a5a30SMasahiro Yamada * transition from say pull-up to pull-down implies that you disable 186d90a5a30SMasahiro Yamada * pull-up in the process, this setting disables all biasing. 187d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance 188d90a5a30SMasahiro Yamada * mode, also know as "third-state" (tristate) or "high-Z" or "floating". 189d90a5a30SMasahiro Yamada * On output pins this effectively disconnects the pin, which is useful 190d90a5a30SMasahiro Yamada * if for example some other pin is going to drive the signal connected 191d90a5a30SMasahiro Yamada * to it for a while. Pins used for input are usually always high 192d90a5a30SMasahiro Yamada * impedance. 193d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it 194d90a5a30SMasahiro Yamada * weakly drives the last value on a tristate bus, also known as a "bus 195d90a5a30SMasahiro Yamada * holder", "bus keeper" or "repeater". This allows another device on the 196d90a5a30SMasahiro Yamada * bus to change the value by driving the bus high or low and switching to 197d90a5a30SMasahiro Yamada * tristate. The argument is ignored. 198d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high 199d90a5a30SMasahiro Yamada * impedance to VDD). If the argument is != 0 pull-up is enabled, 200d90a5a30SMasahiro Yamada * if it is 0, pull-up is total, i.e. the pin is connected to VDD. 201d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high 202d90a5a30SMasahiro Yamada * impedance to GROUND). If the argument is != 0 pull-down is enabled, 203d90a5a30SMasahiro Yamada * if it is 0, pull-down is total, i.e. the pin is connected to GROUND. 204d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based 205d90a5a30SMasahiro Yamada * on embedded knowledge of the controller hardware, like current mux 206d90a5a30SMasahiro Yamada * function. The pull direction and possibly strength too will normally 207d90a5a30SMasahiro Yamada * be decided completely inside the hardware block and not be readable 208d90a5a30SMasahiro Yamada * from the kernel side. 209d90a5a30SMasahiro Yamada * If the argument is != 0 pull up/down is enabled, if it is 0, the 210d90a5a30SMasahiro Yamada * configuration is ignored. The proper way to disable it is to use 211d90a5a30SMasahiro Yamada * @PIN_CONFIG_BIAS_DISABLE. 212d90a5a30SMasahiro Yamada * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and 213d90a5a30SMasahiro Yamada * low, this is the most typical case and is typically achieved with two 214d90a5a30SMasahiro Yamada * active transistors on the output. Setting this config will enable 215d90a5a30SMasahiro Yamada * push-pull mode, the argument is ignored. 216d90a5a30SMasahiro Yamada * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open 217d90a5a30SMasahiro Yamada * collector) which means it is usually wired with other output ports 218d90a5a30SMasahiro Yamada * which are then pulled up with an external resistor. Setting this 219d90a5a30SMasahiro Yamada * config will enable open drain mode, the argument is ignored. 220d90a5a30SMasahiro Yamada * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source 221d90a5a30SMasahiro Yamada * (open emitter). Setting this config will enable open source mode, the 222d90a5a30SMasahiro Yamada * argument is ignored. 223d90a5a30SMasahiro Yamada * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current 224d90a5a30SMasahiro Yamada * passed as argument. The argument is in mA. 225d90a5a30SMasahiro Yamada * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not 226d90a5a30SMasahiro Yamada * affect the pin's ability to drive output. 1 enables input, 0 disables 227d90a5a30SMasahiro Yamada * input. 228d90a5a30SMasahiro Yamada * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin. 229d90a5a30SMasahiro Yamada * If the argument != 0, schmitt-trigger mode is enabled. If it's 0, 230d90a5a30SMasahiro Yamada * schmitt-trigger mode is disabled. 231d90a5a30SMasahiro Yamada * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in 232d90a5a30SMasahiro Yamada * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis, 233d90a5a30SMasahiro Yamada * the threshold value is given on a custom format as argument when 234d90a5a30SMasahiro Yamada * setting pins to this mode. 235d90a5a30SMasahiro Yamada * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode, 236d90a5a30SMasahiro Yamada * which means it will wait for signals to settle when reading inputs. The 237d90a5a30SMasahiro Yamada * argument gives the debounce time in usecs. Setting the 238d90a5a30SMasahiro Yamada * argument to zero turns debouncing off. 239d90a5a30SMasahiro Yamada * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power 240d90a5a30SMasahiro Yamada * supplies, the argument to this parameter (on a custom format) tells 241d90a5a30SMasahiro Yamada * the driver which alternative power source to use. 242d90a5a30SMasahiro Yamada * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to 243d90a5a30SMasahiro Yamada * this parameter (on a custom format) tells the driver which alternative 244d90a5a30SMasahiro Yamada * slew rate to use. 245d90a5a30SMasahiro Yamada * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power 246d90a5a30SMasahiro Yamada * operation, if several modes of operation are supported these can be 247d90a5a30SMasahiro Yamada * passed in the argument on a custom form, else just use argument 1 248d90a5a30SMasahiro Yamada * to indicate low power mode, argument 0 turns low power mode off. 249d90a5a30SMasahiro Yamada * @PIN_CONFIG_OUTPUT: this will configure the pin as an output. Use argument 250d90a5a30SMasahiro Yamada * 1 to indicate high level, argument 0 to indicate low level. (Please 251d90a5a30SMasahiro Yamada * see Documentation/pinctrl.txt, section "GPIO mode pitfalls" for a 252d90a5a30SMasahiro Yamada * discussion around this parameter.) 253d90a5a30SMasahiro Yamada * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if 254d90a5a30SMasahiro Yamada * you need to pass in custom configurations to the pin controller, use 255d90a5a30SMasahiro Yamada * PIN_CONFIG_END+1 as the base offset. 256d90a5a30SMasahiro Yamada */ 257d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_DISABLE 0 258d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_HIGH_IMPEDANCE 1 259d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_BUS_HOLD 2 260d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_PULL_UP 3 261d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_PULL_DOWN 4 262d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_PULL_PIN_DEFAULT 5 263d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_PUSH_PULL 6 264d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_OPEN_DRAIN 7 265d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_OPEN_SOURCE 8 266d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_STRENGTH 9 267d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_ENABLE 10 268d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_SCHMITT_ENABLE 11 269d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_SCHMITT 12 270d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_DEBOUNCE 13 271d90a5a30SMasahiro Yamada #define PIN_CONFIG_POWER_SOURCE 14 272d90a5a30SMasahiro Yamada #define PIN_CONFIG_SLEW_RATE 15 273d90a5a30SMasahiro Yamada #define PIN_CONFIG_LOW_POWER_MODE 16 274d90a5a30SMasahiro Yamada #define PIN_CONFIG_OUTPUT 17 275d90a5a30SMasahiro Yamada #define PIN_CONFIG_END 0x7FFF 276d90a5a30SMasahiro Yamada 277d90a5a30SMasahiro Yamada #if CONFIG_IS_ENABLED(PINCTRL_GENERIC) 278d90a5a30SMasahiro Yamada /** 279d90a5a30SMasahiro Yamada * pinctrl_generic_set_state() - generic set_state operation 280d90a5a30SMasahiro Yamada * Parse the DT node of @config and its children and handle generic properties 281d90a5a30SMasahiro Yamada * such as "pins", "groups", "functions", and pin configuration parameters. 282d90a5a30SMasahiro Yamada * 283d90a5a30SMasahiro Yamada * @pctldev: pinctrl device 284d90a5a30SMasahiro Yamada * @config: config device (pseudo device), pointing a config node in DTS 285d90a5a30SMasahiro Yamada * @return: 0 on success, or negative error code on failure 286d90a5a30SMasahiro Yamada */ 287d90a5a30SMasahiro Yamada int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config); 288d90a5a30SMasahiro Yamada #else 289d90a5a30SMasahiro Yamada static inline int pinctrl_generic_set_state(struct udevice *pctldev, 290d90a5a30SMasahiro Yamada struct udevice *config) 291d90a5a30SMasahiro Yamada { 292d90a5a30SMasahiro Yamada return -EINVAL; 293d90a5a30SMasahiro Yamada } 294d90a5a30SMasahiro Yamada #endif 295d90a5a30SMasahiro Yamada 296d90a5a30SMasahiro Yamada #if CONFIG_IS_ENABLED(PINCTRL) 297d90a5a30SMasahiro Yamada /** 298d90a5a30SMasahiro Yamada * pinctrl_select_state() - set a device to a given state 299d90a5a30SMasahiro Yamada * 300d90a5a30SMasahiro Yamada * @dev: peripheral device 301d90a5a30SMasahiro Yamada * @statename: state name, like "default" 302d90a5a30SMasahiro Yamada * @return: 0 on success, or negative error code on failure 303d90a5a30SMasahiro Yamada */ 304d90a5a30SMasahiro Yamada int pinctrl_select_state(struct udevice *dev, const char *statename); 305d90a5a30SMasahiro Yamada 306c5acf4a2SSimon Glass /** 307c5acf4a2SSimon Glass * pinctrl_request() - Request a particular pinctrl function 308c5acf4a2SSimon Glass * 309c5acf4a2SSimon Glass * @dev: Device to check (UCLASS_PINCTRL) 310c5acf4a2SSimon Glass * @func: Function number (driver-specific) 311c5acf4a2SSimon Glass * @flags: Flags (driver-specific) 312c5acf4a2SSimon Glass * @return 0 if OK, -ve on error 313c5acf4a2SSimon Glass */ 314c5acf4a2SSimon Glass int pinctrl_request(struct udevice *dev, int func, int flags); 315c5acf4a2SSimon Glass 316c5acf4a2SSimon Glass /** 317c5acf4a2SSimon Glass * pinctrl_request_noflags() - Request a particular pinctrl function 318c5acf4a2SSimon Glass * 319c5acf4a2SSimon Glass * This is similar to pinctrl_request() but uses 0 for @flags. 320c5acf4a2SSimon Glass * 321c5acf4a2SSimon Glass * @dev: Device to check (UCLASS_PINCTRL) 322c5acf4a2SSimon Glass * @func: Function number (driver-specific) 323c5acf4a2SSimon Glass * @return 0 if OK, -ve on error 324c5acf4a2SSimon Glass */ 325c5acf4a2SSimon Glass int pinctrl_request_noflags(struct udevice *dev, int func); 326c5acf4a2SSimon Glass 327c5acf4a2SSimon Glass /** 328c5acf4a2SSimon Glass * pinctrl_get_periph_id() - get the peripheral ID for a device 329c5acf4a2SSimon Glass * 330c5acf4a2SSimon Glass * This generally looks at the peripheral's device tree node to work out the 331c5acf4a2SSimon Glass * peripheral ID. The return value is normally interpreted as enum periph_id. 332c5acf4a2SSimon Glass * so long as this is defined by the platform (which it should be). 333c5acf4a2SSimon Glass * 334c5acf4a2SSimon Glass * @dev: Pinctrl device to use for decoding 335c5acf4a2SSimon Glass * @periph: Device to check 336c5acf4a2SSimon Glass * @return peripheral ID of @periph, or -ENOENT on error 337c5acf4a2SSimon Glass */ 338c5acf4a2SSimon Glass int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph); 339c5acf4a2SSimon Glass 34052db39a2SSimon Glass /** 34152db39a2SSimon Glass * pinctrl_decode_pin_config() - decode pin configuration flags 34252db39a2SSimon Glass * 34352db39a2SSimon Glass * This decodes some of the PIN_CONFIG values into flags, with each value 34452db39a2SSimon Glass * being (1 << pin_cfg). This does not support things with values like the 34552db39a2SSimon Glass * slew rate. 34652db39a2SSimon Glass * 34752db39a2SSimon Glass * @blob: Device tree blob 34852db39a2SSimon Glass * @node: Node containing the PIN_CONFIG values 34952db39a2SSimon Glass * @return decoded flag value, or -ve on error 35052db39a2SSimon Glass */ 35152db39a2SSimon Glass int pinctrl_decode_pin_config(const void *blob, int node); 35252db39a2SSimon Glass 35377eaa19eSSimon Glass /** 35477eaa19eSSimon Glass * pinctrl_get_gpio_mux() - get the mux value for a particular GPIO 35577eaa19eSSimon Glass * 35677eaa19eSSimon Glass * This allows the raw mux value for a GPIO to be obtained. It is 35777eaa19eSSimon Glass * useful for displaying the function being used by that GPIO, such 35877eaa19eSSimon Glass * as with the 'gpio' command. This function is internal to the GPIO 35977eaa19eSSimon Glass * subsystem and should not be used by generic code. Typically it is 36077eaa19eSSimon Glass * used by a GPIO driver with knowledge of the SoC pinctrl setup. 36177eaa19eSSimon Glass * 36277eaa19eSSimon Glass * @dev: Pinctrl device to use 36377eaa19eSSimon Glass * @banknum: GPIO bank number 36477eaa19eSSimon Glass * @index: GPIO index within the bank 36577eaa19eSSimon Glass * @return mux value (SoC-specific, e.g. 0 for input, 1 for output) 36677eaa19eSSimon Glass */ 36777eaa19eSSimon Glass int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index); 36877eaa19eSSimon Glass 36933f8d8a6SJianqun Xu /** 37033f8d8a6SJianqun Xu * pinctrl_get_pins_count() - get the total pins count for all GPIOs 37133f8d8a6SJianqun Xu * 37233f8d8a6SJianqun Xu * This allows the total pins count for all GPIO to be obtained. 37333f8d8a6SJianqun Xu * 37433f8d8a6SJianqun Xu * @dev: Pinctrl device to use 37533f8d8a6SJianqun Xu * @return pins count 37633f8d8a6SJianqun Xu */ 37733f8d8a6SJianqun Xu int pinctrl_get_pins_count(struct udevice *dev); 378942638a9SPatrice Chotard 379942638a9SPatrice Chotard /** 380942638a9SPatrice Chotard * pinctrl_get_pin_name() - Returns the pin's name 381942638a9SPatrice Chotard * 382942638a9SPatrice Chotard * This allows to display the pin's name for debug purpose 383942638a9SPatrice Chotard * 384942638a9SPatrice Chotard * @dev: Pinctrl device to use 385942638a9SPatrice Chotard * @selector Pin index within pin-controller 386942638a9SPatrice Chotard * @buf Pin's name 387942638a9SPatrice Chotard * @return 0 if OK, -ve on error 388942638a9SPatrice Chotard */ 389942638a9SPatrice Chotard int pinctrl_get_pin_name(struct udevice *dev, int selector, char *buf, 390942638a9SPatrice Chotard int size); 391942638a9SPatrice Chotard 3926b9191d0SPatrice Chotard /** 3936b9191d0SPatrice Chotard * pinctrl_get_pin_muxing() - Returns the muxing description 3946b9191d0SPatrice Chotard * 3956b9191d0SPatrice Chotard * This allows to display the muxing description of the given pin for 3966b9191d0SPatrice Chotard * debug purpose 3976b9191d0SPatrice Chotard * 3986b9191d0SPatrice Chotard * @dev: Pinctrl device to use 3996b9191d0SPatrice Chotard * @selector Pin index within pin-controller 4006b9191d0SPatrice Chotard * @buf Pin's muxing description 4016b9191d0SPatrice Chotard * @size Pin's muxing description length 4026b9191d0SPatrice Chotard * @return 0 if OK, -ve on error 4036b9191d0SPatrice Chotard */ 4046b9191d0SPatrice Chotard int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf, 4056b9191d0SPatrice Chotard int size); 4066b9191d0SPatrice Chotard 407*26ad936dSMarek Vasut /** 408*26ad936dSMarek Vasut * pinctrl_gpio_request() - request a single pin to be used as GPIO 409*26ad936dSMarek Vasut * 410*26ad936dSMarek Vasut * @dev: GPIO peripheral device 411*26ad936dSMarek Vasut * @offset: the GPIO pin offset from the GPIO controller 412*26ad936dSMarek Vasut * @return: 0 on success, or negative error code on failure 413*26ad936dSMarek Vasut */ 414*26ad936dSMarek Vasut int pinctrl_gpio_request(struct udevice *dev, unsigned offset); 415*26ad936dSMarek Vasut 416*26ad936dSMarek Vasut /** 417*26ad936dSMarek Vasut * pinctrl_gpio_free() - free a single pin used as GPIO 418*26ad936dSMarek Vasut * 419*26ad936dSMarek Vasut * @dev: GPIO peripheral device 420*26ad936dSMarek Vasut * @offset: the GPIO pin offset from the GPIO controller 421*26ad936dSMarek Vasut * @return: 0 on success, or negative error code on failure 422*26ad936dSMarek Vasut */ 423*26ad936dSMarek Vasut int pinctrl_gpio_free(struct udevice *dev, unsigned offset); 424*26ad936dSMarek Vasut 425d3acdc96SJianqun Xu #else 426d3acdc96SJianqun Xu static inline int pinctrl_select_state(struct udevice *dev, 427d3acdc96SJianqun Xu const char *statename) 428d3acdc96SJianqun Xu { 429d3acdc96SJianqun Xu return -EINVAL; 430d3acdc96SJianqun Xu } 431d3acdc96SJianqun Xu 432d3acdc96SJianqun Xu static inline int pinctrl_request(struct udevice *dev, int func, int flags) 433d3acdc96SJianqun Xu { 434d3acdc96SJianqun Xu return -EINVAL; 435d3acdc96SJianqun Xu } 436d3acdc96SJianqun Xu 437d3acdc96SJianqun Xu static inline int pinctrl_request_noflags(struct udevice *dev, int func) 438d3acdc96SJianqun Xu { 439d3acdc96SJianqun Xu return -EINVAL; 440d3acdc96SJianqun Xu } 441d3acdc96SJianqun Xu 442d3acdc96SJianqun Xu static inline int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph) 443d3acdc96SJianqun Xu { 444d3acdc96SJianqun Xu return -EINVAL; 445d3acdc96SJianqun Xu } 446d3acdc96SJianqun Xu 447d3acdc96SJianqun Xu static inline int pinctrl_decode_pin_config(const void *blob, int node) 448d3acdc96SJianqun Xu { 449d3acdc96SJianqun Xu return -EINVAL; 450d3acdc96SJianqun Xu } 451d3acdc96SJianqun Xu 452d3acdc96SJianqun Xu static inline int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index) 453d3acdc96SJianqun Xu { 454d3acdc96SJianqun Xu return -EINVAL; 455d3acdc96SJianqun Xu } 456d3acdc96SJianqun Xu 457d3acdc96SJianqun Xu static inline int pinctrl_get_pins_count(struct udevice *dev) 458d3acdc96SJianqun Xu { 459d3acdc96SJianqun Xu return -EINVAL; 460d3acdc96SJianqun Xu } 461942638a9SPatrice Chotard 462942638a9SPatrice Chotard static inline int pinctrl_get_pin_name(struct udevice *dev, int selector, char *buf, 463942638a9SPatrice Chotard int size) 464942638a9SPatrice Chotard { 465942638a9SPatrice Chotard return -EINVAL; 466942638a9SPatrice Chotard } 467942638a9SPatrice Chotard 4686b9191d0SPatrice Chotard static inline int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf, 4696b9191d0SPatrice Chotard int size) 4706b9191d0SPatrice Chotard { 4716b9191d0SPatrice Chotard return -EINVAL; 4726b9191d0SPatrice Chotard } 4736b9191d0SPatrice Chotard 474*26ad936dSMarek Vasut static inline int pinctrl_gpio_request(struct udevice *dev, unsigned offset) 475*26ad936dSMarek Vasut { 476*26ad936dSMarek Vasut return -EINVAL; 477*26ad936dSMarek Vasut } 478*26ad936dSMarek Vasut 479*26ad936dSMarek Vasut static inline int pinctrl_gpio_free(struct udevice *dev, unsigned offset) 480*26ad936dSMarek Vasut { 481*26ad936dSMarek Vasut return -EINVAL; 482*26ad936dSMarek Vasut } 483*26ad936dSMarek Vasut 484d3acdc96SJianqun Xu #endif 48533f8d8a6SJianqun Xu 486d90a5a30SMasahiro Yamada #endif /* __PINCTRL_H */ 487