xref: /rk3399_rockchip-uboot/include/dm/pinctrl.h (revision 386f9d4cdc1bf882b1c9fda58e195f3017bf3b71)
1d90a5a30SMasahiro Yamada /*
2d90a5a30SMasahiro Yamada  * Copyright (C) 2015  Masahiro Yamada <yamada.masahiro@socionext.com>
3d90a5a30SMasahiro Yamada  *
4d90a5a30SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
5d90a5a30SMasahiro Yamada  */
6d90a5a30SMasahiro Yamada 
7d90a5a30SMasahiro Yamada #ifndef __PINCTRL_H
8d90a5a30SMasahiro Yamada #define __PINCTRL_H
9d90a5a30SMasahiro Yamada 
100f850630SPatrice Chotard #define PINNAME_SIZE	10
110f850630SPatrice Chotard #define PINMUX_SIZE	40
120f850630SPatrice Chotard 
13d90a5a30SMasahiro Yamada /**
14d90a5a30SMasahiro Yamada  * struct pinconf_param - pin config parameters
15d90a5a30SMasahiro Yamada  *
16d90a5a30SMasahiro Yamada  * @property: property name in DT nodes
17d90a5a30SMasahiro Yamada  * @param: ID for this config parameter
18d90a5a30SMasahiro Yamada  * @default_value: default value for this config parameter used in case
19d90a5a30SMasahiro Yamada  *	no value is specified in DT nodes
20d90a5a30SMasahiro Yamada  */
21d90a5a30SMasahiro Yamada struct pinconf_param {
22d90a5a30SMasahiro Yamada 	const char * const property;
23d90a5a30SMasahiro Yamada 	unsigned int param;
24d90a5a30SMasahiro Yamada 	u32 default_value;
25d90a5a30SMasahiro Yamada };
26d90a5a30SMasahiro Yamada 
27d90a5a30SMasahiro Yamada /**
28d90a5a30SMasahiro Yamada  * struct pinctrl_ops - pin control operations, to be implemented by
29d90a5a30SMasahiro Yamada  * pin controller drivers.
30d90a5a30SMasahiro Yamada  *
31d90a5a30SMasahiro Yamada  * The @set_state is the only mandatory operation.  You can implement your
32d90a5a30SMasahiro Yamada  * pinctrl driver with its own @set_state.  In this case, the other callbacks
33d90a5a30SMasahiro Yamada  * are not required.  Otherwise, generic pinctrl framework is also available;
34d90a5a30SMasahiro Yamada  * use pinctrl_generic_set_state for @set_state, and implement other operations
35d90a5a30SMasahiro Yamada  * depending on your necessity.
36d90a5a30SMasahiro Yamada  *
37d90a5a30SMasahiro Yamada  * @get_pins_count: return number of selectable named pins available
38d90a5a30SMasahiro Yamada  *	in this driver. (necessary to parse "pins" property in DTS)
39d90a5a30SMasahiro Yamada  * @get_pin_name: return the pin name of the pin selector,
40d90a5a30SMasahiro Yamada  *	called by the core to figure out which pin it shall do
41d90a5a30SMasahiro Yamada  *	operations to. (necessary to parse "pins" property in DTS)
42d90a5a30SMasahiro Yamada  * @get_groups_count: return number of selectable named groups available
43d90a5a30SMasahiro Yamada  *	in this driver. (necessary to parse "groups" property in DTS)
44d90a5a30SMasahiro Yamada  * @get_group_name: return the group name of the group selector,
45d90a5a30SMasahiro Yamada  *	called by the core to figure out which pin group it shall do
46d90a5a30SMasahiro Yamada  *	operations to. (necessary to parse "groups" property in DTS)
47d90a5a30SMasahiro Yamada  * @get_functions_count: return number of selectable named functions available
48d90a5a30SMasahiro Yamada  *	in this driver. (necessary for pin-muxing)
49d90a5a30SMasahiro Yamada  * @get_function_name: return the function name of the muxing selector,
50d90a5a30SMasahiro Yamada  *	called by the core to figure out which mux setting it shall map a
51d90a5a30SMasahiro Yamada  *	certain device to. (necessary for pin-muxing)
52d90a5a30SMasahiro Yamada  * @pinmux_set: enable a certain muxing function with a certain pin.
53d90a5a30SMasahiro Yamada  *	The @func_selector selects a certain function whereas @pin_selector
54d90a5a30SMasahiro Yamada  *	selects a certain pin to be used. On simple controllers one of them
55d90a5a30SMasahiro Yamada  *	may be ignored. (necessary for pin-muxing against a single pin)
56d90a5a30SMasahiro Yamada  * @pinmux_group_set: enable a certain muxing function with a certain pin
57d90a5a30SMasahiro Yamada  *	group. The @func_selector selects a certain function whereas
58d90a5a30SMasahiro Yamada  *	@group_selector selects a certain set of pins to be used. On simple
59d90a5a30SMasahiro Yamada  *	controllers one of them may be ignored.
60d90a5a30SMasahiro Yamada  *	(necessary for pin-muxing against a pin group)
61*386f9d4cSSean Anderson  * @pinmux_property_set: enable a pinmux group. @pinmux_group should specify the
62*386f9d4cSSean Anderson  *      pin identifier and mux settings. The exact format of a pinmux group is
63*386f9d4cSSean Anderson  *      left up to the driver. The pin selector for the mux-ed pin should be
64*386f9d4cSSean Anderson  *      returned on success. (necessary to parse the "pinmux" property in DTS)
65d90a5a30SMasahiro Yamada  * @pinconf_num_params: number of driver-specific parameters to be parsed
66d90a5a30SMasahiro Yamada  *	from device trees  (necessary for pin-configuration)
67d90a5a30SMasahiro Yamada  * @pinconf_params: list of driver_specific parameters to be parsed from
68d90a5a30SMasahiro Yamada  *	device trees  (necessary for pin-configuration)
69d90a5a30SMasahiro Yamada  * @pinconf_set: configure an individual pin with a given parameter.
70d90a5a30SMasahiro Yamada  *	(necessary for pin-configuration against a single pin)
71d90a5a30SMasahiro Yamada  * @pinconf_group_set: configure all pins in a group with a given parameter.
72d90a5a30SMasahiro Yamada  *	(necessary for pin-configuration against a pin group)
73d90a5a30SMasahiro Yamada  * @set_state: do pinctrl operations specified by @config, a pseudo device
74d90a5a30SMasahiro Yamada  *	pointing a config node. (necessary for pinctrl_full)
75d90a5a30SMasahiro Yamada  * @set_state_simple: do needed pinctrl operations for a peripherl @periph.
76d90a5a30SMasahiro Yamada  *	(necessary for pinctrl_simple)
776b9191d0SPatrice Chotard  * @get_pin_muxing: display the muxing of a given pin.
7826ad936dSMarek Vasut  * @gpio_request_enable: requests and enables GPIO on a certain pin.
7926ad936dSMarek Vasut  *	Implement this only if you can mux every pin individually as GPIO. The
8026ad936dSMarek Vasut  *	affected GPIO range is passed along with an offset(pin number) into that
8126ad936dSMarek Vasut  *	specific GPIO range - function selectors and pin groups are orthogonal
8226ad936dSMarek Vasut  *	to this, the core will however make sure the pins do not collide.
8326ad936dSMarek Vasut  * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of
8426ad936dSMarek Vasut  *	@gpio_request_enable
85d90a5a30SMasahiro Yamada  */
86d90a5a30SMasahiro Yamada struct pinctrl_ops {
87d90a5a30SMasahiro Yamada 	int (*get_pins_count)(struct udevice *dev);
88d90a5a30SMasahiro Yamada 	const char *(*get_pin_name)(struct udevice *dev, unsigned selector);
89d90a5a30SMasahiro Yamada 	int (*get_groups_count)(struct udevice *dev);
90d90a5a30SMasahiro Yamada 	const char *(*get_group_name)(struct udevice *dev, unsigned selector);
91d90a5a30SMasahiro Yamada 	int (*get_functions_count)(struct udevice *dev);
92d90a5a30SMasahiro Yamada 	const char *(*get_function_name)(struct udevice *dev,
93d90a5a30SMasahiro Yamada 					 unsigned selector);
94d90a5a30SMasahiro Yamada 	int (*pinmux_set)(struct udevice *dev, unsigned pin_selector,
95d90a5a30SMasahiro Yamada 			  unsigned func_selector);
96d90a5a30SMasahiro Yamada 	int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector,
97d90a5a30SMasahiro Yamada 				unsigned func_selector);
98*386f9d4cSSean Anderson 	int (*pinmux_property_set)(struct udevice *dev, u32 pinmux_group);
99d90a5a30SMasahiro Yamada 	unsigned int pinconf_num_params;
100d90a5a30SMasahiro Yamada 	const struct pinconf_param *pinconf_params;
101d90a5a30SMasahiro Yamada 	int (*pinconf_set)(struct udevice *dev, unsigned pin_selector,
102d90a5a30SMasahiro Yamada 			   unsigned param, unsigned argument);
103d90a5a30SMasahiro Yamada 	int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector,
104d90a5a30SMasahiro Yamada 				 unsigned param, unsigned argument);
105d90a5a30SMasahiro Yamada 	int (*set_state)(struct udevice *dev, struct udevice *config);
106c5acf4a2SSimon Glass 
107c5acf4a2SSimon Glass 	/* for pinctrl-simple */
108d90a5a30SMasahiro Yamada 	int (*set_state_simple)(struct udevice *dev, struct udevice *periph);
109c5acf4a2SSimon Glass 	/**
110c5acf4a2SSimon Glass 	 * request() - Request a particular pinctrl function
111c5acf4a2SSimon Glass 	 *
112c5acf4a2SSimon Glass 	 * This activates the selected function.
113c5acf4a2SSimon Glass 	 *
114c5acf4a2SSimon Glass 	 * @dev:	Device to adjust (UCLASS_PINCTRL)
115c5acf4a2SSimon Glass 	 * @func:	Function number (driver-specific)
116c5acf4a2SSimon Glass 	 * @return 0 if OK, -ve on error
117c5acf4a2SSimon Glass 	 */
118c5acf4a2SSimon Glass 	int (*request)(struct udevice *dev, int func, int flags);
119c5acf4a2SSimon Glass 
120c5acf4a2SSimon Glass 	/**
121c5acf4a2SSimon Glass 	* get_periph_id() - get the peripheral ID for a device
122c5acf4a2SSimon Glass 	*
123c5acf4a2SSimon Glass 	* This generally looks at the peripheral's device tree node to work
124c5acf4a2SSimon Glass 	* out the peripheral ID. The return value is normally interpreted as
125c5acf4a2SSimon Glass 	* enum periph_id. so long as this is defined by the platform (which it
126c5acf4a2SSimon Glass 	* should be).
127c5acf4a2SSimon Glass 	*
128c5acf4a2SSimon Glass 	* @dev:		Pinctrl device to use for decoding
129c5acf4a2SSimon Glass 	* @periph:	Device to check
130c5acf4a2SSimon Glass 	* @return peripheral ID of @periph, or -ENOENT on error
131c5acf4a2SSimon Glass 	*/
132c5acf4a2SSimon Glass 	int (*get_periph_id)(struct udevice *dev, struct udevice *periph);
13377eaa19eSSimon Glass 
13477eaa19eSSimon Glass 	/**
13577eaa19eSSimon Glass 	 * get_gpio_mux() - get the mux value for a particular GPIO
13677eaa19eSSimon Glass 	 *
13777eaa19eSSimon Glass 	 * This allows the raw mux value for a GPIO to be obtained. It is
13877eaa19eSSimon Glass 	 * useful for displaying the function being used by that GPIO, such
13977eaa19eSSimon Glass 	 * as with the 'gpio' command. This function is internal to the GPIO
14077eaa19eSSimon Glass 	 * subsystem and should not be used by generic code. Typically it is
14177eaa19eSSimon Glass 	 * used by a GPIO driver with knowledge of the SoC pinctrl setup.
14277eaa19eSSimon Glass 	 *
14377eaa19eSSimon Glass 	* @dev:		Pinctrl device to use
14477eaa19eSSimon Glass 	* @banknum:	GPIO bank number
14577eaa19eSSimon Glass 	* @index:	GPIO index within the bank
14677eaa19eSSimon Glass 	* @return mux value (SoC-specific, e.g. 0 for input, 1 for output)
14777eaa19eSSimon Glass 	 */
14877eaa19eSSimon Glass 	int (*get_gpio_mux)(struct udevice *dev, int banknum, int index);
1496b9191d0SPatrice Chotard 
1506b9191d0SPatrice Chotard 	/**
1516b9191d0SPatrice Chotard 	 * get_pin_muxing() - show pin muxing
1526b9191d0SPatrice Chotard 	 *
1536b9191d0SPatrice Chotard 	 * This allows to display the muxing of a given pin. It's useful for
1546b9191d0SPatrice Chotard 	 * debug purpose to know if a pin is configured as GPIO or as an
1556b9191d0SPatrice Chotard 	 * alternate function and which one.
1566b9191d0SPatrice Chotard 	 * Typically it is used by a PINCTRL driver with knowledge of the SoC
1576b9191d0SPatrice Chotard 	 * pinctrl setup.
1586b9191d0SPatrice Chotard 	 *
1596b9191d0SPatrice Chotard 	 * @dev:	Pinctrl device to use
1606b9191d0SPatrice Chotard 	 * @selector:	Pin selector
1616b9191d0SPatrice Chotard 	 * @buf		Pin's muxing description
1626b9191d0SPatrice Chotard 	 * @size	Pin's muxing description length
1636b9191d0SPatrice Chotard 	 * return 0 if OK, -ve on error
1646b9191d0SPatrice Chotard 	 */
1656b9191d0SPatrice Chotard 	 int (*get_pin_muxing)(struct udevice *dev, unsigned int selector,
1666b9191d0SPatrice Chotard 			       char *buf, int size);
16726ad936dSMarek Vasut 
16826ad936dSMarek Vasut 	/**
16926ad936dSMarek Vasut 	 * gpio_request_enable: requests and enables GPIO on a certain pin.
17026ad936dSMarek Vasut 	 *
17126ad936dSMarek Vasut 	 * @dev:	Pinctrl device to use
17226ad936dSMarek Vasut 	 * @selector:	Pin selector
17326ad936dSMarek Vasut 	 * return 0 if OK, -ve on error
17426ad936dSMarek Vasut 	 */
17526ad936dSMarek Vasut 	int (*gpio_request_enable)(struct udevice *dev, unsigned int selector);
17626ad936dSMarek Vasut 
17726ad936dSMarek Vasut 	/**
17826ad936dSMarek Vasut 	 * gpio_disable_free: free up GPIO muxing on a certain pin.
17926ad936dSMarek Vasut 	 *
18026ad936dSMarek Vasut 	 * @dev:	Pinctrl device to use
18126ad936dSMarek Vasut 	 * @selector:	Pin selector
18226ad936dSMarek Vasut 	 * return 0 if OK, -ve on error
18326ad936dSMarek Vasut 	 */
18426ad936dSMarek Vasut 	int (*gpio_disable_free)(struct udevice *dev, unsigned int selector);
185d90a5a30SMasahiro Yamada };
186d90a5a30SMasahiro Yamada 
187d90a5a30SMasahiro Yamada #define pinctrl_get_ops(dev)	((struct pinctrl_ops *)(dev)->driver->ops)
188d90a5a30SMasahiro Yamada 
189d90a5a30SMasahiro Yamada /**
190d90a5a30SMasahiro Yamada  * Generic pin configuration paramters
191d90a5a30SMasahiro Yamada  *
192d90a5a30SMasahiro Yamada  * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
193d90a5a30SMasahiro Yamada  *	transition from say pull-up to pull-down implies that you disable
194d90a5a30SMasahiro Yamada  *	pull-up in the process, this setting disables all biasing.
195d90a5a30SMasahiro Yamada  * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
196d90a5a30SMasahiro Yamada  *	mode, also know as "third-state" (tristate) or "high-Z" or "floating".
197d90a5a30SMasahiro Yamada  *	On output pins this effectively disconnects the pin, which is useful
198d90a5a30SMasahiro Yamada  *	if for example some other pin is going to drive the signal connected
199d90a5a30SMasahiro Yamada  *	to it for a while. Pins used for input are usually always high
200d90a5a30SMasahiro Yamada  *	impedance.
201d90a5a30SMasahiro Yamada  * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
202d90a5a30SMasahiro Yamada  *	weakly drives the last value on a tristate bus, also known as a "bus
203d90a5a30SMasahiro Yamada  *	holder", "bus keeper" or "repeater". This allows another device on the
204d90a5a30SMasahiro Yamada  *	bus to change the value by driving the bus high or low and switching to
205d90a5a30SMasahiro Yamada  *	tristate. The argument is ignored.
206d90a5a30SMasahiro Yamada  * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
207d90a5a30SMasahiro Yamada  *	impedance to VDD). If the argument is != 0 pull-up is enabled,
208d90a5a30SMasahiro Yamada  *	if it is 0, pull-up is total, i.e. the pin is connected to VDD.
209d90a5a30SMasahiro Yamada  * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
210d90a5a30SMasahiro Yamada  *	impedance to GROUND). If the argument is != 0 pull-down is enabled,
211d90a5a30SMasahiro Yamada  *	if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
212d90a5a30SMasahiro Yamada  * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
213d90a5a30SMasahiro Yamada  *	on embedded knowledge of the controller hardware, like current mux
214d90a5a30SMasahiro Yamada  *	function. The pull direction and possibly strength too will normally
215d90a5a30SMasahiro Yamada  *	be decided completely inside the hardware block and not be readable
216d90a5a30SMasahiro Yamada  *	from the kernel side.
217d90a5a30SMasahiro Yamada  *	If the argument is != 0 pull up/down is enabled, if it is 0, the
218d90a5a30SMasahiro Yamada  *	configuration is ignored. The proper way to disable it is to use
219d90a5a30SMasahiro Yamada  *	@PIN_CONFIG_BIAS_DISABLE.
220d90a5a30SMasahiro Yamada  * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
221d90a5a30SMasahiro Yamada  *	low, this is the most typical case and is typically achieved with two
222d90a5a30SMasahiro Yamada  *	active transistors on the output. Setting this config will enable
223d90a5a30SMasahiro Yamada  *	push-pull mode, the argument is ignored.
224d90a5a30SMasahiro Yamada  * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
225d90a5a30SMasahiro Yamada  *	collector) which means it is usually wired with other output ports
226d90a5a30SMasahiro Yamada  *	which are then pulled up with an external resistor. Setting this
227d90a5a30SMasahiro Yamada  *	config will enable open drain mode, the argument is ignored.
228d90a5a30SMasahiro Yamada  * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
229d90a5a30SMasahiro Yamada  *	(open emitter). Setting this config will enable open source mode, the
230d90a5a30SMasahiro Yamada  *	argument is ignored.
231d90a5a30SMasahiro Yamada  * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
232d90a5a30SMasahiro Yamada  *	passed as argument. The argument is in mA.
233d90a5a30SMasahiro Yamada  * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input.  Note that this does not
234d90a5a30SMasahiro Yamada  *	affect the pin's ability to drive output.  1 enables input, 0 disables
235d90a5a30SMasahiro Yamada  *	input.
236d90a5a30SMasahiro Yamada  * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
237d90a5a30SMasahiro Yamada  *      If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
238d90a5a30SMasahiro Yamada  *      schmitt-trigger mode is disabled.
239d90a5a30SMasahiro Yamada  * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
240d90a5a30SMasahiro Yamada  *	schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
241d90a5a30SMasahiro Yamada  *	the threshold value is given on a custom format as argument when
242d90a5a30SMasahiro Yamada  *	setting pins to this mode.
243d90a5a30SMasahiro Yamada  * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
244d90a5a30SMasahiro Yamada  *	which means it will wait for signals to settle when reading inputs. The
245d90a5a30SMasahiro Yamada  *	argument gives the debounce time in usecs. Setting the
246d90a5a30SMasahiro Yamada  *	argument to zero turns debouncing off.
247d90a5a30SMasahiro Yamada  * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
248d90a5a30SMasahiro Yamada  *	supplies, the argument to this parameter (on a custom format) tells
249d90a5a30SMasahiro Yamada  *	the driver which alternative power source to use.
250d90a5a30SMasahiro Yamada  * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
251d90a5a30SMasahiro Yamada  *	this parameter (on a custom format) tells the driver which alternative
252d90a5a30SMasahiro Yamada  *	slew rate to use.
253d90a5a30SMasahiro Yamada  * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power
254d90a5a30SMasahiro Yamada  *	operation, if several modes of operation are supported these can be
255d90a5a30SMasahiro Yamada  *	passed in the argument on a custom form, else just use argument 1
256d90a5a30SMasahiro Yamada  *	to indicate low power mode, argument 0 turns low power mode off.
257d90a5a30SMasahiro Yamada  * @PIN_CONFIG_OUTPUT: this will configure the pin as an output. Use argument
258d90a5a30SMasahiro Yamada  *	1 to indicate high level, argument 0 to indicate low level. (Please
259d90a5a30SMasahiro Yamada  *	see Documentation/pinctrl.txt, section "GPIO mode pitfalls" for a
260d90a5a30SMasahiro Yamada  *	discussion around this parameter.)
261d90a5a30SMasahiro Yamada  * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
262d90a5a30SMasahiro Yamada  *	you need to pass in custom configurations to the pin controller, use
263d90a5a30SMasahiro Yamada  *	PIN_CONFIG_END+1 as the base offset.
264d90a5a30SMasahiro Yamada  */
265d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_DISABLE			0
266d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_HIGH_IMPEDANCE		1
267d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_BUS_HOLD		2
268d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_PULL_UP			3
269d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_PULL_DOWN		4
270d90a5a30SMasahiro Yamada #define PIN_CONFIG_BIAS_PULL_PIN_DEFAULT	5
271d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_PUSH_PULL		6
272d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_OPEN_DRAIN		7
273d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_OPEN_SOURCE		8
274d90a5a30SMasahiro Yamada #define PIN_CONFIG_DRIVE_STRENGTH		9
275d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_ENABLE			10
276d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_SCHMITT_ENABLE		11
277d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_SCHMITT		12
278d90a5a30SMasahiro Yamada #define PIN_CONFIG_INPUT_DEBOUNCE		13
279d90a5a30SMasahiro Yamada #define PIN_CONFIG_POWER_SOURCE			14
280d90a5a30SMasahiro Yamada #define PIN_CONFIG_SLEW_RATE			15
281d90a5a30SMasahiro Yamada #define PIN_CONFIG_LOW_POWER_MODE		16
282d90a5a30SMasahiro Yamada #define PIN_CONFIG_OUTPUT			17
283d90a5a30SMasahiro Yamada #define PIN_CONFIG_END				0x7FFF
284d90a5a30SMasahiro Yamada 
285d90a5a30SMasahiro Yamada #if CONFIG_IS_ENABLED(PINCTRL_GENERIC)
286d90a5a30SMasahiro Yamada /**
287d90a5a30SMasahiro Yamada  * pinctrl_generic_set_state() - generic set_state operation
288d90a5a30SMasahiro Yamada  * Parse the DT node of @config and its children and handle generic properties
289d90a5a30SMasahiro Yamada  * such as "pins", "groups", "functions", and pin configuration parameters.
290d90a5a30SMasahiro Yamada  *
291d90a5a30SMasahiro Yamada  * @pctldev: pinctrl device
292d90a5a30SMasahiro Yamada  * @config: config device (pseudo device), pointing a config node in DTS
293d90a5a30SMasahiro Yamada  * @return: 0 on success, or negative error code on failure
294d90a5a30SMasahiro Yamada  */
295d90a5a30SMasahiro Yamada int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config);
296d90a5a30SMasahiro Yamada #else
pinctrl_generic_set_state(struct udevice * pctldev,struct udevice * config)297d90a5a30SMasahiro Yamada static inline int pinctrl_generic_set_state(struct udevice *pctldev,
298d90a5a30SMasahiro Yamada 					    struct udevice *config)
299d90a5a30SMasahiro Yamada {
300d90a5a30SMasahiro Yamada 	return -EINVAL;
301d90a5a30SMasahiro Yamada }
302d90a5a30SMasahiro Yamada #endif
303d90a5a30SMasahiro Yamada 
304d90a5a30SMasahiro Yamada #if CONFIG_IS_ENABLED(PINCTRL)
305d90a5a30SMasahiro Yamada /**
306d90a5a30SMasahiro Yamada  * pinctrl_select_state() - set a device to a given state
307d90a5a30SMasahiro Yamada  *
308d90a5a30SMasahiro Yamada  * @dev: peripheral device
309d90a5a30SMasahiro Yamada  * @statename: state name, like "default"
310d90a5a30SMasahiro Yamada  * @return: 0 on success, or negative error code on failure
311d90a5a30SMasahiro Yamada  */
312d90a5a30SMasahiro Yamada int pinctrl_select_state(struct udevice *dev, const char *statename);
313d90a5a30SMasahiro Yamada 
314c5acf4a2SSimon Glass /**
315c5acf4a2SSimon Glass  * pinctrl_request() - Request a particular pinctrl function
316c5acf4a2SSimon Glass  *
317c5acf4a2SSimon Glass  * @dev:	Device to check (UCLASS_PINCTRL)
318c5acf4a2SSimon Glass  * @func:	Function number (driver-specific)
319c5acf4a2SSimon Glass  * @flags:	Flags (driver-specific)
320c5acf4a2SSimon Glass  * @return 0 if OK, -ve on error
321c5acf4a2SSimon Glass  */
322c5acf4a2SSimon Glass int pinctrl_request(struct udevice *dev, int func, int flags);
323c5acf4a2SSimon Glass 
324c5acf4a2SSimon Glass /**
325c5acf4a2SSimon Glass  * pinctrl_request_noflags() - Request a particular pinctrl function
326c5acf4a2SSimon Glass  *
327c5acf4a2SSimon Glass  * This is similar to pinctrl_request() but uses 0 for @flags.
328c5acf4a2SSimon Glass  *
329c5acf4a2SSimon Glass  * @dev:	Device to check (UCLASS_PINCTRL)
330c5acf4a2SSimon Glass  * @func:	Function number (driver-specific)
331c5acf4a2SSimon Glass  * @return 0 if OK, -ve on error
332c5acf4a2SSimon Glass  */
333c5acf4a2SSimon Glass int pinctrl_request_noflags(struct udevice *dev, int func);
334c5acf4a2SSimon Glass 
335c5acf4a2SSimon Glass /**
336c5acf4a2SSimon Glass  * pinctrl_get_periph_id() - get the peripheral ID for a device
337c5acf4a2SSimon Glass  *
338c5acf4a2SSimon Glass  * This generally looks at the peripheral's device tree node to work out the
339c5acf4a2SSimon Glass  * peripheral ID. The return value is normally interpreted as enum periph_id.
340c5acf4a2SSimon Glass  * so long as this is defined by the platform (which it should be).
341c5acf4a2SSimon Glass  *
342c5acf4a2SSimon Glass  * @dev:	Pinctrl device to use for decoding
343c5acf4a2SSimon Glass  * @periph:	Device to check
344c5acf4a2SSimon Glass  * @return peripheral ID of @periph, or -ENOENT on error
345c5acf4a2SSimon Glass  */
346c5acf4a2SSimon Glass int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph);
347c5acf4a2SSimon Glass 
34852db39a2SSimon Glass /**
34952db39a2SSimon Glass  * pinctrl_decode_pin_config() - decode pin configuration flags
35052db39a2SSimon Glass  *
35152db39a2SSimon Glass  * This decodes some of the PIN_CONFIG values into flags, with each value
35252db39a2SSimon Glass  * being (1 << pin_cfg). This does not support things with values like the
35352db39a2SSimon Glass  * slew rate.
35452db39a2SSimon Glass  *
35552db39a2SSimon Glass  * @blob:	Device tree blob
35652db39a2SSimon Glass  * @node:	Node containing the PIN_CONFIG values
35752db39a2SSimon Glass  * @return decoded flag value, or -ve on error
35852db39a2SSimon Glass  */
35952db39a2SSimon Glass int pinctrl_decode_pin_config(const void *blob, int node);
36052db39a2SSimon Glass 
36177eaa19eSSimon Glass /**
36277eaa19eSSimon Glass  * pinctrl_get_gpio_mux() - get the mux value for a particular GPIO
36377eaa19eSSimon Glass  *
36477eaa19eSSimon Glass  * This allows the raw mux value for a GPIO to be obtained. It is
36577eaa19eSSimon Glass  * useful for displaying the function being used by that GPIO, such
36677eaa19eSSimon Glass  * as with the 'gpio' command. This function is internal to the GPIO
36777eaa19eSSimon Glass  * subsystem and should not be used by generic code. Typically it is
36877eaa19eSSimon Glass  * used by a GPIO driver with knowledge of the SoC pinctrl setup.
36977eaa19eSSimon Glass  *
37077eaa19eSSimon Glass  * @dev:	Pinctrl device to use
37177eaa19eSSimon Glass  * @banknum:	GPIO bank number
37277eaa19eSSimon Glass  * @index:	GPIO index within the bank
37377eaa19eSSimon Glass  * @return mux value (SoC-specific, e.g. 0 for input, 1 for output)
37477eaa19eSSimon Glass */
37577eaa19eSSimon Glass int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index);
37677eaa19eSSimon Glass 
37733f8d8a6SJianqun Xu /**
37833f8d8a6SJianqun Xu  * pinctrl_get_pins_count() - get the total pins count for all GPIOs
37933f8d8a6SJianqun Xu  *
38033f8d8a6SJianqun Xu  * This allows the total pins count for all GPIO to be obtained.
38133f8d8a6SJianqun Xu  *
38233f8d8a6SJianqun Xu  * @dev:	Pinctrl device to use
38333f8d8a6SJianqun Xu  * @return pins count
38433f8d8a6SJianqun Xu */
38533f8d8a6SJianqun Xu int pinctrl_get_pins_count(struct udevice *dev);
386942638a9SPatrice Chotard 
387942638a9SPatrice Chotard /**
388942638a9SPatrice Chotard  * pinctrl_get_pin_name() - Returns the pin's name
389942638a9SPatrice Chotard  *
390942638a9SPatrice Chotard  * This allows to display the pin's name for debug purpose
391942638a9SPatrice Chotard  *
392942638a9SPatrice Chotard  * @dev:	Pinctrl device to use
393942638a9SPatrice Chotard  * @selector	Pin index within pin-controller
394942638a9SPatrice Chotard  * @buf		Pin's name
395942638a9SPatrice Chotard  * @return 0 if OK, -ve on error
396942638a9SPatrice Chotard  */
397942638a9SPatrice Chotard int pinctrl_get_pin_name(struct udevice *dev, int selector, char *buf,
398942638a9SPatrice Chotard 			 int size);
399942638a9SPatrice Chotard 
4006b9191d0SPatrice Chotard /**
4016b9191d0SPatrice Chotard  * pinctrl_get_pin_muxing() - Returns the muxing description
4026b9191d0SPatrice Chotard  *
4036b9191d0SPatrice Chotard  * This allows to display the muxing description of the given pin for
4046b9191d0SPatrice Chotard  * debug purpose
4056b9191d0SPatrice Chotard  *
4066b9191d0SPatrice Chotard  * @dev:	Pinctrl device to use
4076b9191d0SPatrice Chotard  * @selector	Pin index within pin-controller
4086b9191d0SPatrice Chotard  * @buf		Pin's muxing description
4096b9191d0SPatrice Chotard  * @size	Pin's muxing description length
4106b9191d0SPatrice Chotard  * @return 0 if OK, -ve on error
4116b9191d0SPatrice Chotard  */
4126b9191d0SPatrice Chotard int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf,
4136b9191d0SPatrice Chotard 			   int size);
4146b9191d0SPatrice Chotard 
41526ad936dSMarek Vasut /**
41626ad936dSMarek Vasut  * pinctrl_gpio_request() - request a single pin to be used as GPIO
41726ad936dSMarek Vasut  *
41826ad936dSMarek Vasut  * @dev: GPIO peripheral device
41926ad936dSMarek Vasut  * @offset: the GPIO pin offset from the GPIO controller
42026ad936dSMarek Vasut  * @return: 0 on success, or negative error code on failure
42126ad936dSMarek Vasut  */
42226ad936dSMarek Vasut int pinctrl_gpio_request(struct udevice *dev, unsigned offset);
42326ad936dSMarek Vasut 
42426ad936dSMarek Vasut /**
42526ad936dSMarek Vasut  * pinctrl_gpio_free() - free a single pin used as GPIO
42626ad936dSMarek Vasut  *
42726ad936dSMarek Vasut  * @dev: GPIO peripheral device
42826ad936dSMarek Vasut  * @offset: the GPIO pin offset from the GPIO controller
42926ad936dSMarek Vasut  * @return: 0 on success, or negative error code on failure
43026ad936dSMarek Vasut  */
43126ad936dSMarek Vasut int pinctrl_gpio_free(struct udevice *dev, unsigned offset);
43226ad936dSMarek Vasut 
433d3acdc96SJianqun Xu #else
pinctrl_select_state(struct udevice * dev,const char * statename)434d3acdc96SJianqun Xu static inline int pinctrl_select_state(struct udevice *dev,
435d3acdc96SJianqun Xu 				       const char *statename)
436d3acdc96SJianqun Xu {
437d3acdc96SJianqun Xu 	return -EINVAL;
438d3acdc96SJianqun Xu }
439d3acdc96SJianqun Xu 
pinctrl_request(struct udevice * dev,int func,int flags)440d3acdc96SJianqun Xu static inline int pinctrl_request(struct udevice *dev, int func, int flags)
441d3acdc96SJianqun Xu {
442d3acdc96SJianqun Xu 	return -EINVAL;
443d3acdc96SJianqun Xu }
444d3acdc96SJianqun Xu 
pinctrl_request_noflags(struct udevice * dev,int func)445d3acdc96SJianqun Xu static inline int pinctrl_request_noflags(struct udevice *dev, int func)
446d3acdc96SJianqun Xu {
447d3acdc96SJianqun Xu 	return -EINVAL;
448d3acdc96SJianqun Xu }
449d3acdc96SJianqun Xu 
pinctrl_get_periph_id(struct udevice * dev,struct udevice * periph)450d3acdc96SJianqun Xu static inline int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph)
451d3acdc96SJianqun Xu {
452d3acdc96SJianqun Xu 	return -EINVAL;
453d3acdc96SJianqun Xu }
454d3acdc96SJianqun Xu 
pinctrl_decode_pin_config(const void * blob,int node)455d3acdc96SJianqun Xu static inline int pinctrl_decode_pin_config(const void *blob, int node)
456d3acdc96SJianqun Xu {
457d3acdc96SJianqun Xu 	return -EINVAL;
458d3acdc96SJianqun Xu }
459d3acdc96SJianqun Xu 
pinctrl_get_gpio_mux(struct udevice * dev,int banknum,int index)460d3acdc96SJianqun Xu static inline int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index)
461d3acdc96SJianqun Xu {
462d3acdc96SJianqun Xu 	return -EINVAL;
463d3acdc96SJianqun Xu }
464d3acdc96SJianqun Xu 
pinctrl_get_pins_count(struct udevice * dev)465d3acdc96SJianqun Xu static inline int pinctrl_get_pins_count(struct udevice *dev)
466d3acdc96SJianqun Xu {
467d3acdc96SJianqun Xu 	return -EINVAL;
468d3acdc96SJianqun Xu }
469942638a9SPatrice Chotard 
pinctrl_get_pin_name(struct udevice * dev,int selector,char * buf,int size)470942638a9SPatrice Chotard static inline int pinctrl_get_pin_name(struct udevice *dev, int selector, char *buf,
471942638a9SPatrice Chotard 			 int size)
472942638a9SPatrice Chotard {
473942638a9SPatrice Chotard 	return -EINVAL;
474942638a9SPatrice Chotard }
475942638a9SPatrice Chotard 
pinctrl_get_pin_muxing(struct udevice * dev,int selector,char * buf,int size)4766b9191d0SPatrice Chotard static inline int pinctrl_get_pin_muxing(struct udevice *dev, int selector, char *buf,
4776b9191d0SPatrice Chotard 			   int size)
4786b9191d0SPatrice Chotard {
4796b9191d0SPatrice Chotard 	return -EINVAL;
4806b9191d0SPatrice Chotard }
4816b9191d0SPatrice Chotard 
pinctrl_gpio_request(struct udevice * dev,unsigned offset)48226ad936dSMarek Vasut static inline int pinctrl_gpio_request(struct udevice *dev, unsigned offset)
48326ad936dSMarek Vasut {
48426ad936dSMarek Vasut 	return -EINVAL;
48526ad936dSMarek Vasut }
48626ad936dSMarek Vasut 
pinctrl_gpio_free(struct udevice * dev,unsigned offset)48726ad936dSMarek Vasut static inline int pinctrl_gpio_free(struct udevice *dev, unsigned offset)
48826ad936dSMarek Vasut {
48926ad936dSMarek Vasut 	return -EINVAL;
49026ad936dSMarek Vasut }
49126ad936dSMarek Vasut 
492d3acdc96SJianqun Xu #endif
49333f8d8a6SJianqun Xu 
494d90a5a30SMasahiro Yamada #endif /* __PINCTRL_H */
495