xref: /rk3399_rockchip-uboot/include/configs/zynq-common.h (revision e83f61a6b3c1123b5fede849cd2a426df1d3b9d1)
1 /*
2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3  * (C) Copyright 2013 Xilinx, Inc.
4  *
5  * Common configuration options for all Zynq boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12 
13 /* High Level configuration Options */
14 #define CONFIG_ARMV7
15 #define CONFIG_ZYNQ
16 
17 /* CPU clock */
18 #ifndef CONFIG_CPU_FREQ_HZ
19 # define CONFIG_CPU_FREQ_HZ	800000000
20 #endif
21 
22 /* Cache options */
23 #define CONFIG_CMD_CACHE
24 #define CONFIG_SYS_CACHELINE_SIZE	32
25 
26 #define CONFIG_SYS_L2CACHE_OFF
27 #ifndef CONFIG_SYS_L2CACHE_OFF
28 # define CONFIG_SYS_L2_PL310
29 # define CONFIG_SYS_PL310_BASE		0xf8f02000
30 #endif
31 
32 /* Serial drivers */
33 #define CONFIG_BAUDRATE		115200
34 /* The following table includes the supported baudrates */
35 #define CONFIG_SYS_BAUDRATE_TABLE  \
36 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
37 
38 /* Zynq Serial driver */
39 #ifdef CONFIG_ZYNQ_SERIAL_UART0
40 # define CONFIG_ZYNQ_SERIAL_BASEADDR0	0xE0000000
41 # define CONFIG_ZYNQ_SERIAL_BAUDRATE0	CONFIG_BAUDRATE
42 # define CONFIG_ZYNQ_SERIAL_CLOCK0	50000000
43 #endif
44 
45 #ifdef CONFIG_ZYNQ_SERIAL_UART1
46 # define CONFIG_ZYNQ_SERIAL_BASEADDR1	0xE0001000
47 # define CONFIG_ZYNQ_SERIAL_BAUDRATE1	CONFIG_BAUDRATE
48 # define CONFIG_ZYNQ_SERIAL_CLOCK1	50000000
49 #endif
50 
51 #if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1)
52 # define CONFIG_ZYNQ_SERIAL
53 #endif
54 
55 /* DCC driver */
56 #if defined(CONFIG_ZYNQ_DCC)
57 # define CONFIG_ARM_DCC
58 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
59 #endif
60 
61 /* Ethernet driver */
62 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
63 # define CONFIG_NET_MULTI
64 # define CONFIG_ZYNQ_GEM
65 # define CONFIG_MII
66 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
67 # define CONFIG_PHYLIB
68 # define CONFIG_PHY_MARVELL
69 #endif
70 
71 /* SPI */
72 #ifdef CONFIG_ZYNQ_SPI
73 # define CONFIG_SPI_FLASH
74 # define CONFIG_SPI_FLASH_SST
75 # define CONFIG_CMD_SF
76 #endif
77 
78 /* NOR */
79 #ifndef CONFIG_SYS_NO_FLASH
80 # define CONFIG_SYS_FLASH_BASE		0xE2000000
81 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
82 # define CONFIG_SYS_MAX_FLASH_BANKS	1
83 # define CONFIG_SYS_MAX_FLASH_SECT	512
84 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
85 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
86 # define CONFIG_FLASH_SHOW_PROGRESS	10
87 # define CONFIG_SYS_FLASH_CFI
88 # undef CONFIG_SYS_FLASH_EMPTY_INFO
89 # define CONFIG_FLASH_CFI_DRIVER
90 # undef CONFIG_SYS_FLASH_PROTECTION
91 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
92 #endif
93 
94 /* MMC */
95 #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
96 # define CONFIG_MMC
97 # define CONFIG_GENERIC_MMC
98 # define CONFIG_SDHCI
99 # define CONFIG_ZYNQ_SDHCI
100 # define CONFIG_CMD_MMC
101 # define CONFIG_CMD_FAT
102 # define CONFIG_SUPPORT_VFAT
103 # define CONFIG_CMD_EXT2
104 # define CONFIG_DOS_PARTITION
105 #endif
106 
107 /* I2C */
108 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
109 # define CONFIG_CMD_I2C
110 # define CONFIG_SYS_I2C
111 # define CONFIG_SYS_I2C_ZYNQ
112 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
113 # define CONFIG_SYS_I2C_ZYNQ_SLAVE		1
114 #endif
115 
116 /* EEPROM */
117 #ifdef CONFIG_ZYNQ_EEPROM
118 # define CONFIG_CMD_EEPROM
119 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
120 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
121 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
122 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
123 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
124 #endif
125 
126 #define CONFIG_BOOTP_SERVERIP
127 #define CONFIG_BOOTP_BOOTPATH
128 #define CONFIG_BOOTP_GATEWAY
129 #define CONFIG_BOOTP_HOSTNAME
130 #define CONFIG_BOOTP_MAY_FAIL
131 
132 /* Environment */
133 #define CONFIG_ENV_SIZE		0x10000 /* Env. sector size */
134 #define CONFIG_ENV_IS_NOWHERE
135 
136 /* Default environment */
137 #define CONFIG_EXTRA_ENV_SETTINGS	\
138 	"fit_image=fit.itb\0"		\
139 	"load_addr=0x2000000\0"		\
140 	"fit_size=0x800000\0"		\
141 	"flash_off=0x100000\0"		\
142 	"nor_flash_off=0xE2100000\0"	\
143 	"fdt_high=0x20000000\0"		\
144 	"initrd_high=0x20000000\0"	\
145 	"norboot=echo Copying FIT from NOR flash to RAM... && " \
146 		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
147 		"bootm ${load_addr}\0" \
148 	"sdboot=echo Copying FIT from SD to RAM... && " \
149 		"fatload mmc 0 ${load_addr} ${fit_image} && " \
150 		"bootm ${load_addr}\0" \
151 	"jtagboot=echo TFTPing FIT to RAM... && " \
152 		"tftp ${load_addr} ${fit_image} && " \
153 		"bootm ${load_addr}\0"
154 #define CONFIG_BOOTCOMMAND		"run $modeboot"
155 #define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
156 #define CONFIG_SYS_LOAD_ADDR		0 /* default? */
157 
158 /* Miscellaneous configurable options */
159 #define CONFIG_SYS_PROMPT		"zynq-uboot> "
160 #define CONFIG_SYS_HUSH_PARSER
161 
162 #define CONFIG_CMDLINE_EDITING
163 #define CONFIG_AUTO_COMPLETE
164 #define CONFIG_BOARD_LATE_INIT
165 #define CONFIG_SYS_LONGHELP
166 #define CONFIG_SYS_MAXARGS		15 /* max number of command args */
167 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
168 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
169 					sizeof(CONFIG_SYS_PROMPT) + 16)
170 
171 /* Physical Memory map */
172 #define CONFIG_SYS_TEXT_BASE		0x4000000
173 
174 #define CONFIG_NR_DRAM_BANKS		1
175 #define CONFIG_SYS_SDRAM_BASE		0
176 
177 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
178 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)
179 
180 #define CONFIG_SYS_MALLOC_LEN		0x400000
181 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
182 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
183 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
184 					CONFIG_SYS_INIT_RAM_SIZE - \
185 					GENERATED_GBL_DATA_SIZE)
186 
187 /* Enable the PL to be downloaded */
188 #define CONFIG_FPGA
189 #define CONFIG_FPGA_XILINX
190 #define CONFIG_FPGA_ZYNQPL
191 #define CONFIG_CMD_FPGA
192 
193 /* Open Firmware flat tree */
194 #define CONFIG_OF_LIBFDT
195 
196 /* FIT support */
197 #define CONFIG_FIT
198 #define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */
199 
200 /* Boot FreeBSD/vxWorks from an ELF image */
201 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
202 # define CONFIG_API
203 # define CONFIG_CMD_ELF
204 # define CONFIG_SYS_MMC_MAX_DEVICE	1
205 #endif
206 
207 /* Commands */
208 #include <config_cmd_default.h>
209 
210 #define CONFIG_CMD_PING
211 #define CONFIG_CMD_DHCP
212 #define CONFIG_CMD_MII
213 
214 #endif /* __CONFIG_ZYNQ_COMMON_H */
215