1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_CMD_CACHE 20 #define CONFIG_SYS_CACHELINE_SIZE 32 21 22 #define CONFIG_SYS_L2CACHE_OFF 23 #ifndef CONFIG_SYS_L2CACHE_OFF 24 # define CONFIG_SYS_L2_PL310 25 # define CONFIG_SYS_PL310_BASE 0xf8f02000 26 #endif 27 28 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 29 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 30 #define CONFIG_SYS_TIMER_COUNTS_DOWN 31 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 32 33 /* Serial drivers */ 34 #define CONFIG_BAUDRATE 115200 35 /* The following table includes the supported baudrates */ 36 #define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 #define CONFIG_ARM_DCC 40 #define CONFIG_ZYNQ_SERIAL 41 42 #define CONFIG_ZYNQ_GPIO 43 44 /* Ethernet driver */ 45 #if defined(CONFIG_ZYNQ_GEM) 46 # define CONFIG_MII 47 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 48 # define CONFIG_PHY_MARVELL 49 # define CONFIG_PHY_REALTEK 50 # define CONFIG_PHY_XILINX 51 # define CONFIG_BOOTP_SERVERIP 52 # define CONFIG_BOOTP_BOOTPATH 53 # define CONFIG_BOOTP_GATEWAY 54 # define CONFIG_BOOTP_HOSTNAME 55 # define CONFIG_BOOTP_MAY_FAIL 56 #endif 57 58 /* SPI */ 59 #ifdef CONFIG_ZYNQ_SPI 60 # define CONFIG_CMD_SF 61 #endif 62 63 /* QSPI */ 64 #ifdef CONFIG_ZYNQ_QSPI 65 # define CONFIG_SF_DEFAULT_SPEED 30000000 66 # define CONFIG_SPI_FLASH_ISSI 67 # define CONFIG_CMD_SF 68 #endif 69 70 /* NOR */ 71 #ifndef CONFIG_SYS_NO_FLASH 72 # define CONFIG_SYS_FLASH_BASE 0xE2000000 73 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 74 # define CONFIG_SYS_MAX_FLASH_BANKS 1 75 # define CONFIG_SYS_MAX_FLASH_SECT 512 76 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 77 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 78 # define CONFIG_FLASH_SHOW_PROGRESS 10 79 # define CONFIG_SYS_FLASH_CFI 80 # undef CONFIG_SYS_FLASH_EMPTY_INFO 81 # define CONFIG_FLASH_CFI_DRIVER 82 # undef CONFIG_SYS_FLASH_PROTECTION 83 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 84 #endif 85 86 /* MMC */ 87 #if defined(CONFIG_ZYNQ_SDHCI) 88 # define CONFIG_MMC 89 # define CONFIG_GENERIC_MMC 90 # define CONFIG_SDHCI 91 # define CONFIG_CMD_MMC 92 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 93 #endif 94 95 #ifdef CONFIG_ZYNQ_USB 96 # define CONFIG_USB_EHCI 97 # define CONFIG_CMD_USB 98 # define CONFIG_USB_STORAGE 99 # define CONFIG_USB_EHCI_ZYNQ 100 # define CONFIG_EHCI_IS_TDI 101 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 102 103 # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ 104 # define CONFIG_USB_GADGET_DUALSPEED 105 # define CONFIG_USB_GADGET_DOWNLOAD 106 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 107 # define DFU_DEFAULT_POLL_TIMEOUT 300 108 # define CONFIG_USB_FUNCTION_DFU 109 # define CONFIG_DFU_RAM 110 # define CONFIG_USB_GADGET_VBUS_DRAW 2 111 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD 112 # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 113 # define CONFIG_G_DNL_MANUFACTURER "Xilinx" 114 # define CONFIG_USB_CABLE_CHECK 115 # define CONFIG_CMD_DFU 116 # define CONFIG_CMD_THOR_DOWNLOAD 117 # define CONFIG_USB_FUNCTION_THOR 118 # define DFU_ALT_INFO_RAM \ 119 "dfu_ram_info=" \ 120 "set dfu_alt_info " \ 121 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 122 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 123 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 124 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 125 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 126 127 # if defined(CONFIG_ZYNQ_SDHCI) 128 # define CONFIG_DFU_MMC 129 # define DFU_ALT_INFO_MMC \ 130 "dfu_mmc_info=" \ 131 "set dfu_alt_info " \ 132 "${kernel_image} fat 0 1\\\\;" \ 133 "${devicetree_image} fat 0 1\\\\;" \ 134 "${ramdisk_image} fat 0 1\0" \ 135 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 136 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 137 138 # define DFU_ALT_INFO \ 139 DFU_ALT_INFO_RAM \ 140 DFU_ALT_INFO_MMC 141 # else 142 # define DFU_ALT_INFO \ 143 DFU_ALT_INFO_RAM 144 # endif 145 #endif 146 147 #if !defined(DFU_ALT_INFO) 148 # define DFU_ALT_INFO 149 #endif 150 151 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) 152 # define CONFIG_SUPPORT_VFAT 153 # define CONFIG_CMD_FAT 154 # define CONFIG_CMD_EXT2 155 # define CONFIG_FAT_WRITE 156 # define CONFIG_DOS_PARTITION 157 # define CONFIG_CMD_EXT4 158 # define CONFIG_CMD_EXT4_WRITE 159 # define CONFIG_CMD_FS_GENERIC 160 #endif 161 162 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 163 #define CONFIG_SYS_I2C_ZYNQ 164 #endif 165 166 /* I2C */ 167 #if defined(CONFIG_SYS_I2C_ZYNQ) 168 # define CONFIG_CMD_I2C 169 # define CONFIG_SYS_I2C 170 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 171 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 172 #endif 173 174 /* EEPROM */ 175 #ifdef CONFIG_ZYNQ_EEPROM 176 # define CONFIG_CMD_EEPROM 177 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 178 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 179 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 180 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 181 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 182 #endif 183 184 /* Total Size of Environment Sector */ 185 #define CONFIG_ENV_SIZE (128 << 10) 186 187 /* Allow to overwrite serial and ethaddr */ 188 #define CONFIG_ENV_OVERWRITE 189 190 /* Environment */ 191 #ifndef CONFIG_ENV_IS_NOWHERE 192 # ifndef CONFIG_SYS_NO_FLASH 193 /* Environment in NOR flash */ 194 # define CONFIG_ENV_IS_IN_FLASH 195 # elif defined(CONFIG_ZYNQ_QSPI) 196 /* Environment in Serial Flash */ 197 # define CONFIG_ENV_IS_IN_SPI_FLASH 198 # elif defined(CONFIG_SYS_NO_FLASH) 199 # define CONFIG_ENV_IS_NOWHERE 200 # endif 201 202 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 203 # define CONFIG_ENV_OFFSET 0xE0000 204 #endif 205 206 /* Default environment */ 207 #ifndef CONFIG_EXTRA_ENV_SETTINGS 208 #define CONFIG_EXTRA_ENV_SETTINGS \ 209 "fit_image=fit.itb\0" \ 210 "load_addr=0x2000000\0" \ 211 "fit_size=0x800000\0" \ 212 "flash_off=0x100000\0" \ 213 "nor_flash_off=0xE2100000\0" \ 214 "fdt_high=0x20000000\0" \ 215 "initrd_high=0x20000000\0" \ 216 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 217 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 218 "bootm ${load_addr}\0" \ 219 "sdboot=echo Copying FIT from SD to RAM... && " \ 220 "load mmc 0 ${load_addr} ${fit_image} && " \ 221 "bootm ${load_addr}\0" \ 222 "jtagboot=echo TFTPing FIT to RAM... && " \ 223 "tftpboot ${load_addr} ${fit_image} && " \ 224 "bootm ${load_addr}\0" \ 225 "usbboot=if usb start; then " \ 226 "echo Copying FIT from USB to RAM... && " \ 227 "load usb 0 ${load_addr} ${fit_image} && " \ 228 "bootm ${load_addr}; fi\0" \ 229 DFU_ALT_INFO 230 #endif 231 232 #define CONFIG_BOOTCOMMAND "run $modeboot" 233 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ 234 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 235 236 /* Miscellaneous configurable options */ 237 #define CONFIG_SYS_HUSH_PARSER 238 239 #define CONFIG_CMDLINE_EDITING 240 #define CONFIG_AUTO_COMPLETE 241 #define CONFIG_BOARD_LATE_INIT 242 #define CONFIG_DISPLAY_BOARDINFO 243 #define CONFIG_SYS_LONGHELP 244 #define CONFIG_CLOCKS 245 #define CONFIG_CMD_CLK 246 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 247 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 249 sizeof(CONFIG_SYS_PROMPT) + 16) 250 251 /* Physical Memory map */ 252 #define CONFIG_SYS_TEXT_BASE 0x4000000 253 254 #define CONFIG_NR_DRAM_BANKS 1 255 #define CONFIG_SYS_SDRAM_BASE 0 256 257 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 258 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 259 260 #define CONFIG_SYS_MALLOC_LEN 0x1400000 261 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE 262 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 263 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 264 CONFIG_SYS_INIT_RAM_SIZE - \ 265 GENERATED_GBL_DATA_SIZE) 266 267 /* Enable the PL to be downloaded */ 268 #define CONFIG_FPGA 269 #define CONFIG_FPGA_XILINX 270 #define CONFIG_FPGA_ZYNQPL 271 #define CONFIG_CMD_FPGA_LOADMK 272 #define CONFIG_CMD_FPGA_LOADP 273 #define CONFIG_CMD_FPGA_LOADBP 274 #define CONFIG_CMD_FPGA_LOADFS 275 276 /* FIT support */ 277 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 278 279 /* FDT support */ 280 #define CONFIG_DISPLAY_BOARDINFO_LATE 281 282 /* Extend size of kernel image for uncompression */ 283 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 284 285 /* Boot FreeBSD/vxWorks from an ELF image */ 286 #define CONFIG_SYS_MMC_MAX_DEVICE 1 287 288 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 289 290 /* Commands */ 291 #define CONFIG_CMD_PING 292 #define CONFIG_CMD_DHCP 293 #define CONFIG_CMD_MII 294 #define CONFIG_CMD_TFTPPUT 295 296 /* SPL part */ 297 #define CONFIG_CMD_SPL 298 #define CONFIG_SPL_FRAMEWORK 299 #define CONFIG_SPL_LIBCOMMON_SUPPORT 300 #define CONFIG_SPL_LIBGENERIC_SUPPORT 301 #define CONFIG_SPL_SERIAL_SUPPORT 302 #define CONFIG_SPL_BOARD_INIT 303 #define CONFIG_SPL_RAM_DEVICE 304 305 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 306 307 /* MMC support */ 308 #ifdef CONFIG_ZYNQ_SDHCI 309 #define CONFIG_SPL_MMC_SUPPORT 310 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 311 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 312 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 313 #define CONFIG_SPL_LIBDISK_SUPPORT 314 #define CONFIG_SPL_FAT_SUPPORT 315 #ifdef CONFIG_OF_SEPARATE 316 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" 317 #else 318 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 319 #endif 320 #endif 321 322 /* Disable dcache for SPL just for sure */ 323 #ifdef CONFIG_SPL_BUILD 324 #define CONFIG_SYS_DCACHE_OFF 325 #undef CONFIG_FPGA 326 #endif 327 328 /* Address in RAM where the parameters must be copied by SPL. */ 329 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 330 331 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 332 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 333 334 /* Not using MMC raw mode - just for compilation purpose */ 335 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 336 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 337 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 338 339 /* qspi mode is working fine */ 340 #ifdef CONFIG_ZYNQ_QSPI 341 #define CONFIG_SPL_SPI_SUPPORT 342 #define CONFIG_SPL_SPI_LOAD 343 #define CONFIG_SPL_SPI_FLASH_SUPPORT 344 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 345 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 346 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 347 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 348 CONFIG_SYS_SPI_ARGS_SIZE) 349 #endif 350 351 /* for booting directly linux */ 352 #define CONFIG_SPL_OS_BOOT 353 354 /* SP location before relocation, must use scratch RAM */ 355 #define CONFIG_SPL_TEXT_BASE 0x0 356 357 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 358 #define CONFIG_SPL_MAX_SIZE 0x30000 359 360 /* The highest 64k OCM address */ 361 #define OCM_HIGH_ADDR 0xffff0000 362 363 /* On the top of OCM space */ 364 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 365 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 366 367 /* 368 * SPL stack position - and stack goes down 369 * 0xfffffe00 is used for putting wfi loop. 370 * Set it up as limit for now. 371 */ 372 #define CONFIG_SPL_STACK 0xfffffe00 373 374 /* BSS setup */ 375 #define CONFIG_SPL_BSS_START_ADDR 0x100000 376 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 377 378 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 379 380 381 #endif /* __CONFIG_ZYNQ_COMMON_H */ 382