1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_CMD_CACHE 20 #define CONFIG_SYS_CACHELINE_SIZE 32 21 22 #define CONFIG_SYS_L2CACHE_OFF 23 #ifndef CONFIG_SYS_L2CACHE_OFF 24 # define CONFIG_SYS_L2_PL310 25 # define CONFIG_SYS_PL310_BASE 0xf8f02000 26 #endif 27 28 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 29 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 30 #define CONFIG_SYS_TIMER_COUNTS_DOWN 31 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 32 33 /* Serial drivers */ 34 #define CONFIG_BAUDRATE 115200 35 /* The following table includes the supported baudrates */ 36 #define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* DCC driver */ 40 #if defined(CONFIG_ZYNQ_DCC) 41 # define CONFIG_ARM_DCC 42 #else 43 # define CONFIG_ZYNQ_SERIAL 44 #endif 45 46 #define CONFIG_ZYNQ_GPIO 47 48 /* Ethernet driver */ 49 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) 50 # define CONFIG_ZYNQ_GEM 51 # define CONFIG_MII 52 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 53 # define CONFIG_PHY_MARVELL 54 # define CONFIG_BOOTP_SERVERIP 55 # define CONFIG_BOOTP_BOOTPATH 56 # define CONFIG_BOOTP_GATEWAY 57 # define CONFIG_BOOTP_HOSTNAME 58 # define CONFIG_BOOTP_MAY_FAIL 59 #endif 60 61 /* SPI */ 62 #ifdef CONFIG_ZYNQ_SPI 63 # define CONFIG_CMD_SF 64 #endif 65 66 /* QSPI */ 67 #ifdef CONFIG_ZYNQ_QSPI 68 # define CONFIG_SF_DEFAULT_SPEED 30000000 69 # define CONFIG_SPI_FLASH_ISSI 70 # define CONFIG_SPI_FLASH_BAR 71 # define CONFIG_CMD_SF 72 #endif 73 74 /* NOR */ 75 #ifndef CONFIG_SYS_NO_FLASH 76 # define CONFIG_SYS_FLASH_BASE 0xE2000000 77 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 78 # define CONFIG_SYS_MAX_FLASH_BANKS 1 79 # define CONFIG_SYS_MAX_FLASH_SECT 512 80 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 81 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 82 # define CONFIG_FLASH_SHOW_PROGRESS 10 83 # define CONFIG_SYS_FLASH_CFI 84 # undef CONFIG_SYS_FLASH_EMPTY_INFO 85 # define CONFIG_FLASH_CFI_DRIVER 86 # undef CONFIG_SYS_FLASH_PROTECTION 87 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 88 #endif 89 90 /* MMC */ 91 #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) 92 # define CONFIG_MMC 93 # define CONFIG_GENERIC_MMC 94 # define CONFIG_SDHCI 95 # define CONFIG_ZYNQ_SDHCI 96 # define CONFIG_CMD_MMC 97 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 98 #endif 99 100 #ifdef CONFIG_ZYNQ_USB 101 # define CONFIG_USB_EHCI 102 # define CONFIG_CMD_USB 103 # define CONFIG_USB_STORAGE 104 # define CONFIG_USB_EHCI_ZYNQ 105 # define CONFIG_USB_ULPI_VIEWPORT 106 # define CONFIG_USB_ULPI 107 # define CONFIG_EHCI_IS_TDI 108 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 109 110 # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ 111 # define CONFIG_USB_GADGET 112 # define CONFIG_USB_GADGET_DUALSPEED 113 # define CONFIG_USB_GADGET_DOWNLOAD 114 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 115 # define DFU_DEFAULT_POLL_TIMEOUT 300 116 # define CONFIG_USB_FUNCTION_DFU 117 # define CONFIG_DFU_RAM 118 # define CONFIG_USB_GADGET_VBUS_DRAW 2 119 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD 120 # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 121 # define CONFIG_G_DNL_MANUFACTURER "Xilinx" 122 # define CONFIG_USB_GADGET 123 # define CONFIG_USB_CABLE_CHECK 124 # define CONFIG_CMD_DFU 125 # define CONFIG_CMD_THOR_DOWNLOAD 126 # define CONFIG_USB_FUNCTION_THOR 127 # define DFU_ALT_INFO_RAM \ 128 "dfu_ram_info=" \ 129 "set dfu_alt_info " \ 130 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 131 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 132 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 133 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 134 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 135 136 # if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) 137 # define CONFIG_DFU_MMC 138 # define DFU_ALT_INFO_MMC \ 139 "dfu_mmc_info=" \ 140 "set dfu_alt_info " \ 141 "${kernel_image} fat 0 1\\\\;" \ 142 "${devicetree_image} fat 0 1\\\\;" \ 143 "${ramdisk_image} fat 0 1\0" \ 144 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 145 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 146 147 # define DFU_ALT_INFO \ 148 DFU_ALT_INFO_RAM \ 149 DFU_ALT_INFO_MMC 150 # else 151 # define DFU_ALT_INFO \ 152 DFU_ALT_INFO_RAM 153 # endif 154 #endif 155 156 #if !defined(DFU_ALT_INFO) 157 # define DFU_ALT_INFO 158 #endif 159 160 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) 161 # define CONFIG_SUPPORT_VFAT 162 # define CONFIG_CMD_FAT 163 # define CONFIG_CMD_EXT2 164 # define CONFIG_FAT_WRITE 165 # define CONFIG_DOS_PARTITION 166 # define CONFIG_CMD_EXT4 167 # define CONFIG_CMD_EXT4_WRITE 168 # define CONFIG_CMD_FS_GENERIC 169 #endif 170 171 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 172 #define CONFIG_SYS_I2C_ZYNQ 173 #endif 174 175 /* I2C */ 176 #if defined(CONFIG_SYS_I2C_ZYNQ) 177 # define CONFIG_CMD_I2C 178 # define CONFIG_SYS_I2C 179 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 180 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 181 #endif 182 183 /* EEPROM */ 184 #ifdef CONFIG_ZYNQ_EEPROM 185 # define CONFIG_CMD_EEPROM 186 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 187 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 188 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 189 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 190 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 191 #endif 192 193 /* Total Size of Environment Sector */ 194 #define CONFIG_ENV_SIZE (128 << 10) 195 196 /* Allow to overwrite serial and ethaddr */ 197 #define CONFIG_ENV_OVERWRITE 198 199 /* Environment */ 200 #ifndef CONFIG_ENV_IS_NOWHERE 201 # ifndef CONFIG_SYS_NO_FLASH 202 # define CONFIG_ENV_IS_IN_FLASH 203 # elif defined(CONFIG_SYS_NO_FLASH) 204 # define CONFIG_ENV_IS_NOWHERE 205 # endif 206 207 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 208 # define CONFIG_ENV_OFFSET 0xE0000 209 #endif 210 211 /* Default environment */ 212 #define CONFIG_EXTRA_ENV_SETTINGS \ 213 "fit_image=fit.itb\0" \ 214 "load_addr=0x2000000\0" \ 215 "fit_size=0x800000\0" \ 216 "flash_off=0x100000\0" \ 217 "nor_flash_off=0xE2100000\0" \ 218 "fdt_high=0x20000000\0" \ 219 "initrd_high=0x20000000\0" \ 220 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 221 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 222 "bootm ${load_addr}\0" \ 223 "sdboot=echo Copying FIT from SD to RAM... && " \ 224 "load mmc 0 ${load_addr} ${fit_image} && " \ 225 "bootm ${load_addr}\0" \ 226 "jtagboot=echo TFTPing FIT to RAM... && " \ 227 "tftpboot ${load_addr} ${fit_image} && " \ 228 "bootm ${load_addr}\0" \ 229 "usbboot=if usb start; then " \ 230 "echo Copying FIT from USB to RAM... && " \ 231 "load usb 0 ${load_addr} ${fit_image} && " \ 232 "bootm ${load_addr}\0" \ 233 "fi\0" \ 234 DFU_ALT_INFO 235 236 #define CONFIG_BOOTCOMMAND "run $modeboot" 237 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ 238 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 239 240 /* Miscellaneous configurable options */ 241 #define CONFIG_SYS_HUSH_PARSER 242 243 #define CONFIG_CMDLINE_EDITING 244 #define CONFIG_AUTO_COMPLETE 245 #define CONFIG_BOARD_LATE_INIT 246 #define CONFIG_DISPLAY_BOARDINFO 247 #define CONFIG_SYS_LONGHELP 248 #define CONFIG_CLOCKS 249 #define CONFIG_CMD_CLK 250 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 251 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 252 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 253 sizeof(CONFIG_SYS_PROMPT) + 16) 254 255 /* Physical Memory map */ 256 #define CONFIG_SYS_TEXT_BASE 0x4000000 257 258 #define CONFIG_NR_DRAM_BANKS 1 259 #define CONFIG_SYS_SDRAM_BASE 0 260 261 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 262 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 263 264 #define CONFIG_SYS_MALLOC_LEN 0x1400000 265 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE 266 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 267 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 268 CONFIG_SYS_INIT_RAM_SIZE - \ 269 GENERATED_GBL_DATA_SIZE) 270 271 /* Enable the PL to be downloaded */ 272 #define CONFIG_FPGA 273 #define CONFIG_FPGA_XILINX 274 #define CONFIG_FPGA_ZYNQPL 275 #define CONFIG_CMD_FPGA_LOADMK 276 #define CONFIG_CMD_FPGA_LOADP 277 #define CONFIG_CMD_FPGA_LOADBP 278 #define CONFIG_CMD_FPGA_LOADFS 279 280 /* Open Firmware flat tree */ 281 #define CONFIG_OF_LIBFDT 282 283 /* FIT support */ 284 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 285 286 /* FDT support */ 287 #define CONFIG_DISPLAY_BOARDINFO_LATE 288 289 /* Extend size of kernel image for uncompression */ 290 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 291 292 /* Boot FreeBSD/vxWorks from an ELF image */ 293 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) 294 # define CONFIG_SYS_MMC_MAX_DEVICE 1 295 #endif 296 297 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 298 299 /* Commands */ 300 #define CONFIG_CMD_PING 301 #define CONFIG_CMD_DHCP 302 #define CONFIG_CMD_MII 303 #define CONFIG_CMD_TFTPPUT 304 305 /* SPL part */ 306 #define CONFIG_CMD_SPL 307 #define CONFIG_SPL_FRAMEWORK 308 #define CONFIG_SPL_LIBCOMMON_SUPPORT 309 #define CONFIG_SPL_LIBGENERIC_SUPPORT 310 #define CONFIG_SPL_SERIAL_SUPPORT 311 #define CONFIG_SPL_BOARD_INIT 312 313 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 314 315 /* MMC support */ 316 #ifdef CONFIG_ZYNQ_SDHCI0 317 #define CONFIG_SPL_MMC_SUPPORT 318 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 319 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 320 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 321 #define CONFIG_SPL_LIBDISK_SUPPORT 322 #define CONFIG_SPL_FAT_SUPPORT 323 #ifdef CONFIG_OF_SEPARATE 324 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" 325 #else 326 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 327 #endif 328 #endif 329 330 /* Disable dcache for SPL just for sure */ 331 #ifdef CONFIG_SPL_BUILD 332 #define CONFIG_SYS_DCACHE_OFF 333 #undef CONFIG_FPGA 334 #endif 335 336 /* Address in RAM where the parameters must be copied by SPL. */ 337 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 338 339 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 340 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 341 342 /* Not using MMC raw mode - just for compilation purpose */ 343 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 344 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 345 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 346 347 /* qspi mode is working fine */ 348 #ifdef CONFIG_ZYNQ_QSPI 349 #define CONFIG_SPL_SPI_SUPPORT 350 #define CONFIG_SPL_SPI_LOAD 351 #define CONFIG_SPL_SPI_FLASH_SUPPORT 352 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 353 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 354 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 355 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 356 CONFIG_SYS_SPI_ARGS_SIZE) 357 #endif 358 359 /* for booting directly linux */ 360 #define CONFIG_SPL_OS_BOOT 361 362 /* SP location before relocation, must use scratch RAM */ 363 #define CONFIG_SPL_TEXT_BASE 0x0 364 365 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 366 #define CONFIG_SPL_MAX_SIZE 0x30000 367 368 /* The highest 64k OCM address */ 369 #define OCM_HIGH_ADDR 0xffff0000 370 371 /* Just define any reasonable size */ 372 #define CONFIG_SPL_STACK_SIZE 0x1000 373 374 /* SPL stack position - and stack goes down */ 375 #define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE) 376 377 /* On the top of OCM space */ 378 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \ 379 GENERATED_GBL_DATA_SIZE) 380 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000 381 382 /* BSS setup */ 383 #define CONFIG_SPL_BSS_START_ADDR 0x100000 384 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 385 386 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 387 388 389 #endif /* __CONFIG_ZYNQ_COMMON_H */ 390