1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_CMD_CACHE 20 #define CONFIG_SYS_CACHELINE_SIZE 32 21 22 #define CONFIG_SYS_L2CACHE_OFF 23 #ifndef CONFIG_SYS_L2CACHE_OFF 24 # define CONFIG_SYS_L2_PL310 25 # define CONFIG_SYS_PL310_BASE 0xf8f02000 26 #endif 27 28 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 29 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 30 #define CONFIG_SYS_TIMER_COUNTS_DOWN 31 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 32 33 /* Serial drivers */ 34 #define CONFIG_BAUDRATE 115200 35 /* The following table includes the supported baudrates */ 36 #define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* DCC driver */ 40 #if defined(CONFIG_ZYNQ_DCC) 41 # define CONFIG_ARM_DCC 42 #else 43 # define CONFIG_ZYNQ_SERIAL 44 #endif 45 46 #define CONFIG_ZYNQ_GPIO 47 48 /* Ethernet driver */ 49 #if defined(CONFIG_ZYNQ_GEM) 50 # define CONFIG_MII 51 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 52 # define CONFIG_PHY_MARVELL 53 # define CONFIG_BOOTP_SERVERIP 54 # define CONFIG_BOOTP_BOOTPATH 55 # define CONFIG_BOOTP_GATEWAY 56 # define CONFIG_BOOTP_HOSTNAME 57 # define CONFIG_BOOTP_MAY_FAIL 58 #endif 59 60 /* SPI */ 61 #ifdef CONFIG_ZYNQ_SPI 62 # define CONFIG_CMD_SF 63 #endif 64 65 /* QSPI */ 66 #ifdef CONFIG_ZYNQ_QSPI 67 # define CONFIG_SF_DEFAULT_SPEED 30000000 68 # define CONFIG_SPI_FLASH_ISSI 69 # define CONFIG_CMD_SF 70 #endif 71 72 /* NOR */ 73 #ifndef CONFIG_SYS_NO_FLASH 74 # define CONFIG_SYS_FLASH_BASE 0xE2000000 75 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 76 # define CONFIG_SYS_MAX_FLASH_BANKS 1 77 # define CONFIG_SYS_MAX_FLASH_SECT 512 78 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 79 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 80 # define CONFIG_FLASH_SHOW_PROGRESS 10 81 # define CONFIG_SYS_FLASH_CFI 82 # undef CONFIG_SYS_FLASH_EMPTY_INFO 83 # define CONFIG_FLASH_CFI_DRIVER 84 # undef CONFIG_SYS_FLASH_PROTECTION 85 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 86 #endif 87 88 /* MMC */ 89 #if defined(CONFIG_ZYNQ_SDHCI) 90 # define CONFIG_MMC 91 # define CONFIG_GENERIC_MMC 92 # define CONFIG_SDHCI 93 # define CONFIG_CMD_MMC 94 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 95 #endif 96 97 #ifdef CONFIG_ZYNQ_USB 98 # define CONFIG_USB_EHCI 99 # define CONFIG_CMD_USB 100 # define CONFIG_USB_STORAGE 101 # define CONFIG_USB_EHCI_ZYNQ 102 # define CONFIG_USB_ULPI_VIEWPORT 103 # define CONFIG_USB_ULPI 104 # define CONFIG_EHCI_IS_TDI 105 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 106 107 # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ 108 # define CONFIG_USB_GADGET 109 # define CONFIG_USB_GADGET_DUALSPEED 110 # define CONFIG_USB_GADGET_DOWNLOAD 111 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 112 # define DFU_DEFAULT_POLL_TIMEOUT 300 113 # define CONFIG_USB_FUNCTION_DFU 114 # define CONFIG_DFU_RAM 115 # define CONFIG_USB_GADGET_VBUS_DRAW 2 116 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD 117 # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 118 # define CONFIG_G_DNL_MANUFACTURER "Xilinx" 119 # define CONFIG_USB_GADGET 120 # define CONFIG_USB_CABLE_CHECK 121 # define CONFIG_CMD_DFU 122 # define CONFIG_CMD_THOR_DOWNLOAD 123 # define CONFIG_USB_FUNCTION_THOR 124 # define DFU_ALT_INFO_RAM \ 125 "dfu_ram_info=" \ 126 "set dfu_alt_info " \ 127 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 128 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 129 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 130 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 131 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 132 133 # if defined(CONFIG_ZYNQ_SDHCI) 134 # define CONFIG_DFU_MMC 135 # define DFU_ALT_INFO_MMC \ 136 "dfu_mmc_info=" \ 137 "set dfu_alt_info " \ 138 "${kernel_image} fat 0 1\\\\;" \ 139 "${devicetree_image} fat 0 1\\\\;" \ 140 "${ramdisk_image} fat 0 1\0" \ 141 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 142 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 143 144 # define DFU_ALT_INFO \ 145 DFU_ALT_INFO_RAM \ 146 DFU_ALT_INFO_MMC 147 # else 148 # define DFU_ALT_INFO \ 149 DFU_ALT_INFO_RAM 150 # endif 151 #endif 152 153 #if !defined(DFU_ALT_INFO) 154 # define DFU_ALT_INFO 155 #endif 156 157 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) 158 # define CONFIG_SUPPORT_VFAT 159 # define CONFIG_CMD_FAT 160 # define CONFIG_CMD_EXT2 161 # define CONFIG_FAT_WRITE 162 # define CONFIG_DOS_PARTITION 163 # define CONFIG_CMD_EXT4 164 # define CONFIG_CMD_EXT4_WRITE 165 # define CONFIG_CMD_FS_GENERIC 166 #endif 167 168 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 169 #define CONFIG_SYS_I2C_ZYNQ 170 #endif 171 172 /* I2C */ 173 #if defined(CONFIG_SYS_I2C_ZYNQ) 174 # define CONFIG_CMD_I2C 175 # define CONFIG_SYS_I2C 176 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 177 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 178 #endif 179 180 /* EEPROM */ 181 #ifdef CONFIG_ZYNQ_EEPROM 182 # define CONFIG_CMD_EEPROM 183 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 184 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 185 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 186 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 187 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 188 #endif 189 190 /* Total Size of Environment Sector */ 191 #define CONFIG_ENV_SIZE (128 << 10) 192 193 /* Allow to overwrite serial and ethaddr */ 194 #define CONFIG_ENV_OVERWRITE 195 196 /* Environment */ 197 #ifndef CONFIG_ENV_IS_NOWHERE 198 # ifndef CONFIG_SYS_NO_FLASH 199 # define CONFIG_ENV_IS_IN_FLASH 200 # elif defined(CONFIG_SYS_NO_FLASH) 201 # define CONFIG_ENV_IS_NOWHERE 202 # endif 203 204 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 205 # define CONFIG_ENV_OFFSET 0xE0000 206 #endif 207 208 /* Default environment */ 209 #define CONFIG_EXTRA_ENV_SETTINGS \ 210 "fit_image=fit.itb\0" \ 211 "load_addr=0x2000000\0" \ 212 "fit_size=0x800000\0" \ 213 "flash_off=0x100000\0" \ 214 "nor_flash_off=0xE2100000\0" \ 215 "fdt_high=0x20000000\0" \ 216 "initrd_high=0x20000000\0" \ 217 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 218 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 219 "bootm ${load_addr}\0" \ 220 "sdboot=echo Copying FIT from SD to RAM... && " \ 221 "load mmc 0 ${load_addr} ${fit_image} && " \ 222 "bootm ${load_addr}\0" \ 223 "jtagboot=echo TFTPing FIT to RAM... && " \ 224 "tftpboot ${load_addr} ${fit_image} && " \ 225 "bootm ${load_addr}\0" \ 226 "usbboot=if usb start; then " \ 227 "echo Copying FIT from USB to RAM... && " \ 228 "load usb 0 ${load_addr} ${fit_image} && " \ 229 "bootm ${load_addr}; fi\0" \ 230 DFU_ALT_INFO 231 232 #define CONFIG_BOOTCOMMAND "run $modeboot" 233 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ 234 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 235 236 /* Miscellaneous configurable options */ 237 #define CONFIG_SYS_HUSH_PARSER 238 239 #define CONFIG_CMDLINE_EDITING 240 #define CONFIG_AUTO_COMPLETE 241 #define CONFIG_BOARD_LATE_INIT 242 #define CONFIG_DISPLAY_BOARDINFO 243 #define CONFIG_SYS_LONGHELP 244 #define CONFIG_CLOCKS 245 #define CONFIG_CMD_CLK 246 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 247 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 249 sizeof(CONFIG_SYS_PROMPT) + 16) 250 251 /* Physical Memory map */ 252 #define CONFIG_SYS_TEXT_BASE 0x4000000 253 254 #define CONFIG_NR_DRAM_BANKS 1 255 #define CONFIG_SYS_SDRAM_BASE 0 256 257 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 258 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 259 260 #define CONFIG_SYS_MALLOC_LEN 0x1400000 261 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE 262 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 263 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 264 CONFIG_SYS_INIT_RAM_SIZE - \ 265 GENERATED_GBL_DATA_SIZE) 266 267 /* Enable the PL to be downloaded */ 268 #define CONFIG_FPGA 269 #define CONFIG_FPGA_XILINX 270 #define CONFIG_FPGA_ZYNQPL 271 #define CONFIG_CMD_FPGA_LOADMK 272 #define CONFIG_CMD_FPGA_LOADP 273 #define CONFIG_CMD_FPGA_LOADBP 274 #define CONFIG_CMD_FPGA_LOADFS 275 276 /* Open Firmware flat tree */ 277 #define CONFIG_OF_LIBFDT 278 279 /* FIT support */ 280 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 281 282 /* FDT support */ 283 #define CONFIG_DISPLAY_BOARDINFO_LATE 284 285 /* Extend size of kernel image for uncompression */ 286 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 287 288 /* Boot FreeBSD/vxWorks from an ELF image */ 289 #define CONFIG_SYS_MMC_MAX_DEVICE 1 290 291 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 292 293 /* Commands */ 294 #define CONFIG_CMD_PING 295 #define CONFIG_CMD_DHCP 296 #define CONFIG_CMD_MII 297 #define CONFIG_CMD_TFTPPUT 298 299 /* SPL part */ 300 #define CONFIG_CMD_SPL 301 #define CONFIG_SPL_FRAMEWORK 302 #define CONFIG_SPL_LIBCOMMON_SUPPORT 303 #define CONFIG_SPL_LIBGENERIC_SUPPORT 304 #define CONFIG_SPL_SERIAL_SUPPORT 305 #define CONFIG_SPL_BOARD_INIT 306 #define CONFIG_SPL_RAM_DEVICE 307 308 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 309 310 /* MMC support */ 311 #ifdef CONFIG_ZYNQ_SDHCI 312 #define CONFIG_SPL_MMC_SUPPORT 313 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 314 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 315 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 316 #define CONFIG_SPL_LIBDISK_SUPPORT 317 #define CONFIG_SPL_FAT_SUPPORT 318 #ifdef CONFIG_OF_SEPARATE 319 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" 320 #else 321 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 322 #endif 323 #endif 324 325 /* Disable dcache for SPL just for sure */ 326 #ifdef CONFIG_SPL_BUILD 327 #define CONFIG_SYS_DCACHE_OFF 328 #undef CONFIG_FPGA 329 #endif 330 331 /* Address in RAM where the parameters must be copied by SPL. */ 332 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 333 334 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 335 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 336 337 /* Not using MMC raw mode - just for compilation purpose */ 338 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 339 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 340 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 341 342 /* qspi mode is working fine */ 343 #ifdef CONFIG_ZYNQ_QSPI 344 #define CONFIG_SPL_SPI_SUPPORT 345 #define CONFIG_SPL_SPI_LOAD 346 #define CONFIG_SPL_SPI_FLASH_SUPPORT 347 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 348 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 349 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 350 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 351 CONFIG_SYS_SPI_ARGS_SIZE) 352 #endif 353 354 /* for booting directly linux */ 355 #define CONFIG_SPL_OS_BOOT 356 357 /* SP location before relocation, must use scratch RAM */ 358 #define CONFIG_SPL_TEXT_BASE 0x0 359 360 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 361 #define CONFIG_SPL_MAX_SIZE 0x30000 362 363 /* The highest 64k OCM address */ 364 #define OCM_HIGH_ADDR 0xffff0000 365 366 /* On the top of OCM space */ 367 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 368 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 369 370 /* 371 * SPL stack position - and stack goes down 372 * 0xfffffe00 is used for putting wfi loop. 373 * Set it up as limit for now. 374 */ 375 #define CONFIG_SPL_STACK 0xfffffe00 376 377 /* BSS setup */ 378 #define CONFIG_SPL_BSS_START_ADDR 0x100000 379 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 380 381 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 382 383 384 #endif /* __CONFIG_ZYNQ_COMMON_H */ 385