xref: /rk3399_rockchip-uboot/include/configs/xpress.h (revision ac13ce49a4cb9e7629d6c151b754bb15b2ba33da)
1 /*
2  * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
3  *
4  * Configuration settings for the CCV xPress board
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 #ifndef __XPRESS_CONFIG_H
9 #define __XPRESS_CONFIG_H
10 
11 #include "mx6_common.h"
12 #include <asm/imx-common/gpio.h>
13 
14 /* SPL options */
15 #define CONFIG_SPL_LIBCOMMON_SUPPORT
16 #define CONFIG_SPL_MMC_SUPPORT
17 #include "imx6_spl.h"
18 
19 #define CONFIG_DISPLAY_CPUINFO
20 #define CONFIG_DISPLAY_BOARDINFO
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(16 << 20)
24 
25 #define CONFIG_BOARD_EARLY_INIT_F
26 #define CONFIG_BOARD_LATE_INIT
27 
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE		UART1_BASE
30 
31 /* MMC Configs */
32 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
33 #define CONFIG_SUPPORT_EMMC_BOOT	/* eMMC specific */
34 
35 /* I2C configs */
36 #define CONFIG_CMD_I2C
37 #define CONFIG_SYS_I2C
38 #define CONFIG_SYS_I2C_MXC
39 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
40 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
41 #define CONFIG_SYS_I2C_MXC_I2C4		/* enable I2C bus 4 */
42 #define CONFIG_SYS_I2C_SPEED		100000
43 
44 /* Miscellaneous configurable options */
45 #define CONFIG_CMD_MEMTEST
46 #define CONFIG_SYS_MEMTEST_START	0x80000000
47 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000000)
48 
49 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
50 #define CONFIG_SYS_HZ			1000
51 
52 #define CONFIG_SYS_CONSOLE_INFO_QUIET
53 #define CONFIG_CMDLINE_EDITING
54 
55 /* Physical Memory Map */
56 #define CONFIG_NR_DRAM_BANKS		1
57 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
58 #define PHYS_SDRAM_SIZE			(128 << 20)
59 
60 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
61 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
62 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
63 
64 #define CONFIG_SYS_INIT_SP_OFFSET \
65 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
66 #define CONFIG_SYS_INIT_SP_ADDR \
67 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
68 
69 /* FLASH and environment organization */
70 #define CONFIG_SYS_NO_FLASH
71 
72 /* Environment is in stored in the eMMC boot partition */
73 #define CONFIG_ENV_SIZE			(16 << 10)
74 #define CONFIG_ENV_IS_IN_MMC
75 #define CONFIG_ENV_OFFSET		(512 << 10)
76 #define CONFIG_SYS_MMC_ENV_DEV		0	/* USDHC2 */
77 #define CONFIG_SYS_MMC_ENV_PART		1	/* boot parition */
78 #define CONFIG_MMCROOT			"/dev/mmcblk0p2"  /* USDHC2 */
79 
80 #define CONFIG_CMD_BOOTZ
81 #define CONFIG_CMD_BMODE
82 #define CONFIG_CMD_CACHE
83 
84 /* USB Configs */
85 #define CONFIG_CMD_USB
86 #define CONFIG_USB_EHCI
87 #define CONFIG_USB_EHCI_MX6
88 #define CONFIG_USB_STORAGE
89 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
90 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
91 #define CONFIG_MXC_USB_FLAGS		0
92 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
93 
94 #define CONFIG_FEC_MXC
95 #define CONFIG_MII
96 #define CONFIG_CMD_MII
97 #define CONFIG_FEC_ENET_DEV		0
98 #define IMX_FEC_BASE			ENET_BASE_ADDR
99 #define CONFIG_FEC_MXC_PHYADDR          0x0
100 #define CONFIG_FEC_XCV_TYPE             RMII
101 #define CONFIG_ETHPRIME			"FEC"
102 #define CONFIG_PHYLIB
103 #define CONFIG_PHY_SMSC
104 
105 #define CONFIG_IMX_THERMAL
106 
107 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
108 
109 #define CONFIG_UBOOT_SECTOR_START	0x2
110 #define CONFIG_UBOOT_SECTOR_COUNT	0x3fe
111 
112 #define CONFIG_EXTRA_ENV_SETTINGS \
113 	"script=boot.scr\0" \
114 	"image=zImage\0" \
115 	"console=ttymxc0\0" \
116 	"fdt_high=0xffffffff\0" \
117 	"initrd_high=0xffffffff\0" \
118 	"fdt_file=undefined\0" \
119 	"fdt_addr=0x83000000\0" \
120 	"boot_fdt=try\0" \
121 	"ip_dyn=yes\0" \
122 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
123 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
124 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
125 	"mmcautodetect=yes\0" \
126 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
127 		"root=${mmcroot}\0" \
128 	"loadbootscript=" \
129 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
130 	"bootscript=echo Running bootscript from mmc ...; " \
131 		"source\0" \
132 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
133 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
134 	"mmcboot=echo Booting from mmc ...; " \
135 		"run mmcargs; " \
136 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
137 			"if run loadfdt; then " \
138 				"bootz ${loadaddr} - ${fdt_addr}; " \
139 			"else " \
140 				"if test ${boot_fdt} = try; then " \
141 					"bootz; " \
142 				"else " \
143 					"echo WARN: Cannot load the DT; " \
144 				"fi; " \
145 			"fi; " \
146 		"else " \
147 			"bootz; " \
148 		"fi;\0" \
149 	"uboot=ccv/u-boot.imx\0"					\
150 	"uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0"	\
151 	"uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0"		\
152 	"update_uboot=if tftp ${uboot}; then "				\
153 		"if itest ${filesize} > 0; then "			\
154 			"mmc dev 0 1;"					\
155 			"setexpr blkc ${filesize} / 0x200;"		\
156 			"setexpr blkc ${blkc} + 1;"			\
157 			"if itest ${blkc} <= ${uboot_size}; then "	\
158 				"mmc write ${loadaddr} ${uboot_start} "	\
159 					"${blkc};"			\
160 			"fi;"						\
161 		"fi; fi;"						\
162 		"setenv filesize; setenv blkc\0"			\
163 	"update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0"
164 
165 #endif /* __XPRESS_CONFIG_H */
166