1 /* 2 * Configuration for Xilinx ZynqMP zc1751 XM019 DC5 3 * 4 * (C) Copyright 2015 Xilinx, Inc. 5 * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> 6 * Michal Simek <michal.simek@xilinx.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H 12 #define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H 13 14 #define CONFIG_ZYNQ_SDHCI0 15 16 #define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5" 17 18 #define CONFIG_KERNEL_FDT_OFST_SIZE \ 19 "kernel_offset=0x400000\0" \ 20 "fdt_offset=0x2400000\0" \ 21 "kernel_size=0x2000000\0" \ 22 "fdt_size=0x80000\0" \ 23 "board=zc1751-dc5\0" 24 25 #include <configs/xilinx_zynqmp.h> 26 27 #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */ 28