1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2008 4 * Graeme Russ, graeme.russ@gmail.com. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <asm/ibmpc.h> 10 11 #ifndef __CONFIG_X86_COMMON_H 12 #define __CONFIG_X86_COMMON_H 13 14 /* 15 * High Level Configuration Options 16 * (easy to change) 17 */ 18 #define CONFIG_SHOW_BOOT_PROGRESS 19 #define CONFIG_ZBOOT_32 20 #define CONFIG_PHYSMEM 21 #define CONFIG_DISPLAY_BOARDINFO_LATE 22 #define CONFIG_LAST_STAGE_INIT 23 #define CONFIG_NR_DRAM_BANKS 8 24 25 #define CONFIG_LMB 26 27 #define CONFIG_LZO 28 #undef CONFIG_ZLIB 29 #undef CONFIG_GZIP 30 #define CONFIG_SYS_BOOTM_LEN (16 << 20) 31 32 /* SATA AHCI storage */ 33 34 #define CONFIG_SCSI_AHCI 35 #ifdef CONFIG_SCSI_AHCI 36 #define CONFIG_LIBATA 37 #define CONFIG_LBA48 38 #define CONFIG_SYS_64BIT_LBA 39 40 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 41 #define CONFIG_SYS_SCSI_MAX_LUN 1 42 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 43 CONFIG_SYS_SCSI_MAX_LUN) 44 #endif 45 46 /* Generic TPM interfaced through LPC bus */ 47 #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 48 49 /*----------------------------------------------------------------------- 50 * Real Time Clock Configuration 51 */ 52 #define CONFIG_RTC_MC146818 53 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 54 #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS 55 56 /*----------------------------------------------------------------------- 57 * Serial Configuration 58 */ 59 #define CONFIG_BAUDRATE 115200 60 #define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \ 61 9600, 19200, 38400, 115200} 62 #define CONFIG_SYS_NS16550_PORT_MAPPED 63 64 #define CONFIG_CMDLINE_EDITING 65 #define CONFIG_COMMAND_HISTORY 66 #define CONFIG_AUTO_COMPLETE 67 68 #define CONFIG_SUPPORT_VFAT 69 70 /************************************************************ 71 * DISK Partition support 72 ************************************************************/ 73 #define CONFIG_EFI_PARTITION 74 75 #define CONFIG_CMD_PART 76 #ifdef CONFIG_SYS_COREBOOT 77 #define CONFIG_CMD_CBFS 78 #endif 79 #define CONFIG_PARTITION_UUIDS 80 81 /* x86 GPIOs are accessed through a PCI device */ 82 #define CONFIG_INTEL_ICH6_GPIO 83 84 /*----------------------------------------------------------------------- 85 * Command line configuration. 86 */ 87 #define CONFIG_CMD_DATE 88 #define CONFIG_CMD_FPGA_LOADMK 89 #define CONFIG_CMD_IO 90 #define CONFIG_CMD_IRQ 91 #define CONFIG_CMD_PCI 92 #define CONFIG_CMD_GETTIME 93 #define CONFIG_SCSI 94 95 #define CONFIG_CMD_ZBOOT 96 97 #define CONFIG_BOOTARGS \ 98 "root=/dev/sdb3 init=/sbin/init rootwait ro" 99 #define CONFIG_BOOTCOMMAND \ 100 "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" 101 102 #if defined(CONFIG_CMD_KGDB) 103 #define CONFIG_KGDB_BAUDRATE 115200 104 #endif 105 106 /* 107 * Miscellaneous configurable options 108 */ 109 #define CONFIG_SYS_LONGHELP 110 #define CONFIG_SYS_CBSIZE 512 111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 112 sizeof(CONFIG_SYS_PROMPT) + \ 113 16) 114 #define CONFIG_SYS_MAXARGS 16 115 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 116 117 #define CONFIG_SYS_MEMTEST_START 0x00100000 118 #define CONFIG_SYS_MEMTEST_END 0x01000000 119 #define CONFIG_SYS_LOAD_ADDR 0x20000000 120 121 /*----------------------------------------------------------------------- 122 * CPU Features 123 */ 124 125 #define CONFIG_SYS_STACK_SIZE (32 * 1024) 126 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 127 #define CONFIG_SYS_MALLOC_LEN 0x200000 128 129 /* allow to overwrite serial and ethaddr */ 130 #define CONFIG_ENV_OVERWRITE 131 132 /*----------------------------------------------------------------------- 133 * FLASH configuration 134 */ 135 #define CONFIG_SYS_NO_FLASH 136 #define CONFIG_CMD_SF_TEST 137 #define CONFIG_SPI 138 139 /*----------------------------------------------------------------------- 140 * Environment configuration 141 */ 142 #define CONFIG_ENV_IS_IN_SPI_FLASH 143 #define CONFIG_ENV_SIZE 0x01000 144 145 /*----------------------------------------------------------------------- 146 * PCI configuration 147 */ 148 #define CONFIG_PCI_CONFIG_HOST_BRIDGE 149 150 /*----------------------------------------------------------------------- 151 * USB configuration 152 */ 153 #define CONFIG_USB_EHCI 154 #define CONFIG_USB_EHCI_PCI 155 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12 156 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 157 #define CONFIG_SYS_USB_EVENT_POLL 158 159 #define CONFIG_USB_HOST_ETHER 160 #define CONFIG_USB_ETHER_ASIX 161 #define CONFIG_USB_ETHER_SMSC95XX 162 #define CONFIG_TFTP_TSIZE 163 #define CONFIG_BOOTP_BOOTFILESIZE 164 #define CONFIG_BOOTP_BOOTPATH 165 #define CONFIG_BOOTP_GATEWAY 166 #define CONFIG_BOOTP_HOSTNAME 167 168 /* Default environment */ 169 #define CONFIG_ROOTPATH "/opt/nfsroot" 170 #define CONFIG_HOSTNAME x86 171 #define CONFIG_BOOTFILE "bzImage" 172 #define CONFIG_LOADADDR 0x1000000 173 #define CONFIG_RAMDISK_ADDR 0x4000000 174 #ifdef CONFIG_GENERATE_ACPI_TABLE 175 #define CONFIG_OTHBOOTARGS "othbootargs=\0" 176 #else 177 #define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0" 178 #endif 179 180 #define CONFIG_EXTRA_ENV_SETTINGS \ 181 CONFIG_STD_DEVICES_SETTINGS \ 182 "pciconfighost=1\0" \ 183 "netdev=eth0\0" \ 184 "consoledev=ttyS0\0" \ 185 CONFIG_OTHBOOTARGS \ 186 "ramdiskaddr=0x4000000\0" \ 187 "ramdiskfile=initramfs.gz\0" 188 189 #define CONFIG_RAMBOOTCOMMAND \ 190 "setenv bootargs root=/dev/ram rw " \ 191 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ 192 "console=$consoledev,$baudrate $othbootargs;" \ 193 "tftpboot $loadaddr $bootfile;" \ 194 "tftpboot $ramdiskaddr $ramdiskfile;" \ 195 "zboot $loadaddr 0 $ramdiskaddr $filesize" 196 197 #define CONFIG_NFSBOOTCOMMAND \ 198 "setenv bootargs root=/dev/nfs rw " \ 199 "nfsroot=$serverip:$rootpath " \ 200 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ 201 "console=$consoledev,$baudrate $othbootargs;" \ 202 "tftpboot $loadaddr $bootfile;" \ 203 "zboot $loadaddr" 204 205 206 #endif /* __CONFIG_H */ 207