xref: /rk3399_rockchip-uboot/include/configs/woodburn_common.h (revision b089d039b1971fc3abfe1d9bcebd0d35245fb110)
1d81b27a2SStefano Babic /*
2d81b27a2SStefano Babic  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
3d81b27a2SStefano Babic  *
4d81b27a2SStefano Babic  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5d81b27a2SStefano Babic  *
6d81b27a2SStefano Babic  * Configuration for the woodburn board.
7d81b27a2SStefano Babic  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
9d81b27a2SStefano Babic  */
10d81b27a2SStefano Babic 
11d81b27a2SStefano Babic #ifndef __WOODBURN_COMMON_CONFIG_H
12d81b27a2SStefano Babic #define __WOODBURN_COMMON_CONFIG_H
13d81b27a2SStefano Babic 
14d81b27a2SStefano Babic #include <asm/arch/imx-regs.h>
15d81b27a2SStefano Babic 
16d81b27a2SStefano Babic  /* High Level Configuration Options */
17d81b27a2SStefano Babic #define CONFIG_ARM1136	/* This is an arm1136 CPU core */
18d81b27a2SStefano Babic #define CONFIG_MX35
19d81b27a2SStefano Babic #define CONFIG_MX35_HCLK_FREQ	24000000
20d81b27a2SStefano Babic 
21d81b27a2SStefano Babic #define CONFIG_SYS_DCACHE_OFF
22d81b27a2SStefano Babic #define CONFIG_SYS_CACHELINE_SIZE	32
23d81b27a2SStefano Babic 
24d81b27a2SStefano Babic #define CONFIG_DISPLAY_CPUINFO
25d81b27a2SStefano Babic 
26d81b27a2SStefano Babic /* Only in case the value is not present in mach-types.h */
27d81b27a2SStefano Babic #ifndef MACH_TYPE_FLEA3
28d81b27a2SStefano Babic #define MACH_TYPE_FLEA3                3668
29d81b27a2SStefano Babic #endif
30d81b27a2SStefano Babic 
31d81b27a2SStefano Babic #define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3
32d81b27a2SStefano Babic 
33d81b27a2SStefano Babic /* This is required to setup the ESDC controller */
34d81b27a2SStefano Babic 
35d81b27a2SStefano Babic #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
36d81b27a2SStefano Babic #define CONFIG_REVISION_TAG
37d81b27a2SStefano Babic #define CONFIG_SETUP_MEMORY_TAGS
38d81b27a2SStefano Babic #define CONFIG_INITRD_TAG
39d81b27a2SStefano Babic 
40d81b27a2SStefano Babic /*
41d81b27a2SStefano Babic  * Size of malloc() pool
42d81b27a2SStefano Babic  */
43d81b27a2SStefano Babic #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
44d81b27a2SStefano Babic 
45d81b27a2SStefano Babic /*
46d81b27a2SStefano Babic  * Hardware drivers
47d81b27a2SStefano Babic  */
48*b089d039Strem #define CONFIG_SYS_I2C
49*b089d039Strem #define CONFIG_SYS_I2C_MXC
50*b089d039Strem #define CONFIG_SYS_SPD_BUS_NUM		0
51d81b27a2SStefano Babic #define CONFIG_MXC_SPI
52d81b27a2SStefano Babic #define CONFIG_MXC_GPIO
53d81b27a2SStefano Babic 
54d81b27a2SStefano Babic /* PMIC Controller */
5505a860c2SStefano Babic #define CONFIG_POWER
5605a860c2SStefano Babic #define CONFIG_POWER_I2C
5705a860c2SStefano Babic #define CONFIG_POWER_FSL
58d81b27a2SStefano Babic #define CONFIG_PMIC_FSL_MC13892
59d81b27a2SStefano Babic #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
60d81b27a2SStefano Babic #define CONFIG_RTC_MC13XXX
61d81b27a2SStefano Babic 
62d81b27a2SStefano Babic 
63d81b27a2SStefano Babic /* mmc driver */
64d81b27a2SStefano Babic #define CONFIG_MMC
65d81b27a2SStefano Babic #define CONFIG_GENERIC_MMC
66d81b27a2SStefano Babic #define CONFIG_FSL_ESDHC
67d81b27a2SStefano Babic #define CONFIG_SYS_FSL_ESDHC_ADDR	0
68d81b27a2SStefano Babic #define CONFIG_SYS_FSL_ESDHC_NUM	1
69d81b27a2SStefano Babic 
70d81b27a2SStefano Babic /*
71d81b27a2SStefano Babic  * UART (console)
72d81b27a2SStefano Babic  */
73d81b27a2SStefano Babic #define CONFIG_MXC_UART
74d81b27a2SStefano Babic #define CONFIG_MXC_UART_BASE	UART1_BASE
75d81b27a2SStefano Babic 
76d81b27a2SStefano Babic /* allow to overwrite serial and ethaddr */
77d81b27a2SStefano Babic #define CONFIG_ENV_OVERWRITE
78d81b27a2SStefano Babic #define CONFIG_CONS_INDEX	1
79d81b27a2SStefano Babic #define CONFIG_BAUDRATE		115200
80d81b27a2SStefano Babic 
81d81b27a2SStefano Babic /*
82d81b27a2SStefano Babic  * Command definition
83d81b27a2SStefano Babic  */
84d81b27a2SStefano Babic 
85d81b27a2SStefano Babic #include <config_cmd_default.h>
86d81b27a2SStefano Babic 
87d81b27a2SStefano Babic #define CONFIG_CMD_PING
88d81b27a2SStefano Babic #define CONFIG_CMD_DATE
89d81b27a2SStefano Babic #define CONFIG_CMD_DHCP
90d81b27a2SStefano Babic #define CONFIG_BOOTP_SUBNETMASK
91d81b27a2SStefano Babic #define CONFIG_BOOTP_GATEWAY
92d81b27a2SStefano Babic #define CONFIG_BOOTP_DNS
93d81b27a2SStefano Babic 
94d81b27a2SStefano Babic #define CONFIG_CMD_NAND
95d81b27a2SStefano Babic #define CONFIG_CMD_CACHE
96d81b27a2SStefano Babic 
97d81b27a2SStefano Babic #define CONFIG_CMD_I2C
98d81b27a2SStefano Babic #define CONFIG_CMD_SPI
99d81b27a2SStefano Babic #define CONFIG_CMD_MII
100d81b27a2SStefano Babic #define CONFIG_CMD_NET
101d81b27a2SStefano Babic 
102d81b27a2SStefano Babic #define CONFIG_CMD_MMC
103d81b27a2SStefano Babic #define CONFIG_DOS_PARTITION
104d81b27a2SStefano Babic #define CONFIG_EFI_PARTITION
105d81b27a2SStefano Babic #define CONFIG_CMD_EXT2
106d81b27a2SStefano Babic #define CONFIG_CMD_FAT
107d81b27a2SStefano Babic 
108d81b27a2SStefano Babic #define CONFIG_CMD_GPIO
109d81b27a2SStefano Babic #define CONFIG_MXC_GPIO
110d81b27a2SStefano Babic 
111d81b27a2SStefano Babic #define CONFIG_NET_RETRY_COUNT	100
112d81b27a2SStefano Babic 
113d81b27a2SStefano Babic #define CONFIG_BOOTDELAY	3
114d81b27a2SStefano Babic 
115d81b27a2SStefano Babic #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
116d81b27a2SStefano Babic 
117d81b27a2SStefano Babic 
118d81b27a2SStefano Babic /*
119d81b27a2SStefano Babic  * Ethernet on SOC (FEC)
120d81b27a2SStefano Babic  */
121d81b27a2SStefano Babic #define CONFIG_FEC_MXC
122d81b27a2SStefano Babic #define IMX_FEC_BASE	FEC_BASE_ADDR
123d81b27a2SStefano Babic #define CONFIG_PHYLIB
124d81b27a2SStefano Babic #define CONFIG_PHY_MICREL
125d81b27a2SStefano Babic #define CONFIG_FEC_MXC_PHYADDR	0x1
126d81b27a2SStefano Babic 
127d81b27a2SStefano Babic #define CONFIG_MII
128d81b27a2SStefano Babic #define CONFIG_DISCOVER_PHY
129d81b27a2SStefano Babic 
130d81b27a2SStefano Babic #define CONFIG_ARP_TIMEOUT	200UL
131d81b27a2SStefano Babic 
132d81b27a2SStefano Babic /*
133d81b27a2SStefano Babic  * Miscellaneous configurable options
134d81b27a2SStefano Babic  */
135d81b27a2SStefano Babic #define CONFIG_SYS_LONGHELP	/* undef to save memory */
136d81b27a2SStefano Babic #define CONFIG_SYS_PROMPT	"woodburn U-Boot > "
137d81b27a2SStefano Babic #define CONFIG_CMDLINE_EDITING
138d81b27a2SStefano Babic #define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */
139d81b27a2SStefano Babic 
140d81b27a2SStefano Babic #define CONFIG_AUTO_COMPLETE
141d81b27a2SStefano Babic #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
142d81b27a2SStefano Babic /* Print Buffer Size */
143d81b27a2SStefano Babic #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
144d81b27a2SStefano Babic #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
145d81b27a2SStefano Babic #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
146d81b27a2SStefano Babic 
147d81b27a2SStefano Babic #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
148d81b27a2SStefano Babic #define CONFIG_SYS_MEMTEST_END		0x10000
149d81b27a2SStefano Babic 
150d81b27a2SStefano Babic #undef	CONFIG_SYS_CLKS_IN_HZ	/* everything, incl board info, in Hz */
151d81b27a2SStefano Babic 
152d81b27a2SStefano Babic #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
153d81b27a2SStefano Babic 
154d81b27a2SStefano Babic #define CONFIG_SYS_HZ				1000
155d81b27a2SStefano Babic 
156d81b27a2SStefano Babic 
157d81b27a2SStefano Babic /*
158d81b27a2SStefano Babic  * Stack sizes
159d81b27a2SStefano Babic  *
160d81b27a2SStefano Babic  * The stack sizes are set up in start.S using the settings below
161d81b27a2SStefano Babic  */
162d81b27a2SStefano Babic #define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
163d81b27a2SStefano Babic 
164d81b27a2SStefano Babic /*
165d81b27a2SStefano Babic  * Physical Memory Map
166d81b27a2SStefano Babic  */
167d81b27a2SStefano Babic #define CONFIG_NR_DRAM_BANKS	1
168d81b27a2SStefano Babic #define PHYS_SDRAM_1		CSD0_BASE_ADDR
169d81b27a2SStefano Babic #define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)
170d81b27a2SStefano Babic 
171d81b27a2SStefano Babic #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
172d81b27a2SStefano Babic 
173d81b27a2SStefano Babic #define CONFIG_SYS_GBL_DATA_OFFSET	(LOW_LEVEL_SRAM_STACK - \
174d81b27a2SStefano Babic 						IRAM_BASE_ADDR - \
175d81b27a2SStefano Babic 						GENERATED_GBL_DATA_SIZE)
176d81b27a2SStefano Babic #define CONFIG_SYS_INIT_SP_ADDR		(IRAM_BASE_ADDR + \
177d81b27a2SStefano Babic 					CONFIG_SYS_GBL_DATA_OFFSET)
178d81b27a2SStefano Babic 
179d81b27a2SStefano Babic /*
180d81b27a2SStefano Babic  * MTD Command for mtdparts
181d81b27a2SStefano Babic  */
182d81b27a2SStefano Babic #define CONFIG_CMD_MTDPARTS
183d81b27a2SStefano Babic #define CONFIG_MTD_DEVICE
184d81b27a2SStefano Babic #define CONFIG_FLASH_CFI_MTD
185d81b27a2SStefano Babic #define CONFIG_MTD_PARTITIONS
186d81b27a2SStefano Babic #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
187d81b27a2SStefano Babic #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
188d81b27a2SStefano Babic 				"32m(rootfb)," \
189d81b27a2SStefano Babic 				"64m(pcache)," \
190d81b27a2SStefano Babic 				"64m(app1)," \
191d81b27a2SStefano Babic 				"10m(app2),-(spool);" \
192d81b27a2SStefano Babic 				"physmap-flash.0:512k(u-boot),64k(env1)," \
193d81b27a2SStefano Babic 				"64k(env2),3776k(kernel1),3776k(kernel2)"
194d81b27a2SStefano Babic 
195d81b27a2SStefano Babic /*
196d81b27a2SStefano Babic  * FLASH and environment organization
197d81b27a2SStefano Babic  */
198d81b27a2SStefano Babic #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
199d81b27a2SStefano Babic #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
200d81b27a2SStefano Babic #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
201d81b27a2SStefano Babic /* Monitor at beginning of flash */
202d81b27a2SStefano Babic #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
203d81b27a2SStefano Babic #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
204d81b27a2SStefano Babic 
205d81b27a2SStefano Babic #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
206d81b27a2SStefano Babic #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
207d81b27a2SStefano Babic 
208d81b27a2SStefano Babic /* Address and size of Redundant Environment Sector	*/
209d81b27a2SStefano Babic #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
210d81b27a2SStefano Babic #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
211d81b27a2SStefano Babic 
212d81b27a2SStefano Babic #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
213d81b27a2SStefano Babic 				CONFIG_SYS_MONITOR_LEN)
214d81b27a2SStefano Babic 
215d81b27a2SStefano Babic #define CONFIG_ENV_IS_IN_FLASH
216d81b27a2SStefano Babic 
217d81b27a2SStefano Babic /*
218d81b27a2SStefano Babic  * CFI FLASH driver setup
219d81b27a2SStefano Babic  */
220d81b27a2SStefano Babic #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
221d81b27a2SStefano Babic #define CONFIG_FLASH_CFI_DRIVER
222d81b27a2SStefano Babic 
223d81b27a2SStefano Babic /* A non-standard buffered write algorithm */
224d81b27a2SStefano Babic #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
225d81b27a2SStefano Babic #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
226d81b27a2SStefano Babic 
227d81b27a2SStefano Babic /*
228d81b27a2SStefano Babic  * NAND FLASH driver setup
229d81b27a2SStefano Babic  */
230d81b27a2SStefano Babic #define CONFIG_NAND_MXC
231d81b27a2SStefano Babic #define CONFIG_NAND_MXC_V1_1
232d81b27a2SStefano Babic #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
233d81b27a2SStefano Babic #define CONFIG_SYS_MAX_NAND_DEVICE	1
234d81b27a2SStefano Babic #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
235d81b27a2SStefano Babic #define CONFIG_MXC_NAND_HWECC
236d81b27a2SStefano Babic #define CONFIG_SYS_NAND_LARGEPAGE
237d81b27a2SStefano Babic 
238d81b27a2SStefano Babic #if 0
239d81b27a2SStefano Babic #define CONFIG_MTD_DEBUG
240d81b27a2SStefano Babic #define CONFIG_MTD_DEBUG_VERBOSE	7
241d81b27a2SStefano Babic #endif
242d81b27a2SStefano Babic #define CONFIG_SYS_NAND_ONFI_DETECTION
243d81b27a2SStefano Babic 
244d81b27a2SStefano Babic /*
245d81b27a2SStefano Babic  * Default environment and default scripts
246d81b27a2SStefano Babic  * to update uboot and load kernel
247d81b27a2SStefano Babic  */
248d81b27a2SStefano Babic #define xstr(s)	str(s)
249d81b27a2SStefano Babic #define str(s)	#s
250d81b27a2SStefano Babic 
251d81b27a2SStefano Babic #define CONFIG_HOSTNAME woodburn
252d81b27a2SStefano Babic #define	CONFIG_EXTRA_ENV_SETTINGS					\
253d81b27a2SStefano Babic 	"netdev=eth0\0"							\
254d81b27a2SStefano Babic 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
255d81b27a2SStefano Babic 		"nfsroot=${serverip}:${rootpath}\0"			\
256d81b27a2SStefano Babic 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
257d81b27a2SStefano Babic 	"addip_sta=setenv bootargs ${bootargs} "			\
258d81b27a2SStefano Babic 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
259d81b27a2SStefano Babic 		":${hostname}:${netdev}:off panic=1\0"			\
260d81b27a2SStefano Babic 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
261d81b27a2SStefano Babic 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
262d81b27a2SStefano Babic 		"else run addip_sta;fi\0"	\
263d81b27a2SStefano Babic 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
264d81b27a2SStefano Babic 	"addtty=setenv bootargs ${bootargs}"				\
265d81b27a2SStefano Babic 		" console=ttymxc0,${baudrate}\0"			\
266d81b27a2SStefano Babic 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
267d81b27a2SStefano Babic 	"loadaddr=80800000\0"						\
268d81b27a2SStefano Babic 	"kernel_addr_r=80800000\0"					\
269d81b27a2SStefano Babic 	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
270d81b27a2SStefano Babic 	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
271d81b27a2SStefano Babic 	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0"		\
272d81b27a2SStefano Babic 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
273d81b27a2SStefano Babic 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
274d81b27a2SStefano Babic 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
275d81b27a2SStefano Babic 		"bootm ${kernel_addr}\0"				\
276d81b27a2SStefano Babic 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
277d81b27a2SStefano Babic 		"run nfsargs addip addtty addmtd addmisc;"		\
278d81b27a2SStefano Babic 		"bootm ${kernel_addr_r}\0"				\
279d81b27a2SStefano Babic 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
280d81b27a2SStefano Babic 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
281d81b27a2SStefano Babic 	"net_self=if run net_self_load;then "				\
282d81b27a2SStefano Babic 		"run ramargs addip addtty addmtd addmisc;"		\
283d81b27a2SStefano Babic 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
284d81b27a2SStefano Babic 		"else echo Images not loades;fi\0"			\
285d81b27a2SStefano Babic 	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"			\
286d81b27a2SStefano Babic 	"load=tftp ${loadaddr} ${u-boot}\0"				\
287d81b27a2SStefano Babic 	"uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0"		\
288d81b27a2SStefano Babic 	"update=protect off ${uboot_addr} +80000;"			\
289d81b27a2SStefano Babic 		"erase ${uboot_addr} +80000;"				\
290d81b27a2SStefano Babic 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
291d81b27a2SStefano Babic 	"upd=if run load;then echo Updating u-boot;if run update;"	\
292d81b27a2SStefano Babic 		"then echo U-Boot updated;"				\
293d81b27a2SStefano Babic 			"else echo Error updating u-boot !;"		\
294d81b27a2SStefano Babic 			"echo Board without bootloader !!;"		\
295d81b27a2SStefano Babic 		"fi;"							\
296d81b27a2SStefano Babic 		"else echo U-Boot not downloaded..exiting;fi\0"		\
297d81b27a2SStefano Babic 	"bootcmd=run net_nfs\0"
298d81b27a2SStefano Babic 
299d81b27a2SStefano Babic #endif				/* __CONFIG_H */
300