147173483SFabio Estevam /* 247173483SFabio Estevam * Copyright (C) 2016 NXP Semiconductors 347173483SFabio Estevam * 447173483SFabio Estevam * Configuration settings for the i.MX7S Warp board. 547173483SFabio Estevam * 647173483SFabio Estevam * SPDX-License-Identifier: GPL-2.0+ 747173483SFabio Estevam */ 847173483SFabio Estevam 947173483SFabio Estevam #ifndef __WARP7_CONFIG_H 1047173483SFabio Estevam #define __WARP7_CONFIG_H 1147173483SFabio Estevam 1247173483SFabio Estevam #include "mx7_common.h" 1347173483SFabio Estevam 1447173483SFabio Estevam #define PHYS_SDRAM_SIZE SZ_512M 1547173483SFabio Estevam 1601f512bcSFabio Estevam #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 1701f512bcSFabio Estevam 186baa2616SFabio Estevam /* Size of malloc() pool */ 1967ef2c13SFabio Estevam #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 206baa2616SFabio Estevam 2147173483SFabio Estevam #define CONFIG_BOARD_EARLY_INIT_F 220a35cc93SMarco Franchi #define CONFIG_BOARD_LATE_INIT 2347173483SFabio Estevam 2447855a5cSStefan Agner #define CONFIG_DISPLAY_BOARDINFO 2547855a5cSStefan Agner 2647173483SFabio Estevam /* MMC Config*/ 2747173483SFabio Estevam #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR 2847173483SFabio Estevam #define CONFIG_SUPPORT_EMMC_BOOT 2947173483SFabio Estevam #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE 3047173483SFabio Estevam #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 3147173483SFabio Estevam 32*ca4f338eSFabio Estevam #define CONFIG_PARTITION_UUIDS 33*ca4f338eSFabio Estevam #define CONFIG_CMD_PART 34*ca4f338eSFabio Estevam 3547173483SFabio Estevam #define CONFIG_DFU_ENV_SETTINGS \ 3667ef2c13SFabio Estevam "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ 3747173483SFabio Estevam 3847173483SFabio Estevam #define CONFIG_EXTRA_ENV_SETTINGS \ 3947173483SFabio Estevam CONFIG_DFU_ENV_SETTINGS \ 4047173483SFabio Estevam "script=boot.scr\0" \ 4147173483SFabio Estevam "image=zImage\0" \ 4247173483SFabio Estevam "console=ttymxc0\0" \ 4347173483SFabio Estevam "fdt_high=0xffffffff\0" \ 4447173483SFabio Estevam "initrd_high=0xffffffff\0" \ 45ed395226SBreno Lima "fdt_file=imx7s-warp.dtb\0" \ 4647173483SFabio Estevam "fdt_addr=0x83000000\0" \ 4747173483SFabio Estevam "boot_fdt=try\0" \ 4847173483SFabio Estevam "ip_dyn=yes\0" \ 4947173483SFabio Estevam "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 5047173483SFabio Estevam "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 51*ca4f338eSFabio Estevam "finduuid=part uuid mmc 0:2 uuid\0" \ 5247173483SFabio Estevam "mmcargs=setenv bootargs console=${console},${baudrate} " \ 53*ca4f338eSFabio Estevam "root=PARTUUID=${uuid} rootwait rw\0" \ 5447173483SFabio Estevam "loadbootscript=" \ 5547173483SFabio Estevam "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 5647173483SFabio Estevam "bootscript=echo Running bootscript from mmc ...; " \ 5747173483SFabio Estevam "source\0" \ 5847173483SFabio Estevam "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 5947173483SFabio Estevam "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 6047173483SFabio Estevam "mmcboot=echo Booting from mmc ...; " \ 61*ca4f338eSFabio Estevam "run finduuid; " \ 6247173483SFabio Estevam "run mmcargs; " \ 6347173483SFabio Estevam "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 6447173483SFabio Estevam "if run loadfdt; then " \ 6547173483SFabio Estevam "bootz ${loadaddr} - ${fdt_addr}; " \ 6647173483SFabio Estevam "else " \ 6747173483SFabio Estevam "if test ${boot_fdt} = try; then " \ 6847173483SFabio Estevam "bootz; " \ 6947173483SFabio Estevam "else " \ 7047173483SFabio Estevam "echo WARN: Cannot load the DT; " \ 7147173483SFabio Estevam "fi; " \ 7247173483SFabio Estevam "fi; " \ 7347173483SFabio Estevam "else " \ 7447173483SFabio Estevam "bootz; " \ 7547173483SFabio Estevam "fi;\0" \ 7647173483SFabio Estevam 7747173483SFabio Estevam #define CONFIG_BOOTCOMMAND \ 7847173483SFabio Estevam "mmc dev ${mmcdev};" \ 7947173483SFabio Estevam "mmc dev ${mmcdev}; if mmc rescan; then " \ 8047173483SFabio Estevam "if run loadbootscript; then " \ 8147173483SFabio Estevam "run bootscript; " \ 8247173483SFabio Estevam "else " \ 8347173483SFabio Estevam "if run loadimage; then " \ 8447173483SFabio Estevam "run mmcboot; " \ 8547173483SFabio Estevam "fi; " \ 8647173483SFabio Estevam "fi; " \ 8747173483SFabio Estevam "fi" 8847173483SFabio Estevam 8947173483SFabio Estevam #define CONFIG_SYS_MEMTEST_START 0x80000000 9047173483SFabio Estevam #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 9147173483SFabio Estevam 9247173483SFabio Estevam #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 9347173483SFabio Estevam #define CONFIG_SYS_HZ 1000 9447173483SFabio Estevam 9547173483SFabio Estevam #define CONFIG_STACKSIZE SZ_128K 9647173483SFabio Estevam 9747173483SFabio Estevam /* Physical Memory Map */ 9847173483SFabio Estevam #define CONFIG_NR_DRAM_BANKS 1 9947173483SFabio Estevam #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 10047173483SFabio Estevam 10147173483SFabio Estevam #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 10247173483SFabio Estevam #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 10347173483SFabio Estevam #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 10447173483SFabio Estevam 10547173483SFabio Estevam #define CONFIG_SYS_INIT_SP_OFFSET \ 10647173483SFabio Estevam (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 10747173483SFabio Estevam #define CONFIG_SYS_INIT_SP_ADDR \ 10847173483SFabio Estevam (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 10947173483SFabio Estevam 1107d301a59SVanessa Maegima /* I2C configs */ 1117d301a59SVanessa Maegima #define CONFIG_SYS_I2C 1127d301a59SVanessa Maegima #define CONFIG_SYS_I2C_MXC 1137d301a59SVanessa Maegima #define CONFIG_SYS_I2C_MXC_I2C1 1147d301a59SVanessa Maegima #define CONFIG_SYS_I2C_SPEED 100000 1157d301a59SVanessa Maegima 1167d301a59SVanessa Maegima /* PMIC */ 1177d301a59SVanessa Maegima #define CONFIG_POWER 1187d301a59SVanessa Maegima #define CONFIG_POWER_I2C 1197d301a59SVanessa Maegima #define CONFIG_POWER_PFUZE3000 1207d301a59SVanessa Maegima #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 1217d301a59SVanessa Maegima 12247173483SFabio Estevam /* FLASH and environment organization */ 12347173483SFabio Estevam #define CONFIG_SYS_NO_FLASH 12447173483SFabio Estevam #define CONFIG_ENV_SIZE SZ_8K 12547173483SFabio Estevam #define CONFIG_ENV_IS_IN_MMC 12647173483SFabio Estevam 12747173483SFabio Estevam #define CONFIG_ENV_OFFSET (8 * SZ_64K) 12847173483SFabio Estevam #define CONFIG_SYS_FSL_USDHC_NUM 1 12947173483SFabio Estevam 13047173483SFabio Estevam #define CONFIG_SYS_MMC_ENV_DEV 0 13147173483SFabio Estevam #define CONFIG_SYS_MMC_ENV_PART 0 13247173483SFabio Estevam 13347173483SFabio Estevam /* USB Configs */ 13447173483SFabio Estevam #define CONFIG_USB_STORAGE 13547173483SFabio Estevam #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 13647173483SFabio Estevam 13747173483SFabio Estevam #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 13847173483SFabio Estevam #define CONFIG_MXC_USB_FLAGS 0 13947173483SFabio Estevam #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ 14047173483SFabio Estevam 14147173483SFabio Estevam #define CONFIG_IMX_THERMAL 14247173483SFabio Estevam 14347173483SFabio Estevam #define CONFIG_USBD_HS 14447173483SFabio Estevam 14547173483SFabio Estevam #define CONFIG_USB_FUNCTION_MASS_STORAGE 14647173483SFabio Estevam 14747173483SFabio Estevam /* USB Device Firmware Update support */ 14847173483SFabio Estevam #define CONFIG_USB_FUNCTION_DFU 14947173483SFabio Estevam #define CONFIG_DFU_MMC 15047173483SFabio Estevam #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 15147173483SFabio Estevam #define DFU_DEFAULT_POLL_TIMEOUT 300 15247173483SFabio Estevam 15347173483SFabio Estevam #endif 154