1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 /* We use generic board and device manager for v8 Versatile Express */ 12 #define CONFIG_SYS_GENERIC_BOARD 13 14 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 15 #ifndef CONFIG_SEMIHOSTING 16 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 17 #endif 18 #define CONFIG_ARMV8_SWITCH_TO_EL1 19 #endif 20 21 #define CONFIG_REMAKE_ELF 22 23 #define CONFIG_SUPPORT_RAW_INITRD 24 25 /* Cache Definitions */ 26 #define CONFIG_SYS_DCACHE_OFF 27 #define CONFIG_SYS_ICACHE_OFF 28 29 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 30 #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" 31 32 /* Link Definitions */ 33 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 34 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 35 /* ATF loads u-boot here for BASE_FVP model */ 36 #define CONFIG_SYS_TEXT_BASE 0x88000000 37 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 38 #elif CONFIG_TARGET_VEXPRESS64_JUNO 39 #define CONFIG_SYS_TEXT_BASE 0xe0000000 40 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 41 #else 42 #error "Unknown board variant" 43 #endif 44 45 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 46 47 /* Flat Device Tree Definitions */ 48 #define CONFIG_OF_LIBFDT 49 50 /* CS register bases for the original memory map. */ 51 #define V2M_PA_CS0 0x00000000 52 #define V2M_PA_CS1 0x14000000 53 #define V2M_PA_CS2 0x18000000 54 #define V2M_PA_CS3 0x1c000000 55 #define V2M_PA_CS4 0x0c000000 56 #define V2M_PA_CS5 0x10000000 57 58 #define V2M_PERIPH_OFFSET(x) (x << 16) 59 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 60 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 61 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 62 63 #define V2M_BASE 0x80000000 64 65 /* Common peripherals relative to CS7. */ 66 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 67 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 68 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 69 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 70 71 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 72 #define V2M_UART0 0x7ff80000 73 #define V2M_UART1 0x7ff70000 74 #else /* Not Juno */ 75 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 76 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 77 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 78 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 79 #endif 80 81 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 82 83 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 84 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 85 86 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 87 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 88 89 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 90 91 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 92 93 /* System register offsets. */ 94 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 95 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 96 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 97 98 /* Generic Timer Definitions */ 99 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 100 101 /* Generic Interrupt Controller Definitions */ 102 #ifdef CONFIG_GICV3 103 #define GICD_BASE (0x2f000000) 104 #define GICR_BASE (0x2f100000) 105 #else 106 107 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ 108 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) 109 #define GICD_BASE (0x2f000000) 110 #define GICC_BASE (0x2c000000) 111 #elif CONFIG_TARGET_VEXPRESS64_JUNO 112 #define GICD_BASE (0x2C010000) 113 #define GICC_BASE (0x2C02f000) 114 #else 115 #error "Unknown board variant" 116 #endif 117 #endif /* !CONFIG_GICV3 */ 118 119 /* Size of malloc() pool */ 120 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 121 122 /* Ethernet Configuration */ 123 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 124 /* The real hardware Versatile express uses SMSC9118 */ 125 #define CONFIG_SMC911X 1 126 #define CONFIG_SMC911X_32_BIT 1 127 #define CONFIG_SMC911X_BASE (0x018000000) 128 #else 129 /* The Vexpress64 simulators use SMSC91C111 */ 130 #define CONFIG_SMC91111 1 131 #define CONFIG_SMC91111_BASE (0x01A000000) 132 #endif 133 134 /* PL011 Serial Configuration */ 135 #define CONFIG_BAUDRATE 115200 136 #define CONFIG_CONS_INDEX 0 137 #define CONFIG_PL01X_SERIAL 138 #define CONFIG_PL011_SERIAL 139 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 140 #define CONFIG_PL011_CLOCK 7273800 141 #else 142 #define CONFIG_PL011_CLOCK 24000000 143 #endif 144 145 /* Command line configuration */ 146 #define CONFIG_MENU 147 /*#define CONFIG_MENU_SHOW*/ 148 #define CONFIG_CMD_CACHE 149 #define CONFIG_CMD_BOOTI 150 #define CONFIG_CMD_UNZIP 151 #define CONFIG_CMD_DHCP 152 #define CONFIG_CMD_PXE 153 #define CONFIG_CMD_ENV 154 #define CONFIG_CMD_MII 155 #define CONFIG_CMD_PING 156 #define CONFIG_CMD_FAT 157 #define CONFIG_DOS_PARTITION 158 159 /* BOOTP options */ 160 #define CONFIG_BOOTP_BOOTFILESIZE 161 #define CONFIG_BOOTP_BOOTPATH 162 #define CONFIG_BOOTP_GATEWAY 163 #define CONFIG_BOOTP_HOSTNAME 164 #define CONFIG_BOOTP_PXE 165 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 166 167 /* Miscellaneous configurable options */ 168 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 169 170 /* Physical Memory Map */ 171 #define CONFIG_NR_DRAM_BANKS 1 172 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 173 /* Top 16MB reserved for secure world use */ 174 #define DRAM_SEC_SIZE 0x01000000 175 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 176 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 177 178 /* Enable memtest */ 179 #define CONFIG_CMD_MEMTEST 180 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 181 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 182 183 /* Initial environment variables */ 184 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 185 /* 186 * Defines where the kernel and FDT exist in NOR flash and where it will 187 * be copied into DRAM 188 */ 189 #define CONFIG_EXTRA_ENV_SETTINGS \ 190 "kernel_name=Image\0" \ 191 "kernel_addr=0x80000000\0" \ 192 "fdt_name=juno\0" \ 193 "fdt_addr=0x83000000\0" \ 194 "fdt_high=0xffffffffffffffff\0" \ 195 "initrd_high=0xffffffffffffffff\0" \ 196 197 /* Assume we boot with root on the first partition of a USB stick */ 198 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ 199 "root=/dev/sda1 rw " \ 200 "rootwait "\ 201 "earlyprintk=pl011,0x7ff80000 debug "\ 202 "user_debug=31 "\ 203 "androidboot.hardware=juno "\ 204 "loglevel=9" 205 206 /* Copy the kernel and FDT to DRAM memory and boot */ 207 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ 208 "afs load ${fdt_name} ${fdt_addr} ; " \ 209 "fdt addr ${fdt_addr}; fdt resize; " \ 210 "booti ${kernel_addr} - ${fdt_addr}" 211 212 #define CONFIG_BOOTDELAY 1 213 214 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP 215 #define CONFIG_EXTRA_ENV_SETTINGS \ 216 "kernel_name=Image\0" \ 217 "kernel_addr=0x80000000\0" \ 218 "initrd_name=ramdisk.img\0" \ 219 "initrd_addr=0x88000000\0" \ 220 "fdt_name=devtree.dtb\0" \ 221 "fdt_addr=0x83000000\0" \ 222 "fdt_high=0xffffffffffffffff\0" \ 223 "initrd_high=0xffffffffffffffff\0" 224 225 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 226 "0x1c090000 debug user_debug=31 "\ 227 "loglevel=9" 228 229 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ 230 "smhload ${fdt_name} ${fdt_addr}; " \ 231 "smhload ${initrd_name} ${initrd_addr} "\ 232 "initrd_end; " \ 233 "fdt addr ${fdt_addr}; fdt resize; " \ 234 "fdt chosen ${initrd_addr} ${initrd_end}; " \ 235 "booti $kernel_addr - $fdt_addr" 236 237 #define CONFIG_BOOTDELAY 1 238 239 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM 240 #define CONFIG_EXTRA_ENV_SETTINGS \ 241 "kernel_addr=0x80080000\0" \ 242 "initrd_addr=0x84000000\0" \ 243 "fdt_addr=0x83000000\0" \ 244 "fdt_high=0xffffffffffffffff\0" \ 245 "initrd_high=0xffffffffffffffff\0" 246 247 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 248 "0x1c090000 debug user_debug=31 "\ 249 "androidboot.hardware=fvpbase "\ 250 "root=/dev/vda2 rw "\ 251 "rootwait "\ 252 "loglevel=9" 253 254 #define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr" 255 256 #define CONFIG_BOOTDELAY 1 257 258 #else 259 #error "Unknown board variant" 260 #endif 261 262 /* Do not preserve environment */ 263 #define CONFIG_ENV_IS_NOWHERE 1 264 #define CONFIG_ENV_SIZE 0x1000 265 266 /* Monitor Command Prompt */ 267 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 268 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 269 sizeof(CONFIG_SYS_PROMPT) + 16) 270 #define CONFIG_SYS_HUSH_PARSER 271 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 272 #define CONFIG_SYS_LONGHELP 273 #define CONFIG_CMDLINE_EDITING 274 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 275 276 /* Flash memory is available on the Juno board only */ 277 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO 278 #define CONFIG_SYS_NO_FLASH 279 #else 280 #define CONFIG_CMD_ARMFLASH 281 #define CONFIG_SYS_FLASH_CFI 1 282 #define CONFIG_FLASH_CFI_DRIVER 1 283 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 284 #define CONFIG_SYS_FLASH_BASE 0x08000000 285 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */ 286 #define CONFIG_SYS_MAX_FLASH_BANKS 2 287 288 /* Timeout values in ticks */ 289 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 290 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 291 292 /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */ 293 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */ 294 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ 295 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 296 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 297 298 #endif 299 300 #endif /* __VEXPRESS_AEMV8A_H */ 301