1 /* 2 * Configuration for Versatile Express. Parts were derived from other ARM 3 * configurations. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __VEXPRESS_AEMV8A_H 9 #define __VEXPRESS_AEMV8A_H 10 11 /* We use generic board and device manager for v8 Versatile Express */ 12 #define CONFIG_SYS_GENERIC_BOARD 13 14 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 15 #ifndef CONFIG_SEMIHOSTING 16 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING 17 #endif 18 #define CONFIG_ARMV8_SWITCH_TO_EL1 19 #endif 20 21 #define CONFIG_REMAKE_ELF 22 23 #define CONFIG_SUPPORT_RAW_INITRD 24 25 /* Cache Definitions */ 26 #define CONFIG_SYS_DCACHE_OFF 27 #define CONFIG_SYS_ICACHE_OFF 28 29 #define CONFIG_IDENT_STRING " vexpress_aemv8a" 30 #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" 31 32 /* Link Definitions */ 33 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 34 /* ATF loads u-boot here for BASE_FVP model */ 35 #define CONFIG_SYS_TEXT_BASE 0x88000000 36 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) 37 #elif CONFIG_TARGET_VEXPRESS64_JUNO 38 #define CONFIG_SYS_TEXT_BASE 0xe0000000 39 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 40 #else 41 #error "Unknown board variant" 42 #endif 43 44 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 45 46 /* Flat Device Tree Definitions */ 47 #define CONFIG_OF_LIBFDT 48 49 /* CS register bases for the original memory map. */ 50 #define V2M_PA_CS0 0x00000000 51 #define V2M_PA_CS1 0x14000000 52 #define V2M_PA_CS2 0x18000000 53 #define V2M_PA_CS3 0x1c000000 54 #define V2M_PA_CS4 0x0c000000 55 #define V2M_PA_CS5 0x10000000 56 57 #define V2M_PERIPH_OFFSET(x) (x << 16) 58 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) 59 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) 60 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) 61 62 #define V2M_BASE 0x80000000 63 64 /* Common peripherals relative to CS7. */ 65 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) 66 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) 67 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) 68 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) 69 70 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 71 #define V2M_UART0 0x7ff80000 72 #define V2M_UART1 0x7ff70000 73 #else /* Not Juno */ 74 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) 75 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) 76 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) 77 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) 78 #endif 79 80 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) 81 82 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) 83 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) 84 85 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) 86 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) 87 88 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) 89 90 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) 91 92 /* System register offsets. */ 93 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) 94 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) 95 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) 96 97 /* Generic Timer Definitions */ 98 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 99 100 /* Generic Interrupt Controller Definitions */ 101 #ifdef CONFIG_GICV3 102 #define GICD_BASE (0x2f000000) 103 #define GICR_BASE (0x2f100000) 104 #else 105 106 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP 107 #define GICD_BASE (0x2f000000) 108 #define GICC_BASE (0x2c000000) 109 #elif CONFIG_TARGET_VEXPRESS64_JUNO 110 #define GICD_BASE (0x2C010000) 111 #define GICC_BASE (0x2C02f000) 112 #else 113 #error "Unknown board variant" 114 #endif 115 #endif /* !CONFIG_GICV3 */ 116 117 /* Size of malloc() pool */ 118 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) 119 120 /* Ethernet Configuration */ 121 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 122 /* The real hardware Versatile express uses SMSC9118 */ 123 #define CONFIG_SMC911X 1 124 #define CONFIG_SMC911X_32_BIT 1 125 #define CONFIG_SMC911X_BASE (0x018000000) 126 #else 127 /* The Vexpress64 simulators use SMSC91C111 */ 128 #define CONFIG_SMC91111 1 129 #define CONFIG_SMC91111_BASE (0x01A000000) 130 #endif 131 132 /* PL011 Serial Configuration */ 133 #define CONFIG_BAUDRATE 115200 134 #define CONFIG_CONS_INDEX 0 135 #define CONFIG_PL01X_SERIAL 136 #define CONFIG_PL011_SERIAL 137 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 138 #define CONFIG_PL011_CLOCK 7273800 139 #else 140 #define CONFIG_PL011_CLOCK 24000000 141 #endif 142 143 /* Command line configuration */ 144 #define CONFIG_MENU 145 /*#define CONFIG_MENU_SHOW*/ 146 #define CONFIG_CMD_CACHE 147 #define CONFIG_CMD_BOOTI 148 #define CONFIG_CMD_UNZIP 149 #define CONFIG_CMD_DHCP 150 #define CONFIG_CMD_PXE 151 #define CONFIG_CMD_ENV 152 #define CONFIG_CMD_MII 153 #define CONFIG_CMD_PING 154 #define CONFIG_CMD_FAT 155 #define CONFIG_DOS_PARTITION 156 157 /* BOOTP options */ 158 #define CONFIG_BOOTP_BOOTFILESIZE 159 #define CONFIG_BOOTP_BOOTPATH 160 #define CONFIG_BOOTP_GATEWAY 161 #define CONFIG_BOOTP_HOSTNAME 162 #define CONFIG_BOOTP_PXE 163 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 164 165 /* Miscellaneous configurable options */ 166 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) 167 168 /* Physical Memory Map */ 169 #define CONFIG_NR_DRAM_BANKS 1 170 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ 171 /* Top 16MB reserved for secure world use */ 172 #define DRAM_SEC_SIZE 0x01000000 173 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE 174 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 175 176 /* Enable memtest */ 177 #define CONFIG_CMD_MEMTEST 178 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 179 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 180 181 /* Initial environment variables */ 182 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO 183 /* 184 * Defines where the kernel and FDT exist in NOR flash and where it will 185 * be copied into DRAM 186 */ 187 #define CONFIG_EXTRA_ENV_SETTINGS \ 188 "kernel_name=Image\0" \ 189 "kernel_addr=0x80000000\0" \ 190 "fdt_name=juno\0" \ 191 "fdt_addr=0x83000000\0" \ 192 "fdt_high=0xffffffffffffffff\0" \ 193 "initrd_high=0xffffffffffffffff\0" \ 194 195 /* Assume we boot with root on the first partition of a USB stick */ 196 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ 197 "root=/dev/sda1 rw " \ 198 "rootwait "\ 199 "earlyprintk=pl011,0x7ff80000 debug "\ 200 "user_debug=31 "\ 201 "loglevel=9" 202 203 /* Copy the kernel and FDT to DRAM memory and boot */ 204 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ 205 "afs load ${fdt_name} ${fdt_addr} ; " \ 206 "fdt addr ${fdt_addr}; fdt resize; " \ 207 "booti ${kernel_addr} - ${fdt_addr}" 208 209 #define CONFIG_BOOTDELAY 1 210 211 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP 212 #define CONFIG_EXTRA_ENV_SETTINGS \ 213 "kernel_name=Image\0" \ 214 "kernel_addr=0x80000000\0" \ 215 "initrd_name=ramdisk.img\0" \ 216 "initrd_addr=0x88000000\0" \ 217 "fdt_name=devtree.dtb\0" \ 218 "fdt_addr=0x83000000\0" \ 219 "fdt_high=0xffffffffffffffff\0" \ 220 "initrd_high=0xffffffffffffffff\0" 221 222 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ 223 "0x1c090000 debug user_debug=31 "\ 224 "loglevel=9" 225 226 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ 227 "smhload ${fdt_name} ${fdt_addr}; " \ 228 "smhload ${initrd_name} ${initrd_addr} "\ 229 "initrd_end; " \ 230 "fdt addr ${fdt_addr}; fdt resize; " \ 231 "fdt chosen ${initrd_addr} ${initrd_end}; " \ 232 "booti $kernel_addr - $fdt_addr" 233 234 #define CONFIG_BOOTDELAY 1 235 236 #else 237 #error "Unknown board variant" 238 #endif 239 240 /* Do not preserve environment */ 241 #define CONFIG_ENV_IS_NOWHERE 1 242 #define CONFIG_ENV_SIZE 0x1000 243 244 /* Monitor Command Prompt */ 245 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 246 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 247 sizeof(CONFIG_SYS_PROMPT) + 16) 248 #define CONFIG_SYS_HUSH_PARSER 249 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 250 #define CONFIG_SYS_LONGHELP 251 #define CONFIG_CMDLINE_EDITING 252 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 253 254 /* Flash memory is available on the Juno board only */ 255 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO 256 #define CONFIG_SYS_NO_FLASH 257 #else 258 #define CONFIG_CMD_ARMFLASH 259 #define CONFIG_SYS_FLASH_CFI 1 260 #define CONFIG_FLASH_CFI_DRIVER 1 261 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 262 #define CONFIG_SYS_FLASH_BASE 0x08000000 263 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */ 264 #define CONFIG_SYS_MAX_FLASH_BANKS 2 265 266 /* Timeout values in ticks */ 267 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 268 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 269 270 /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */ 271 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */ 272 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ 273 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 274 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 275 276 #endif 277 278 #endif /* __VEXPRESS_AEMV8A_H */ 279