xref: /rk3399_rockchip-uboot/include/configs/vexpress_aemv8a.h (revision 10d1491b3dea43182aec5cdce8f81ca520400c4b)
112916829SDavid Feng /*
212916829SDavid Feng  * Configuration for Versatile Express. Parts were derived from other ARM
312916829SDavid Feng  *   configurations.
412916829SDavid Feng  *
512916829SDavid Feng  * SPDX-License-Identifier:	GPL-2.0+
612916829SDavid Feng  */
712916829SDavid Feng 
812916829SDavid Feng #ifndef __VEXPRESS_AEMV8A_H
912916829SDavid Feng #define __VEXPRESS_AEMV8A_H
1012916829SDavid Feng 
11d8bafe13SDavid Feng #define CONFIG_DM
12d8bafe13SDavid Feng 
1303ca6a39SLinus Walleij /* We use generic board for v8 Versatile Express */
1403ca6a39SLinus Walleij #define CONFIG_SYS_GENERIC_BOARD
1503ca6a39SLinus Walleij 
16f91afc4dSLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
17261d2760SDarwin Rambo #ifndef CONFIG_SEMIHOSTING
18f91afc4dSLinus Walleij #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
19261d2760SDarwin Rambo #endif
20261d2760SDarwin Rambo #define CONFIG_ARMV8_SWITCH_TO_EL1
21261d2760SDarwin Rambo #endif
22261d2760SDarwin Rambo 
2312916829SDavid Feng #define CONFIG_REMAKE_ELF
2412916829SDavid Feng 
2512916829SDavid Feng #define CONFIG_SUPPORT_RAW_INITRD
2612916829SDavid Feng 
2712916829SDavid Feng /* Cache Definitions */
2812916829SDavid Feng #define CONFIG_SYS_DCACHE_OFF
2912916829SDavid Feng #define CONFIG_SYS_ICACHE_OFF
3012916829SDavid Feng 
3112916829SDavid Feng #define CONFIG_IDENT_STRING		" vexpress_aemv8a"
3212916829SDavid Feng #define CONFIG_BOOTP_VCI_STRING		"U-boot.armv8.vexpress_aemv8a"
3312916829SDavid Feng 
3412916829SDavid Feng /* Link Definitions */
35f91afc4dSLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
36261d2760SDarwin Rambo /* ATF loads u-boot here for BASE_FVP model */
37261d2760SDarwin Rambo #define CONFIG_SYS_TEXT_BASE		0x88000000
38261d2760SDarwin Rambo #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
39ffc10373SLinus Walleij #elif CONFIG_TARGET_VEXPRESS64_JUNO
40ffc10373SLinus Walleij #define CONFIG_SYS_TEXT_BASE		0xe0000000
41ffc10373SLinus Walleij #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
42261d2760SDarwin Rambo #else
4303314f0eSLinus Walleij #error "Unknown board variant"
44261d2760SDarwin Rambo #endif
4512916829SDavid Feng 
4612916829SDavid Feng /* Flat Device Tree Definitions */
4712916829SDavid Feng #define CONFIG_OF_LIBFDT
4812916829SDavid Feng 
4912916829SDavid Feng /* CS register bases for the original memory map. */
5012916829SDavid Feng #define V2M_PA_CS0			0x00000000
5112916829SDavid Feng #define V2M_PA_CS1			0x14000000
5212916829SDavid Feng #define V2M_PA_CS2			0x18000000
5312916829SDavid Feng #define V2M_PA_CS3			0x1c000000
5412916829SDavid Feng #define V2M_PA_CS4			0x0c000000
5512916829SDavid Feng #define V2M_PA_CS5			0x10000000
5612916829SDavid Feng 
5712916829SDavid Feng #define V2M_PERIPH_OFFSET(x)		(x << 16)
5812916829SDavid Feng #define V2M_SYSREGS			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
5912916829SDavid Feng #define V2M_SYSCTL			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
6012916829SDavid Feng #define V2M_SERIAL_BUS_PCI		(V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
6112916829SDavid Feng 
6212916829SDavid Feng #define V2M_BASE			0x80000000
6312916829SDavid Feng 
6412916829SDavid Feng /* Common peripherals relative to CS7. */
6512916829SDavid Feng #define V2M_AACI			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
6612916829SDavid Feng #define V2M_MMCI			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
6712916829SDavid Feng #define V2M_KMI0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
6812916829SDavid Feng #define V2M_KMI1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
6912916829SDavid Feng 
70ffc10373SLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
71ffc10373SLinus Walleij #define V2M_UART0			0x7ff80000
72ffc10373SLinus Walleij #define V2M_UART1			0x7ff70000
73ffc10373SLinus Walleij #else /* Not Juno */
7412916829SDavid Feng #define V2M_UART0			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
7512916829SDavid Feng #define V2M_UART1			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
7612916829SDavid Feng #define V2M_UART2			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
7712916829SDavid Feng #define V2M_UART3			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
78ffc10373SLinus Walleij #endif
7912916829SDavid Feng 
8012916829SDavid Feng #define V2M_WDT				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
8112916829SDavid Feng 
8212916829SDavid Feng #define V2M_TIMER01			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
8312916829SDavid Feng #define V2M_TIMER23			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
8412916829SDavid Feng 
8512916829SDavid Feng #define V2M_SERIAL_BUS_DVI		(V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
8612916829SDavid Feng #define V2M_RTC				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
8712916829SDavid Feng 
8812916829SDavid Feng #define V2M_CF				(V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
8912916829SDavid Feng 
9012916829SDavid Feng #define V2M_CLCD			(V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
9112916829SDavid Feng 
9212916829SDavid Feng /* System register offsets. */
9312916829SDavid Feng #define V2M_SYS_CFGDATA			(V2M_SYSREGS + 0x0a0)
9412916829SDavid Feng #define V2M_SYS_CFGCTRL			(V2M_SYSREGS + 0x0a4)
9512916829SDavid Feng #define V2M_SYS_CFGSTAT			(V2M_SYSREGS + 0x0a8)
9612916829SDavid Feng 
9712916829SDavid Feng /* Generic Timer Definitions */
9812916829SDavid Feng #define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
9912916829SDavid Feng 
10012916829SDavid Feng /* Generic Interrupt Controller Definitions */
101c71645adSDavid Feng #ifdef CONFIG_GICV3
102c71645adSDavid Feng #define GICD_BASE			(0x2f000000)
103c71645adSDavid Feng #define GICR_BASE			(0x2f100000)
104c71645adSDavid Feng #else
105261d2760SDarwin Rambo 
106f91afc4dSLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
107261d2760SDarwin Rambo #define GICD_BASE			(0x2f000000)
108261d2760SDarwin Rambo #define GICC_BASE			(0x2c000000)
109ffc10373SLinus Walleij #elif CONFIG_TARGET_VEXPRESS64_JUNO
110ffc10373SLinus Walleij #define GICD_BASE			(0x2C010000)
111ffc10373SLinus Walleij #define GICC_BASE			(0x2C02f000)
112261d2760SDarwin Rambo #else
11303314f0eSLinus Walleij #error "Unknown board variant"
114c71645adSDavid Feng #endif
11503314f0eSLinus Walleij #endif /* !CONFIG_GICV3 */
11612916829SDavid Feng 
11712916829SDavid Feng #define CONFIG_SYS_MEMTEST_START	V2M_BASE
11812916829SDavid Feng #define CONFIG_SYS_MEMTEST_END		(V2M_BASE + 0x80000000)
11912916829SDavid Feng 
12012916829SDavid Feng /* Size of malloc() pool */
121d8bafe13SDavid Feng #define CONFIG_SYS_MALLOC_F_LEN		0x2000
1225bcae13eSTom Rini #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (8 << 20))
12312916829SDavid Feng 
124b31f9d7aSLinus Walleij /* Ethernet Configuration */
125b31f9d7aSLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
126b31f9d7aSLinus Walleij /* The real hardware Versatile express uses SMSC9118 */
127b31f9d7aSLinus Walleij #define CONFIG_SMC911X			1
128b31f9d7aSLinus Walleij #define CONFIG_SMC911X_32_BIT		1
129b31f9d7aSLinus Walleij #define CONFIG_SMC911X_BASE		(0x018000000)
130b31f9d7aSLinus Walleij #else
131b31f9d7aSLinus Walleij /* The Vexpress64 simulators use SMSC91C111 */
1323865ceb7SBhupesh Sharma #define CONFIG_SMC91111			1
1333865ceb7SBhupesh Sharma #define CONFIG_SMC91111_BASE		(0x01A000000)
134b31f9d7aSLinus Walleij #endif
13512916829SDavid Feng 
13612916829SDavid Feng /* PL011 Serial Configuration */
137d8bafe13SDavid Feng #define CONFIG_BAUDRATE			115200
138d8bafe13SDavid Feng #ifdef CONFIG_DM
139d8bafe13SDavid Feng #define CONFIG_DM_SERIAL
140d8bafe13SDavid Feng #define CONFIG_PL01X_SERIAL
141d8bafe13SDavid Feng #else
142d8bafe13SDavid Feng #define CONFIG_SYS_SERIAL0		V2M_UART0
143d8bafe13SDavid Feng #define CONFIG_SYS_SERIAL1		V2M_UART1
144d8bafe13SDavid Feng #define CONFIG_CONS_INDEX		0
14512916829SDavid Feng #define CONFIG_PL011_SERIAL
146ffc10373SLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
147ffc10373SLinus Walleij #define CONFIG_PL011_CLOCK		7273800
148ffc10373SLinus Walleij #else
14912916829SDavid Feng #define CONFIG_PL011_CLOCK		24000000
150ffc10373SLinus Walleij #endif
15112916829SDavid Feng #define CONFIG_PL01x_PORTS		{(void *)CONFIG_SYS_SERIAL0, \
15212916829SDavid Feng 					 (void *)CONFIG_SYS_SERIAL1}
153d8bafe13SDavid Feng #endif
15412916829SDavid Feng 
15512916829SDavid Feng #define CONFIG_BAUDRATE			115200
15612916829SDavid Feng #define CONFIG_SYS_SERIAL0		V2M_UART0
15712916829SDavid Feng #define CONFIG_SYS_SERIAL1		V2M_UART1
15812916829SDavid Feng 
15912916829SDavid Feng /* Command line configuration */
16012916829SDavid Feng #define CONFIG_MENU
16112916829SDavid Feng /*#define CONFIG_MENU_SHOW*/
16212916829SDavid Feng #define CONFIG_CMD_CACHE
16312916829SDavid Feng #define CONFIG_CMD_BDI
16467172528STom Rini #define CONFIG_CMD_BOOTI
16567172528STom Rini #define CONFIG_CMD_UNZIP
16612916829SDavid Feng #define CONFIG_CMD_DHCP
16712916829SDavid Feng #define CONFIG_CMD_PXE
16812916829SDavid Feng #define CONFIG_CMD_ENV
16912916829SDavid Feng #define CONFIG_CMD_IMI
170ffc10373SLinus Walleij #define CONFIG_CMD_LOADB
17112916829SDavid Feng #define CONFIG_CMD_MEMORY
17212916829SDavid Feng #define CONFIG_CMD_MII
17312916829SDavid Feng #define CONFIG_CMD_NET
17412916829SDavid Feng #define CONFIG_CMD_PING
17512916829SDavid Feng #define CONFIG_CMD_SAVEENV
17612916829SDavid Feng #define CONFIG_CMD_RUN
17712916829SDavid Feng #define CONFIG_CMD_BOOTD
17812916829SDavid Feng #define CONFIG_CMD_ECHO
17912916829SDavid Feng #define CONFIG_CMD_SOURCE
18012916829SDavid Feng #define CONFIG_CMD_FAT
18112916829SDavid Feng #define CONFIG_DOS_PARTITION
18212916829SDavid Feng 
18312916829SDavid Feng /* BOOTP options */
18412916829SDavid Feng #define CONFIG_BOOTP_BOOTFILESIZE
18512916829SDavid Feng #define CONFIG_BOOTP_BOOTPATH
18612916829SDavid Feng #define CONFIG_BOOTP_GATEWAY
18712916829SDavid Feng #define CONFIG_BOOTP_HOSTNAME
18812916829SDavid Feng #define CONFIG_BOOTP_PXE
18912916829SDavid Feng #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
19012916829SDavid Feng 
19112916829SDavid Feng /* Miscellaneous configurable options */
19212916829SDavid Feng #define CONFIG_SYS_LOAD_ADDR		(V2M_BASE + 0x10000000)
19312916829SDavid Feng 
19412916829SDavid Feng /* Physical Memory Map */
19512916829SDavid Feng #define CONFIG_NR_DRAM_BANKS		1
19612916829SDavid Feng #define PHYS_SDRAM_1			(V2M_BASE)	/* SDRAM Bank #1 */
19712916829SDavid Feng #define PHYS_SDRAM_1_SIZE		0x80000000	/* 2048 MB */
19812916829SDavid Feng #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
19912916829SDavid Feng 
20012916829SDavid Feng /* Initial environment variables */
201*10d1491bSLinus Walleij #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
202*10d1491bSLinus Walleij /*
203*10d1491bSLinus Walleij  * Defines where the kernel and FDT exist in NOR flash and where it will
204*10d1491bSLinus Walleij  * be copied into DRAM
205*10d1491bSLinus Walleij  */
206*10d1491bSLinus Walleij #define CONFIG_EXTRA_ENV_SETTINGS	\
207*10d1491bSLinus Walleij 				"kernel_name=Image\0"	\
208*10d1491bSLinus Walleij 				"kernel_addr=0x80000000\0" \
209*10d1491bSLinus Walleij 				"fdt_name=juno\0" \
210*10d1491bSLinus Walleij 				"fdt_addr=0x83000000\0" \
211*10d1491bSLinus Walleij 				"fdt_high=0xffffffffffffffff\0" \
212*10d1491bSLinus Walleij 				"initrd_high=0xffffffffffffffff\0" \
213*10d1491bSLinus Walleij 
214*10d1491bSLinus Walleij /* Assume we boot with root on the first partition of a USB stick */
215*10d1491bSLinus Walleij #define CONFIG_BOOTARGS		"console=ttyAMA0,115200n8 " \
216*10d1491bSLinus Walleij 				"root=/dev/sda1 rw " \
217*10d1491bSLinus Walleij 				"earlyprintk=pl011,0x7ff80000 debug user_debug=31 "\
218*10d1491bSLinus Walleij 				"loglevel=9"
219*10d1491bSLinus Walleij 
220*10d1491bSLinus Walleij /* Copy the kernel and FDT to DRAM memory and boot */
221*10d1491bSLinus Walleij #define CONFIG_BOOTCOMMAND	"afs load ${kernel_name} ${kernel_addr} ; " \
222*10d1491bSLinus Walleij 				"afs load  ${fdt_name} ${fdt_addr} ; " \
223*10d1491bSLinus Walleij 				"fdt addr ${fdt_addr}; fdt resize; " \
224*10d1491bSLinus Walleij 				"booti ${kernel_addr} - ${fdt_addr}"
225*10d1491bSLinus Walleij 
226*10d1491bSLinus Walleij #define CONFIG_BOOTDELAY		1
227*10d1491bSLinus Walleij 
228*10d1491bSLinus Walleij #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
22912916829SDavid Feng #define CONFIG_EXTRA_ENV_SETTINGS	\
230261d2760SDarwin Rambo 				"kernel_name=uImage\0"		\
23149995ffeSLinus Walleij 				"kernel_addr=0x80000000\0"	\
232261d2760SDarwin Rambo 				"initrd_name=ramdisk.img\0"	\
23349995ffeSLinus Walleij 				"initrd_addr=0x88000000\0"	\
234261d2760SDarwin Rambo 				"fdt_name=devtree.dtb\0"	\
23549995ffeSLinus Walleij 				"fdt_addr=0x83000000\0"		\
236261d2760SDarwin Rambo 				"fdt_high=0xffffffffffffffff\0"	\
237261d2760SDarwin Rambo 				"initrd_high=0xffffffffffffffff\0"
238261d2760SDarwin Rambo 
239261d2760SDarwin Rambo #define CONFIG_BOOTARGS		"console=ttyAMA0 earlyprintk=pl011,"\
240261d2760SDarwin Rambo 				"0x1c090000 debug user_debug=31 "\
241261d2760SDarwin Rambo 				"loglevel=9"
242261d2760SDarwin Rambo 
24349995ffeSLinus Walleij #define CONFIG_BOOTCOMMAND	"smhload ${kernel_name} ${kernel_addr}; " \
24449995ffeSLinus Walleij 				"smhload ${fdt_name} $fdt_addr; " \
24549995ffeSLinus Walleij 				"smhload ${initrd_name} $initrd_addr initrd_end; " \
24649995ffeSLinus Walleij 				"fdt addr $fdt_addr; fdt resize; " \
24749995ffeSLinus Walleij 				"fdt chosen $initrd_addr $initrd_end; " \
24849995ffeSLinus Walleij 				"bootm $kernel_addr - $fdt_addr"
249261d2760SDarwin Rambo 
250261d2760SDarwin Rambo #define CONFIG_BOOTDELAY		1
251261d2760SDarwin Rambo 
252261d2760SDarwin Rambo #else
25303314f0eSLinus Walleij #error "Unknown board variant"
254261d2760SDarwin Rambo #endif
25512916829SDavid Feng 
25612916829SDavid Feng /* Do not preserve environment */
25712916829SDavid Feng #define CONFIG_ENV_IS_NOWHERE		1
25812916829SDavid Feng #define CONFIG_ENV_SIZE			0x1000
25912916829SDavid Feng 
26012916829SDavid Feng /* Monitor Command Prompt */
26112916829SDavid Feng #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
26212916829SDavid Feng #define CONFIG_SYS_PROMPT		"VExpress64# "
26312916829SDavid Feng #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
26412916829SDavid Feng 					sizeof(CONFIG_SYS_PROMPT) + 16)
26512916829SDavid Feng #define CONFIG_SYS_HUSH_PARSER
26612916829SDavid Feng #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
26712916829SDavid Feng #define CONFIG_SYS_LONGHELP
2685bcae13eSTom Rini #define CONFIG_CMDLINE_EDITING
26912916829SDavid Feng #define CONFIG_SYS_MAXARGS		64	/* max command args */
27012916829SDavid Feng 
27114f264e6SLinus Walleij /* Flash memory is available on the Juno board only */
27214f264e6SLinus Walleij #ifndef CONFIG_TARGET_VEXPRESS64_JUNO
27314f264e6SLinus Walleij #define CONFIG_SYS_NO_FLASH
27414f264e6SLinus Walleij #else
27514f264e6SLinus Walleij #define CONFIG_CMD_FLASH
276*10d1491bSLinus Walleij #define CONFIG_CMD_ARMFLASH
27714f264e6SLinus Walleij #define CONFIG_SYS_FLASH_CFI		1
27814f264e6SLinus Walleij #define CONFIG_FLASH_CFI_DRIVER		1
27914f264e6SLinus Walleij #define CONFIG_SYS_FLASH_BASE		0x08000000
28014f264e6SLinus Walleij #define CONFIG_SYS_FLASH_SIZE		0x04000000 /* 64 MiB */
28114f264e6SLinus Walleij #define CONFIG_SYS_MAX_FLASH_BANKS	2
28214f264e6SLinus Walleij 
28314f264e6SLinus Walleij /* Timeout values in ticks */
28414f264e6SLinus Walleij #define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Erase Timeout */
28514f264e6SLinus Walleij #define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Write Timeout */
28614f264e6SLinus Walleij 
28714f264e6SLinus Walleij /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
28814f264e6SLinus Walleij #define CONFIG_SYS_MAX_FLASH_SECT	259		/* Max sectors */
28914f264e6SLinus Walleij #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
29014f264e6SLinus Walleij #define CONFIG_SYS_FLASH_PROTECTION	/* The devices have real protection */
29114f264e6SLinus Walleij #define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
29214f264e6SLinus Walleij 
29314f264e6SLinus Walleij #endif
29414f264e6SLinus Walleij 
29512916829SDavid Feng #endif /* __VEXPRESS_AEMV8A_H */
296