xref: /rk3399_rockchip-uboot/include/configs/vct.h (revision 78d1e1d0a157c8b48ea19be6170b992745d30f38)
1 /*
2  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 /*
8  * This file contains the configuration parameters for the VCT board
9  * family:
10  *
11  * vct_premium
12  * vct_premium_small
13  * vct_premium_onenand
14  * vct_premium_onenand_small
15  * vct_platinum
16  * vct_platinum_small
17  * vct_platinum_onenand
18  * vct_platinum_onenand_small
19  * vct_platinumavc
20  * vct_platinumavc_small
21  * vct_platinumavc_onenand
22  * vct_platinumavc_onenand_small
23  */
24 
25 #ifndef __CONFIG_H
26 #define __CONFIG_H
27 
28 #define CONFIG_DISPLAY_BOARDINFO
29 
30 #define CPU_CLOCK_RATE			324000000 /* Clock for the MIPS core */
31 #define CONFIG_SYS_MIPS_TIMER_FREQ	(CPU_CLOCK_RATE / 2)
32 
33 #define CONFIG_SKIP_LOWLEVEL_INIT	/* SDRAM is initialized by the bootstrap code */
34 
35 #define CONFIG_SYS_TEXT_BASE		0x87000000
36 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
37 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
38 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
39 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 << 10)
40 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
41 
42 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
43 #define CONFIG_VCT_NOR
44 #else
45 #define CONFIG_SYS_NO_FLASH
46 #endif
47 
48 /*
49  * UART
50  */
51 #ifdef CONFIG_VCT_PLATINUMAVC
52 #define UART_1_BASE		0xBDC30000
53 #else
54 #define UART_1_BASE		0xBF89C000
55 #endif
56 
57 #define CONFIG_SYS_NS16550_SERIAL
58 #define CONFIG_SYS_NS16550_REG_SIZE	-4
59 #define CONFIG_SYS_NS16550_COM1		UART_1_BASE
60 #define CONFIG_CONS_INDEX		1
61 #define CONFIG_SYS_NS16550_CLK		921600
62 #define CONFIG_BAUDRATE			115200
63 
64 /*
65  * SDRAM
66  */
67 #define CONFIG_SYS_SDRAM_BASE		0x80000000
68 #define CONFIG_SYS_MBYTES_SDRAM		128
69 #define CONFIG_SYS_MEMTEST_START	0x80200000
70 #define CONFIG_SYS_MEMTEST_END		0x80400000
71 #define CONFIG_SYS_LOAD_ADDR		0x80400000	/* default load address */
72 
73 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
74 /*
75  * SMSC91C11x Network Card
76  */
77 #define CONFIG_SMC911X
78 #define CONFIG_SMC911X_BASE	0x00000000
79 #define CONFIG_SMC911X_32_BIT
80 #define CONFIG_NET_RETRY_COUNT		20
81 #endif
82 
83 /*
84  * Commands
85  */
86 #define CONFIG_CMD_EEPROM
87 
88 /*
89  * Only Premium/Platinum have ethernet support right now
90  */
91 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
92 	!defined(CONFIG_VCT_SMALL_IMAGE)
93 #endif
94 
95 /*
96  * Only Premium/Platinum have USB-EHCI support right now
97  */
98 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
99 	!defined(CONFIG_VCT_SMALL_IMAGE)
100 #define CONFIG_CMD_FAT
101 #endif
102 
103 #if defined(CONFIG_CMD_USB)
104 #define CONFIG_USB_STORAGE
105 #define CONFIG_DOS_PARTITION
106 #define CONFIG_ISO_PARTITION
107 
108 #define CONFIG_SUPPORT_VFAT
109 
110 /*
111  * USB/EHCI
112  */
113 #define CONFIG_USB_EHCI			/* Enable EHCI USB support	*/
114 #define CONFIG_USB_EHCI_VCT		/* on VCT platform		*/
115 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
116 #define CONFIG_EHCI_DESC_BIG_ENDIAN
117 #define CONFIG_EHCI_IS_TDI
118 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
119 #endif /* CONFIG_CMD_USB */
120 
121 #if defined(CONFIG_VCT_NAND)
122 #define CONFIG_CMD_NAND
123 #endif
124 
125 #if defined(CONFIG_VCT_ONENAND)
126 #define CONFIG_CMD_ONENAND
127 #endif
128 
129 /*
130  * BOOTP options
131  */
132 #define CONFIG_BOOTP_BOOTFILESIZE
133 #define CONFIG_BOOTP_BOOTPATH
134 #define CONFIG_BOOTP_GATEWAY
135 #define CONFIG_BOOTP_HOSTNAME
136 #define CONFIG_BOOTP_SUBNETMASK
137 
138 /*
139  * Miscellaneous configurable options
140  */
141 #define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
142 #define CONFIG_SYS_CBSIZE	512		/* Console I/O Buffer Size	*/
143 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
144 				 sizeof(CONFIG_SYS_PROMPT) + 16)
145 #define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
146 #define CONFIG_TIMESTAMP			/* Print image info with timestamp */
147 #define CONFIG_CMDLINE_EDITING			/* add command line history	*/
148 #define CONFIG_SYS_CONSOLE_INFO_QUIET		/* don't print console @ startup*/
149 
150 /*
151  * FLASH and environment organization
152  */
153 #if defined(CONFIG_VCT_NOR)
154 #define CONFIG_ENV_IS_IN_FLASH
155 #define CONFIG_FLASH_NOT_MEM_MAPPED
156 
157 /*
158  * We need special accessor functions for the CFI FLASH driver. This
159  * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
160  */
161 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
162 
163 /*
164  * For the non-memory-mapped NOR FLASH, we need to define the
165  * NOR FLASH area. This can't be detected via the addr2info()
166  * function, since we check for flash access in the very early
167  * U-Boot code, before the NOR FLASH is detected.
168  */
169 #define CONFIG_FLASH_BASE		0xb0000000
170 #define CONFIG_FLASH_END		0xbfffffff
171 
172 /*
173  * CFI driver settings
174  */
175 #define CONFIG_SYS_FLASH_CFI			/* The flash is CFI compatible	*/
176 #define CONFIG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
177 #define CONFIG_SYS_FLASH_CFI_AMD_RESET	1	/* Use AMD (Spansion) reset cmd */
178 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT	/* no byte writes on IXP4xx	*/
179 
180 #define CONFIG_SYS_FLASH_BASE		0xb0000000
181 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
182 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
183 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max number of sectors on one chip	*/
184 
185 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
186 #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
187 
188 #ifdef CONFIG_ENV_IS_IN_FLASH
189 #define CONFIG_ENV_SECT_SIZE	0x10000		/* size of one complete sector	*/
190 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
191 #define	CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*/
192 
193 /* Address and size of Redundant Environment Sector	*/
194 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
195 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
196 #endif /* CONFIG_ENV_IS_IN_FLASH */
197 #endif /* CONFIG_VCT_NOR */
198 
199 #if defined(CONFIG_VCT_ONENAND)
200 #define CONFIG_USE_ONENAND_BOARD_INIT
201 #define	CONFIG_ENV_IS_IN_ONENAND
202 #define	CONFIG_SYS_ONENAND_BASE		0x00000000	/* this is not real address */
203 #define CONFIG_SYS_FLASH_BASE		0x00000000
204 #define CONFIG_ENV_ADDR			(128 << 10)	/* after compr. U-Boot image */
205 #define	CONFIG_ENV_SIZE			(128 << 10)	/* erase size */
206 #endif /* CONFIG_VCT_ONENAND */
207 
208 /*
209  * Cache Configuration
210  */
211 #define CONFIG_SYS_DCACHE_SIZE		16384
212 #define CONFIG_SYS_ICACHE_SIZE		16384
213 #define CONFIG_SYS_CACHELINE_SIZE	32
214 
215 /*
216  * I2C/EEPROM
217  */
218 #define CONFIG_SYS_I2C
219 #define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
220 #define CONFIG_SYS_I2C_SOFT_SPEED	83000	/* 83 kHz is supposed to work */
221 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x7f
222 
223 /*
224  * Software (bit-bang) I2C driver configuration
225  */
226 #define CONFIG_SYS_GPIO_I2C_SCL		11
227 #define CONFIG_SYS_GPIO_I2C_SDA		10
228 
229 #ifndef __ASSEMBLY__
230 int vct_gpio_dir(int pin, int dir);
231 void vct_gpio_set(int pin, int val);
232 int vct_gpio_get(int pin);
233 #endif
234 
235 #define I2C_INIT	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
236 #define I2C_ACTIVE	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
237 #define I2C_TRISTATE	vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
238 #define I2C_READ	vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
239 #define I2C_SDA(bit)	vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
240 #define I2C_SCL(bit)	vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
241 #define I2C_DELAY	udelay(5)	/* 1/4 I2C clock duration */
242 
243 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
244 /* CAT24WC32 */
245 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2	/* Bytes of address		*/
246 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5	/* The Catalyst CAT24WC32 has	*/
247 					/* 32 byte page write mode using*/
248 					/* last 5 bits of the address	*/
249 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10   /* and takes up to 10 msec */
250 
251 #define CONFIG_BOOTCOMMAND	"run test3"
252 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
253 
254 /*
255  * UBI configuration
256  */
257 #if defined(CONFIG_VCT_ONENAND)
258 #define CONFIG_SYS_USE_UBI
259 #define	CONFIG_CMD_JFFS2
260 #define	CONFIG_CMD_UBI
261 #define	CONFIG_RBTREE
262 #define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
263 #define CONFIG_MTD_PARTITIONS
264 #define CONFIG_CMD_MTDPARTS
265 
266 #define MTDIDS_DEFAULT		"onenand0=onenand"
267 #define MTDPARTS_DEFAULT	"mtdparts=onenand:128k(u-boot),"	\
268 					"128k(env),"		\
269 					"20m(kernel),"		\
270 					"-(rootfs)"
271 #endif
272 
273 /*
274  * We need a small, stripped down image to fit into the first 128k OneNAND
275  * erase block (gzipped). This image only needs basic commands for FLASH
276  * (NOR/OneNAND) usage and Linux kernel booting.
277  */
278 #if defined(CONFIG_VCT_SMALL_IMAGE)
279 #undef CONFIG_CMD_ASKENV
280 #undef CONFIG_CMD_BEDBUG
281 #undef CONFIG_CMD_CACHE
282 #undef CONFIG_CMD_EEPROM
283 #undef CONFIG_CMD_EEPROM
284 #undef CONFIG_CMD_FAT
285 #undef CONFIG_CMD_IRQ
286 #undef CONFIG_CMD_LOADY
287 #undef CONFIG_CMD_MII
288 #undef CONFIG_CMD_REGINFO
289 #undef CONFIG_CMD_STRINGS
290 #undef CONFIG_CMD_TERMINAL
291 
292 #undef CONFIG_SMC911X
293 #undef CONFIG_SYS_I2C_SOFT
294 #undef CONFIG_SOURCE
295 #undef CONFIG_SYS_LONGHELP
296 #undef CONFIG_TIMESTAMP
297 #endif /* CONFIG_VCT_SMALL_IMAGE */
298 
299 #endif  /* __CONFIG_H */
300