13bf801a2SAndrej Rosano /* 23bf801a2SAndrej Rosano * USB armory MkI board configuration settings 33bf801a2SAndrej Rosano * http://inversepath.com/usbarmory 43bf801a2SAndrej Rosano * 53bf801a2SAndrej Rosano * Copyright (C) 2015, Inverse Path 63bf801a2SAndrej Rosano * Andrej Rosano <andrej@inversepath.com> 73bf801a2SAndrej Rosano * 83bf801a2SAndrej Rosano * SPDX-License-Identifier:|____GPL-2.0+ 93bf801a2SAndrej Rosano */ 103bf801a2SAndrej Rosano 113bf801a2SAndrej Rosano #ifndef __CONFIG_H 123bf801a2SAndrej Rosano #define __CONFIG_H 133bf801a2SAndrej Rosano 1418fb0e3cSGong Qianyu #define CONFIG_SYS_FSL_CLK 153bf801a2SAndrej Rosano #define CONFIG_MXC_GPIO 163bf801a2SAndrej Rosano 173bf801a2SAndrej Rosano #include <asm/arch/imx-regs.h> 183bf801a2SAndrej Rosano 193bf801a2SAndrej Rosano #include <config_distro_defaults.h> 203bf801a2SAndrej Rosano 213bf801a2SAndrej Rosano /* U-Boot environment */ 223bf801a2SAndrej Rosano #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 233bf801a2SAndrej Rosano #define CONFIG_ENV_SIZE (8 * 1024) 243bf801a2SAndrej Rosano #define CONFIG_SYS_MMC_ENV_DEV 0 253bf801a2SAndrej Rosano 263bf801a2SAndrej Rosano /* U-Boot general configurations */ 273bf801a2SAndrej Rosano #define CONFIG_SYS_CBSIZE 512 283bf801a2SAndrej Rosano 293bf801a2SAndrej Rosano /* UART */ 303bf801a2SAndrej Rosano #define CONFIG_MXC_UART 313bf801a2SAndrej Rosano #define CONFIG_MXC_UART_BASE UART1_BASE 323bf801a2SAndrej Rosano #define CONFIG_CONS_INDEX 1 333bf801a2SAndrej Rosano 343bf801a2SAndrej Rosano /* SD/MMC */ 353bf801a2SAndrej Rosano #define CONFIG_FSL_ESDHC 363bf801a2SAndrej Rosano #define CONFIG_SYS_FSL_ESDHC_ADDR 0 373bf801a2SAndrej Rosano #define CONFIG_SYS_FSL_ESDHC_NUM 1 383bf801a2SAndrej Rosano 393bf801a2SAndrej Rosano /* USB */ 403bf801a2SAndrej Rosano #define CONFIG_USB_EHCI_MX5 413bf801a2SAndrej Rosano #define CONFIG_MXC_USB_PORT 1 423bf801a2SAndrej Rosano #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 433bf801a2SAndrej Rosano #define CONFIG_MXC_USB_FLAGS 0 443bf801a2SAndrej Rosano 453bf801a2SAndrej Rosano /* I2C */ 463bf801a2SAndrej Rosano #define CONFIG_SYS_I2C 473bf801a2SAndrej Rosano #define CONFIG_SYS_I2C_MXC 4803544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 4903544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 503bf801a2SAndrej Rosano 513bf801a2SAndrej Rosano /* Fuse */ 523bf801a2SAndrej Rosano #define CONFIG_FSL_IIM 533bf801a2SAndrej Rosano 549a45ec3eSAndrej Rosano /* U-Boot memory offsets */ 553bf801a2SAndrej Rosano #define CONFIG_LOADADDR 0x72000000 563bf801a2SAndrej Rosano #define CONFIG_SYS_TEXT_BASE 0x77800000 573bf801a2SAndrej Rosano #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 589a45ec3eSAndrej Rosano 599a45ec3eSAndrej Rosano /* Linux boot */ 603bf801a2SAndrej Rosano #define CONFIG_HOSTNAME usbarmory 613bf801a2SAndrej Rosano #define CONFIG_BOOTCOMMAND \ 623bf801a2SAndrej Rosano "run distro_bootcmd; " \ 633bf801a2SAndrej Rosano "setenv bootargs console=${console} ${bootargs_default}; " \ 649a45ec3eSAndrej Rosano "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ 653bf801a2SAndrej Rosano "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ 669a45ec3eSAndrej Rosano "bootz ${kernel_addr_r} - ${fdt_addr_r}" 673bf801a2SAndrej Rosano 683bf801a2SAndrej Rosano #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) 693bf801a2SAndrej Rosano 703bf801a2SAndrej Rosano #include <config_distro_bootcmd.h> 713bf801a2SAndrej Rosano 723bf801a2SAndrej Rosano #define MEM_LAYOUT_ENV_SETTINGS \ 733bf801a2SAndrej Rosano "kernel_addr_r=0x70800000\0" \ 743bf801a2SAndrej Rosano "fdt_addr_r=0x71000000\0" \ 753bf801a2SAndrej Rosano "scriptaddr=0x70800000\0" \ 763bf801a2SAndrej Rosano "pxefile_addr_r=0x70800000\0" \ 773bf801a2SAndrej Rosano "ramdisk_addr_r=0x73000000\0" 783bf801a2SAndrej Rosano 793bf801a2SAndrej Rosano #define CONFIG_EXTRA_ENV_SETTINGS \ 803bf801a2SAndrej Rosano MEM_LAYOUT_ENV_SETTINGS \ 813bf801a2SAndrej Rosano "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ 823bf801a2SAndrej Rosano "fdtfile=imx53-usbarmory.dtb\0" \ 833bf801a2SAndrej Rosano "console=ttymxc0,115200\0" \ 843bf801a2SAndrej Rosano BOOTENV 853bf801a2SAndrej Rosano 86*a02ab5eaSAndrej Rosano #ifndef CONFIG_CMDLINE 87*a02ab5eaSAndrej Rosano #define USBARMORY_FIT_PATH "/boot/usbarmory.itb" 88*a02ab5eaSAndrej Rosano #define USBARMORY_FIT_ADDR "0x70800000" 89*a02ab5eaSAndrej Rosano #endif 90*a02ab5eaSAndrej Rosano 913bf801a2SAndrej Rosano /* Physical Memory Map */ 923bf801a2SAndrej Rosano #define CONFIG_NR_DRAM_BANKS 1 933bf801a2SAndrej Rosano #define PHYS_SDRAM CSD0_BASE_ADDR 943bf801a2SAndrej Rosano #define PHYS_SDRAM_SIZE (gd->ram_size) 953bf801a2SAndrej Rosano 963bf801a2SAndrej Rosano #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 973bf801a2SAndrej Rosano #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 983bf801a2SAndrej Rosano #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 993bf801a2SAndrej Rosano 1003bf801a2SAndrej Rosano #define CONFIG_SYS_INIT_SP_OFFSET \ 1013bf801a2SAndrej Rosano (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 1023bf801a2SAndrej Rosano #define CONFIG_SYS_INIT_SP_ADDR \ 1033bf801a2SAndrej Rosano (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 1043bf801a2SAndrej Rosano 1053bf801a2SAndrej Rosano #define CONFIG_SYS_MEMTEST_START 0x70000000 1063bf801a2SAndrej Rosano #define CONFIG_SYS_MEMTEST_END 0x90000000 1073bf801a2SAndrej Rosano 1083bf801a2SAndrej Rosano #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 1093bf801a2SAndrej Rosano 1103bf801a2SAndrej Rosano #endif /* __CONFIG_H */ 111