xref: /rk3399_rockchip-uboot/include/configs/ts4800.h (revision 19a9747535c105fa458d0c9929e6785cf56d1292)
1 /*
2  * Copyright (C) 2015, Savoir-faire Linux Inc.
3  *
4  * Derived from MX51EVK code by
5  *   Guennadi Liakhovetski <lg@denx.de>
6  *   Freescale Semiconductor, Inc.
7  *
8  * Configuration settings for the TS4800 Board
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 /* High Level Configuration Options */
17 #define CONFIG_MX51
18 
19 #define CONFIG_DISPLAY_BOARDINFO
20 
21 #define CONFIG_SYS_NO_FLASH		/* No NOR Flash */
22 #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 2nd stage bootloader */
23 
24 #define CONFIG_HW_WATCHDOG
25 
26 #define CONFIG_MACH_TYPE	MACH_TYPE_TS48XX
27 
28 /* text base address used when linking */
29 #define CONFIG_SYS_TEXT_BASE	0x90008000
30 
31 #include <asm/arch/imx-regs.h>
32 
33 /* enable passing of ATAGs */
34 #define CONFIG_CMDLINE_TAG
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
38 
39 /*
40  * Size of malloc() pool
41  */
42 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
43 
44 /*
45  * Hardware drivers
46  */
47 
48 #define CONFIG_MXC_UART
49 #define CONFIG_MXC_UART_BASE	UART1_BASE
50 #define CONFIG_MXC_GPIO
51 
52 /*
53  * SPI Configs
54  * */
55 #define CONFIG_HARD_SPI /* puts SPI: ready */
56 #define CONFIG_MXC_SPI /* driver for the SPI controllers*/
57 
58 /*
59  * MMC Configs
60  * */
61 #define CONFIG_FSL_ESDHC
62 #define CONFIG_SYS_FSL_ESDHC_ADDR	MMC_SDHC1_BASE_ADDR
63 
64 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
65 
66 #define CONFIG_MMC
67 
68 #define CONFIG_GENERIC_MMC
69 #define CONFIG_DOS_PARTITION
70 
71 /*
72  * Eth Configs
73  */
74 #define CONFIG_MII
75 #define CONFIG_PHYLIB
76 #define CONFIG_PHY_SMSC
77 
78 #define CONFIG_FEC_MXC
79 #define IMX_FEC_BASE	        FEC_BASE_ADDR
80 #define CONFIG_ETHPRIME		"FEC"
81 #define CONFIG_FEC_MXC_PHYADDR	0
82 
83 /* allow to overwrite serial and ethaddr */
84 #define CONFIG_ENV_OVERWRITE		/* disable vendor parameters protection (serial#, ethaddr) */
85 #define CONFIG_CONS_INDEX		1 /* use UART0 : used by serial driver */
86 #define CONFIG_BAUDRATE			115200
87 
88 /***********************************************************
89  * Command definition
90  ***********************************************************/
91 
92 /* Environment variables */
93 
94 
95 #define CONFIG_LOADADDR		0x91000000	/* loadaddr env var */
96 
97 #define CONFIG_EXTRA_ENV_SETTINGS \
98 	"script=boot.scr\0" \
99 	"image=zImage\0" \
100 	"fdt_file=imx51-ts4800.dtb\0" \
101 	"fdt_addr=0x90fe0000\0" \
102 	"mmcdev=0\0" \
103 	"mmcpart=2\0" \
104 	"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
105 	"mmcargs=setenv bootargs root=${mmcroot}\0" \
106 	"addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
107 	"loadbootscript=" \
108 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
109 	"bootscript=echo Running bootscript from mmc ...; " \
110 		"source\0" \
111 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
112 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
113 	"mmcboot=echo Booting from mmc ...; " \
114 		"run mmcargs addtty; " \
115 		"if run loadfdt; then " \
116 			"bootz ${loadaddr} - ${fdt_addr}; " \
117 		"else " \
118 			"echo ERR: cannot load FDT; " \
119 		"fi; "
120 
121 
122 #define CONFIG_BOOTCOMMAND \
123 	"mmc dev ${mmcdev}; if mmc rescan; then " \
124 		"if run loadbootscript; then " \
125 			"run bootscript; " \
126 		"else " \
127 			"if run loadimage; then " \
128 				"run mmcboot; " \
129 			"fi; " \
130 		"fi; " \
131 	"fi; "
132 
133 /*
134  * Miscellaneous configurable options
135  */
136 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
137 #define CONFIG_AUTO_COMPLETE
138 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
139 /* Print Buffer Size */
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
141 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
143 
144 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
145 
146 #define CONFIG_CMDLINE_EDITING
147 
148 /*-----------------------------------------------------------------------
149  * Physical Memory Map
150  */
151 #define CONFIG_NR_DRAM_BANKS	1
152 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
153 #define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)
154 
155 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
156 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
157 #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
158 
159 #define CONFIG_BOARD_EARLY_INIT_F
160 
161 #define CONFIG_SYS_INIT_SP_OFFSET \
162 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
163 #define CONFIG_SYS_INIT_SP_ADDR \
164 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
165 
166 /* Low level init */
167 #define CONFIG_SYS_DDR_CLKSEL	0
168 #define CONFIG_SYS_CLKTL_CBCDR	0x59E35100
169 #define CONFIG_SYS_MAIN_PWR_ON
170 
171 /*-----------------------------------------------------------------------
172  * Environment organization
173  */
174 
175 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
176 #define CONFIG_ENV_SIZE        (8 * 1024)
177 #define CONFIG_ENV_IS_IN_MMC
178 #define CONFIG_SYS_MMC_ENV_DEV 0
179 
180 #endif
181