1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2012 8 * Corscience GmbH & Co. KG 9 * Thomas Weber <weber@corscience.de> 10 * 11 * Configuration settings for the Tricorder board. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #ifndef __CONFIG_H 17 #define __CONFIG_H 18 19 /* High Level Configuration Options */ 20 #define CONFIG_SYS_THUMB_BUILD 21 #define CONFIG_OMAP /* in a TI OMAP core */ 22 /* Common ARM Erratas */ 23 #define CONFIG_ARM_ERRATA_454179 24 #define CONFIG_ARM_ERRATA_430973 25 #define CONFIG_ARM_ERRATA_621766 26 27 /* 28 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 29 * 64 bytes before this address should be set aside for u-boot.img's 30 * header. That is 0x800FFFC0--0x80100000 should not be used for any 31 * other needs. 32 */ 33 #define CONFIG_SYS_TEXT_BASE 0x80100000 34 35 #define CONFIG_SDRC /* The chip has SDRC controller */ 36 37 #include <asm/arch/cpu.h> /* get chip and board defs */ 38 #include <asm/arch/omap.h> 39 40 /* Clock Defines */ 41 #define V_OSCK 26000000 /* Clock output from T2 */ 42 #define V_SCLK (V_OSCK >> 1) 43 44 #define CONFIG_MISC_INIT_R 45 46 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 47 #define CONFIG_SETUP_MEMORY_TAGS 48 #define CONFIG_INITRD_TAG 49 #define CONFIG_REVISION_TAG 50 51 /* Size of malloc() pool */ 52 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 53 54 /* Hardware drivers */ 55 56 /* GPIO support */ 57 #define CONFIG_OMAP_GPIO 58 59 /* GPIO banks */ 60 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */ 61 62 /* LED support */ 63 64 /* NS16550 Configuration */ 65 #define CONFIG_SYS_NS16550_SERIAL 66 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 67 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 68 69 /* select serial console configuration */ 70 #define CONFIG_CONS_INDEX 3 71 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 72 #define CONFIG_SERIAL3 3 73 #define CONFIG_BAUDRATE 115200 74 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 75 115200} 76 77 /* MMC */ 78 #define CONFIG_GENERIC_MMC 79 80 /* I2C */ 81 #define CONFIG_SYS_I2C 82 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 83 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 84 #define CONFIG_SYS_I2C_OMAP34XX 85 86 87 /* EEPROM */ 88 #define CONFIG_CMD_EEPROM 89 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 90 #define CONFIG_SYS_EEPROM_BUS_NUM 1 91 92 /* TWL4030 */ 93 #define CONFIG_TWL4030_POWER 94 #define CONFIG_TWL4030_LED 95 96 /* Board NAND Info */ 97 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 98 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 99 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 100 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 101 "128k(SPL)," \ 102 "1m(u-boot)," \ 103 "384k(u-boot-env1)," \ 104 "1152k(mtdoops)," \ 105 "384k(u-boot-env2)," \ 106 "5m(kernel)," \ 107 "2m(fdt)," \ 108 "-(ubi)" 109 110 #define CONFIG_NAND_OMAP_GPMC 111 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 112 /* to access nand */ 113 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 114 /* to access nand at */ 115 /* CS0 */ 116 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 117 /* devices */ 118 #define CONFIG_BCH 119 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 120 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 121 122 /* commands to include */ 123 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 124 #define CONFIG_CMD_NAND /* NAND support */ 125 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 126 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 127 #define CONFIG_LZO /* LZO is needed for UBIFS */ 128 129 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 130 131 /* needed for ubi */ 132 #define CONFIG_RBTREE 133 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 134 #define CONFIG_MTD_PARTITIONS 135 136 /* Environment information (this is the common part) */ 137 138 139 /* hang() the board on panic() */ 140 #define CONFIG_PANIC_HANG 141 142 /* environment placement (for NAND), is different for FLASHCARD but does not 143 * harm there */ 144 #define CONFIG_ENV_OFFSET 0x120000 /* env start */ 145 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ 146 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ 147 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ 148 149 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend 150 * value can not be used here! */ 151 #define CONFIG_LOADADDR 0x82000000 152 153 #define CONFIG_COMMON_ENV_SETTINGS \ 154 "console=ttyO2,115200n8\0" \ 155 "mmcdev=0\0" \ 156 "vram=3M\0" \ 157 "defaultdisplay=lcd\0" \ 158 "kernelopts=mtdoops.mtddev=3\0" \ 159 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 160 "mtdids=" MTDIDS_DEFAULT "\0" \ 161 "commonargs=" \ 162 "setenv bootargs console=${console} " \ 163 "${mtdparts} " \ 164 "${kernelopts} " \ 165 "vt.global_cursor_default=0 " \ 166 "vram=${vram} " \ 167 "omapdss.def_disp=${defaultdisplay}\0" 168 169 #define CONFIG_BOOTCOMMAND "run autoboot" 170 171 /* specific environment settings for different use cases 172 * FLASHCARD: used to run a rdimage from sdcard to program the device 173 * 'NORMAL': used to boot kernel from sdcard, nand, ... 174 * 175 * The main aim for the FLASHCARD skin is to have an embedded environment 176 * which will not be influenced by any data already on the device. 177 */ 178 #ifdef CONFIG_FLASHCARD 179 180 #define CONFIG_ENV_IS_NOWHERE 181 182 /* the rdaddr is 16 MiB before the loadaddr */ 183 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0" 184 185 #define CONFIG_EXTRA_ENV_SETTINGS \ 186 CONFIG_COMMON_ENV_SETTINGS \ 187 CONFIG_ENV_RDADDR \ 188 "autoboot=" \ 189 "run commonargs; " \ 190 "setenv bootargs ${bootargs} " \ 191 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \ 192 "rdinit=/sbin/init; " \ 193 "mmc dev ${mmcdev}; mmc rescan; " \ 194 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \ 195 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \ 196 "bootm ${loadaddr} ${rdaddr}\0" 197 198 #else /* CONFIG_FLASHCARD */ 199 200 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 201 202 #define CONFIG_ENV_IS_IN_NAND 203 204 #define CONFIG_EXTRA_ENV_SETTINGS \ 205 CONFIG_COMMON_ENV_SETTINGS \ 206 "mmcargs=" \ 207 "run commonargs; " \ 208 "setenv bootargs ${bootargs} " \ 209 "root=/dev/mmcblk0p2 " \ 210 "rootwait " \ 211 "rw\0" \ 212 "nandargs=" \ 213 "run commonargs; " \ 214 "setenv bootargs ${bootargs} " \ 215 "root=ubi0:root " \ 216 "ubi.mtd=7 " \ 217 "rootfstype=ubifs " \ 218 "ro\0" \ 219 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 220 "bootscript=echo Running bootscript from mmc ...; " \ 221 "source ${loadaddr}\0" \ 222 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 223 "mmcboot=echo Booting from mmc ...; " \ 224 "run mmcargs; " \ 225 "bootm ${loadaddr}\0" \ 226 "loaduimage_ubi=ubi part ubi; " \ 227 "ubifsmount ubi:root; " \ 228 "ubifsload ${loadaddr} /boot/uImage\0" \ 229 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \ 230 "nandboot=echo Booting from nand ...; " \ 231 "run nandargs; " \ 232 "run loaduimage_nand; " \ 233 "bootm ${loadaddr}\0" \ 234 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 235 "if run loadbootscript; then " \ 236 "run bootscript; " \ 237 "else " \ 238 "if run loaduimage; then " \ 239 "run mmcboot; " \ 240 "else run nandboot; " \ 241 "fi; " \ 242 "fi; " \ 243 "else run nandboot; fi\0" 244 245 #endif /* CONFIG_FLASHCARD */ 246 247 /* Miscellaneous configurable options */ 248 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 249 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */ 250 #define CONFIG_AUTO_COMPLETE 251 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 252 /* Print Buffer Size */ 253 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 254 sizeof(CONFIG_SYS_PROMPT) + 16) 255 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 256 257 /* Boot Argument Buffer Size */ 258 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 259 260 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) 261 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 262 0x07000000) /* 112 MB */ 263 264 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 265 266 /* 267 * OMAP3 has 12 GP timers, they can be driven by the system clock 268 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 269 * This rate is divided by a local divisor. 270 */ 271 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 272 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 273 274 /* Physical Memory Map */ 275 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 276 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 277 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 278 279 /* NAND and environment organization */ 280 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 281 282 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 283 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 284 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 285 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 286 CONFIG_SYS_INIT_RAM_SIZE - \ 287 GENERATED_GBL_DATA_SIZE) 288 289 /* SRAM config */ 290 #define CONFIG_SYS_SRAM_START 0x40200000 291 #define CONFIG_SYS_SRAM_SIZE 0x10000 292 293 /* Defines for SPL */ 294 #define CONFIG_SPL_FRAMEWORK 295 #define CONFIG_SPL_NAND_SIMPLE 296 297 #define CONFIG_SPL_BOARD_INIT 298 #define CONFIG_SPL_NAND_BASE 299 #define CONFIG_SPL_NAND_DRIVERS 300 #define CONFIG_SPL_NAND_ECC 301 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 302 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 303 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 304 305 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 306 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 307 CONFIG_SPL_TEXT_BASE) 308 309 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 310 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 311 312 /* NAND boot config */ 313 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 314 #define CONFIG_SYS_NAND_PAGE_COUNT 64 315 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 316 #define CONFIG_SYS_NAND_OOBSIZE 64 317 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 318 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 319 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 320 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 321 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 322 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 323 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 324 52, 53, 54, 55, 56} 325 326 #define CONFIG_SYS_NAND_ECCSIZE 512 327 #define CONFIG_SYS_NAND_ECCBYTES 13 328 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 329 330 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 331 332 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 333 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 334 335 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 336 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 337 338 #define CONFIG_SYS_ALT_MEMTEST 339 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000 340 #endif /* __CONFIG_H */ 341