1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2012 8 * Corscience GmbH & Co. KG 9 * Thomas Weber <weber@corscience.de> 10 * 11 * Configuration settings for the Tricorder board. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #ifndef __CONFIG_H 17 #define __CONFIG_H 18 19 /* High Level Configuration Options */ 20 #define CONFIG_OMAP /* in a TI OMAP core */ 21 #define CONFIG_OMAP34XX /* which is a 34XX */ 22 #define CONFIG_OMAP_COMMON 23 24 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER 25 /* 26 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 27 * 64 bytes before this address should be set aside for u-boot.img's 28 * header. That is 0x800FFFC0--0x80100000 should not be used for any 29 * other needs. 30 */ 31 #define CONFIG_SYS_TEXT_BASE 0x80100000 32 33 #define CONFIG_SDRC /* The chip has SDRC controller */ 34 35 #include <asm/arch/cpu.h> /* get chip and board defs */ 36 #include <asm/arch/omap3.h> 37 38 /* Display CPU and Board information */ 39 #define CONFIG_DISPLAY_CPUINFO 40 #define CONFIG_DISPLAY_BOARDINFO 41 42 /* Clock Defines */ 43 #define V_OSCK 26000000 /* Clock output from T2 */ 44 #define V_SCLK (V_OSCK >> 1) 45 46 #define CONFIG_MISC_INIT_R 47 48 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 49 #define CONFIG_SETUP_MEMORY_TAGS 50 #define CONFIG_INITRD_TAG 51 #define CONFIG_REVISION_TAG 52 53 #define CONFIG_OF_LIBFDT 54 55 /* Size of malloc() pool */ 56 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 57 58 /* Hardware drivers */ 59 60 /* NS16550 Configuration */ 61 #define CONFIG_SYS_NS16550 62 #define CONFIG_SYS_NS16550_SERIAL 63 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 64 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 65 66 /* select serial console configuration */ 67 #define CONFIG_CONS_INDEX 3 68 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 69 #define CONFIG_SERIAL3 3 70 #define CONFIG_BAUDRATE 115200 71 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 72 115200} 73 74 /* MMC */ 75 #define CONFIG_GENERIC_MMC 76 #define CONFIG_MMC 77 #define CONFIG_OMAP_HSMMC 78 #define CONFIG_DOS_PARTITION 79 80 /* I2C */ 81 #define CONFIG_HARD_I2C 82 #define CONFIG_SYS_I2C_SPEED 100000 83 #define CONFIG_SYS_I2C_SLAVE 1 84 #define CONFIG_DRIVER_OMAP34XX_I2C 1 85 86 /* TWL4030 */ 87 #define CONFIG_TWL4030_POWER 88 #define CONFIG_TWL4030_LED 89 90 /* Board NAND Info */ 91 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 92 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 93 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 94 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 95 "128k(SPL)," \ 96 "1m(u-boot)," \ 97 "384k(u-boot-env1)," \ 98 "1152k(mtdoops)," \ 99 "384k(u-boot-env2)," \ 100 "5m(kernel)," \ 101 "2m(fdt)," \ 102 "-(ubi)" 103 104 #define CONFIG_NAND_OMAP_GPMC 105 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 106 /* to access nand */ 107 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 108 /* to access nand at */ 109 /* CS0 */ 110 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 111 112 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 113 /* devices */ 114 #define CONFIG_NAND_OMAP_BCH8 115 #define CONFIG_BCH 116 117 /* commands to include */ 118 #include <config_cmd_default.h> 119 120 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 121 #define CONFIG_CMD_FAT /* FAT support */ 122 #define CONFIG_CMD_I2C /* I2C serial bus support */ 123 #define CONFIG_CMD_MMC /* MMC support */ 124 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 125 #define CONFIG_CMD_NAND /* NAND support */ 126 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 127 #define CONFIG_CMD_UBI /* UBI commands */ 128 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 129 #define CONFIG_LZO /* LZO is needed for UBIFS */ 130 131 #undef CONFIG_CMD_NET 132 #undef CONFIG_CMD_NFS 133 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 134 #undef CONFIG_CMD_IMI /* iminfo */ 135 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 136 137 /* needed for ubi */ 138 #define CONFIG_RBTREE 139 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 140 #define CONFIG_MTD_PARTITIONS 141 142 /* Environment information */ 143 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 144 145 #define CONFIG_BOOTDELAY 3 146 147 #define CONFIG_EXTRA_ENV_SETTINGS \ 148 "loadaddr=0x82000000\0" \ 149 "console=ttyO2,115200n8\0" \ 150 "mmcdev=0\0" \ 151 "vram=3M\0" \ 152 "defaultdisplay=lcd\0" \ 153 "kernelopts=rw rootwait\0" \ 154 "commonargs=" \ 155 "setenv bootargs console=${console} " \ 156 "${mtdparts} " \ 157 "vram=${vram} " \ 158 "omapdss.def_disp=${defaultdisplay}\0" \ 159 "mmcargs=" \ 160 "run commonargs; " \ 161 "setenv bootargs ${bootargs} " \ 162 "root=/dev/mmcblk0p2 " \ 163 "${kernelopts}\0" \ 164 "nandargs=" \ 165 "run commonargs; " \ 166 "setenv bootargs ${bootargs} " \ 167 "omapdss.def_disp=${defaultdisplay} " \ 168 "root=ubi0:root " \ 169 "ubi.mtd=7 " \ 170 "rootfstype=ubifs " \ 171 "${kernelopts}\0" \ 172 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 173 "bootscript=echo Running bootscript from mmc ...; " \ 174 "source ${loadaddr}\0" \ 175 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 176 "mmcboot=echo Booting from mmc ...; " \ 177 "run mmcargs; " \ 178 "bootm ${loadaddr}\0" \ 179 "loaduimage_ubi=mtd default; " \ 180 "ubi part ubi; " \ 181 "ubifsmount ubi:root; " \ 182 "ubifsload ${loadaddr} /boot/uImage\0" \ 183 "nandboot=echo Booting from nand ...; " \ 184 "run nandargs; " \ 185 "run loaduimage_ubi; " \ 186 "bootm ${loadaddr}\0" \ 187 "autoboot=mtdparts default;" \ 188 "mmc dev ${mmcdev}; if mmc rescan; then " \ 189 "if run loadbootscript; then " \ 190 "run bootscript; " \ 191 "else " \ 192 "if run loaduimage; then " \ 193 "run mmcboot; " \ 194 "else run nandboot; " \ 195 "fi; " \ 196 "fi; " \ 197 "else run nandboot; fi\0" 198 199 #define CONFIG_BOOTCOMMAND "run autoboot" 200 201 /* Miscellaneous configurable options */ 202 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 203 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 204 #define CONFIG_AUTO_COMPLETE 205 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # " 206 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 207 /* Print Buffer Size */ 208 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 209 sizeof(CONFIG_SYS_PROMPT) + 16) 210 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 211 212 /* Boot Argument Buffer Size */ 213 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 214 215 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) 216 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 217 0x01000000) /* 16MB */ 218 219 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 220 221 /* 222 * OMAP3 has 12 GP timers, they can be driven by the system clock 223 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 224 * This rate is divided by a local divisor. 225 */ 226 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 227 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 228 #define CONFIG_SYS_HZ 1000 229 230 /* Physical Memory Map */ 231 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 232 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 233 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 234 235 /* NAND and environment organization */ 236 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 237 238 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 239 240 #define CONFIG_ENV_IS_IN_NAND 241 #define CONFIG_ENV_OFFSET 0x120000 /* env start */ 242 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ 243 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ 244 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ 245 246 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 247 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 248 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 249 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 250 CONFIG_SYS_INIT_RAM_SIZE - \ 251 GENERATED_GBL_DATA_SIZE) 252 253 /* SRAM config */ 254 #define CONFIG_SYS_SRAM_START 0x40200000 255 #define CONFIG_SYS_SRAM_SIZE 0x10000 256 257 /* Defines for SPL */ 258 #define CONFIG_SPL 259 #define CONFIG_SPL_FRAMEWORK 260 #define CONFIG_SPL_NAND_SIMPLE 261 262 #define CONFIG_SPL_BOARD_INIT 263 #define CONFIG_SPL_LIBCOMMON_SUPPORT 264 #define CONFIG_SPL_LIBDISK_SUPPORT 265 #define CONFIG_SPL_I2C_SUPPORT 266 #define CONFIG_SPL_LIBGENERIC_SUPPORT 267 #define CONFIG_SPL_SERIAL_SUPPORT 268 #define CONFIG_SPL_POWER_SUPPORT 269 #define CONFIG_SPL_NAND_SUPPORT 270 #define CONFIG_SPL_NAND_BASE 271 #define CONFIG_SPL_NAND_DRIVERS 272 #define CONFIG_SPL_NAND_ECC 273 #define CONFIG_SPL_MMC_SUPPORT 274 #define CONFIG_SPL_FAT_SUPPORT 275 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 276 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 277 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 278 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 279 280 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 281 #define CONFIG_SPL_MAX_SIZE (55 * 1024) /* 7 KB for stack */ 282 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 283 284 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 285 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 286 287 /* NAND boot config */ 288 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 289 #define CONFIG_SYS_NAND_PAGE_COUNT 64 290 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 291 #define CONFIG_SYS_NAND_OOBSIZE 64 292 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 293 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 294 #define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\ 295 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\ 296 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\ 297 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\ 298 60, 61, 62, 63} 299 300 #define CONFIG_SYS_NAND_ECCSIZE 512 301 #define CONFIG_SYS_NAND_ECCBYTES 13 302 303 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 304 305 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 306 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 307 308 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 309 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 310 311 #endif /* __CONFIG_H */ 312