1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2012 8 * Corscience GmbH & Co. KG 9 * Thomas Weber <weber@corscience.de> 10 * 11 * Configuration settings for the Tricorder board. 12 * 13 * SPDX-License-Identifier: GPL-2.0+ 14 */ 15 16 #ifndef __CONFIG_H 17 #define __CONFIG_H 18 19 /* High Level Configuration Options */ 20 #define CONFIG_OMAP /* in a TI OMAP core */ 21 #define CONFIG_OMAP34XX /* which is a 34XX */ 22 #define CONFIG_OMAP_COMMON 23 24 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER 25 /* 26 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 27 * 64 bytes before this address should be set aside for u-boot.img's 28 * header. That is 0x800FFFC0--0x80100000 should not be used for any 29 * other needs. 30 */ 31 #define CONFIG_SYS_TEXT_BASE 0x80100000 32 33 #define CONFIG_SDRC /* The chip has SDRC controller */ 34 35 #include <asm/arch/cpu.h> /* get chip and board defs */ 36 #include <asm/arch/omap3.h> 37 38 /* Display CPU and Board information */ 39 #define CONFIG_DISPLAY_CPUINFO 40 #define CONFIG_DISPLAY_BOARDINFO 41 42 /* Clock Defines */ 43 #define V_OSCK 26000000 /* Clock output from T2 */ 44 #define V_SCLK (V_OSCK >> 1) 45 46 #define CONFIG_MISC_INIT_R 47 48 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 49 #define CONFIG_SETUP_MEMORY_TAGS 50 #define CONFIG_INITRD_TAG 51 #define CONFIG_REVISION_TAG 52 53 #define CONFIG_OF_LIBFDT 54 55 /* Size of malloc() pool */ 56 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 57 58 /* Hardware drivers */ 59 60 /* NS16550 Configuration */ 61 #define CONFIG_SYS_NS16550 62 #define CONFIG_SYS_NS16550_SERIAL 63 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 64 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 65 66 /* select serial console configuration */ 67 #define CONFIG_CONS_INDEX 3 68 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 69 #define CONFIG_SERIAL3 3 70 #define CONFIG_BAUDRATE 115200 71 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 72 115200} 73 74 /* MMC */ 75 #define CONFIG_GENERIC_MMC 76 #define CONFIG_MMC 77 #define CONFIG_OMAP_HSMMC 78 #define CONFIG_DOS_PARTITION 79 80 /* I2C */ 81 #define CONFIG_HARD_I2C 82 #define CONFIG_SYS_I2C_SPEED 100000 83 #define CONFIG_SYS_I2C_SLAVE 1 84 #define CONFIG_DRIVER_OMAP34XX_I2C 1 85 #define CONFIG_I2C_MULTI_BUS 86 87 /* EEPROM */ 88 #define CONFIG_SYS_I2C_MULTI_EEPROMS 89 #define CONFIG_CMD_EEPROM 90 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 91 #define CONFIG_SYS_EEPROM_BUS_NUM 1 92 93 /* TWL4030 */ 94 #define CONFIG_TWL4030_POWER 95 #define CONFIG_TWL4030_LED 96 97 /* Board NAND Info */ 98 #define CONFIG_SYS_NO_FLASH /* no NOR flash */ 99 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 100 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 101 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 102 "128k(SPL)," \ 103 "1m(u-boot)," \ 104 "384k(u-boot-env1)," \ 105 "1152k(mtdoops)," \ 106 "384k(u-boot-env2)," \ 107 "5m(kernel)," \ 108 "2m(fdt)," \ 109 "-(ubi)" 110 111 #define CONFIG_NAND_OMAP_GPMC 112 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 113 /* to access nand */ 114 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 115 /* to access nand at */ 116 /* CS0 */ 117 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 118 119 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ 120 /* devices */ 121 #define CONFIG_NAND_OMAP_BCH8 122 #define CONFIG_BCH 123 124 /* commands to include */ 125 #include <config_cmd_default.h> 126 127 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 128 #define CONFIG_CMD_FAT /* FAT support */ 129 #define CONFIG_CMD_I2C /* I2C serial bus support */ 130 #define CONFIG_CMD_MMC /* MMC support */ 131 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 132 #define CONFIG_CMD_NAND /* NAND support */ 133 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 134 #define CONFIG_CMD_UBI /* UBI commands */ 135 #define CONFIG_CMD_UBIFS /* UBIFS commands */ 136 #define CONFIG_LZO /* LZO is needed for UBIFS */ 137 138 #undef CONFIG_CMD_NET 139 #undef CONFIG_CMD_NFS 140 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 141 #undef CONFIG_CMD_IMI /* iminfo */ 142 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */ 143 144 /* needed for ubi */ 145 #define CONFIG_RBTREE 146 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 147 #define CONFIG_MTD_PARTITIONS 148 149 /* Environment information (this is the common part) */ 150 151 #define CONFIG_BOOTDELAY 3 152 153 /* environment placement (for NAND), is different for FLASHCARD but does not 154 * harm there */ 155 #define CONFIG_ENV_OFFSET 0x120000 /* env start */ 156 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */ 157 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */ 158 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */ 159 160 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend 161 * value can not be used here! */ 162 #define CONFIG_LOADADDR 0x82000000 163 164 #define CONFIG_COMMON_ENV_SETTINGS \ 165 "console=ttyO2,115200n8\0" \ 166 "mmcdev=0\0" \ 167 "vram=3M\0" \ 168 "defaultdisplay=lcd\0" \ 169 "kernelopts=mtdoops.mtddev=3\0" \ 170 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 171 "mtdids=" MTDIDS_DEFAULT "\0" \ 172 "commonargs=" \ 173 "setenv bootargs console=${console} " \ 174 "${mtdparts} " \ 175 "${kernelopts} " \ 176 "vt.global_cursor_default=0 " \ 177 "vram=${vram} " \ 178 "omapdss.def_disp=${defaultdisplay}\0" 179 180 #define CONFIG_BOOTCOMMAND "run autoboot" 181 182 /* specific environment settings for different use cases 183 * FLASHCARD: used to run a rdimage from sdcard to program the device 184 * 'NORMAL': used to boot kernel from sdcard, nand, ... 185 * 186 * The main aim for the FLASHCARD skin is to have an embedded environment 187 * which will not be influenced by any data already on the device. 188 */ 189 #ifdef CONFIG_FLASHCARD 190 191 #define CONFIG_ENV_IS_NOWHERE 192 193 /* the rdaddr is 16 MiB before the loadaddr */ 194 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0" 195 196 #define CONFIG_EXTRA_ENV_SETTINGS \ 197 CONFIG_COMMON_ENV_SETTINGS \ 198 CONFIG_ENV_RDADDR \ 199 "autoboot=" \ 200 "run commonargs; " \ 201 "setenv bootargs ${bootargs} " \ 202 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \ 203 "rdinit=/sbin/init; " \ 204 "mmc dev ${mmcdev}; mmc rescan; " \ 205 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \ 206 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \ 207 "bootm ${loadaddr} ${rdaddr}\0" 208 209 #else /* CONFIG_FLASHCARD */ 210 211 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ 212 213 #define CONFIG_ENV_IS_IN_NAND 214 215 #define CONFIG_EXTRA_ENV_SETTINGS \ 216 CONFIG_COMMON_ENV_SETTINGS \ 217 "mmcargs=" \ 218 "run commonargs; " \ 219 "setenv bootargs ${bootargs} " \ 220 "root=/dev/mmcblk0p2 " \ 221 "rootwait " \ 222 "rw\0" \ 223 "nandargs=" \ 224 "run commonargs; " \ 225 "setenv bootargs ${bootargs} " \ 226 "root=ubi0:root " \ 227 "ubi.mtd=7 " \ 228 "rootfstype=ubifs " \ 229 "ro\0" \ 230 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 231 "bootscript=echo Running bootscript from mmc ...; " \ 232 "source ${loadaddr}\0" \ 233 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 234 "mmcboot=echo Booting from mmc ...; " \ 235 "run mmcargs; " \ 236 "bootm ${loadaddr}\0" \ 237 "loaduimage_ubi=ubi part ubi; " \ 238 "ubifsmount ubi:root; " \ 239 "ubifsload ${loadaddr} /boot/uImage\0" \ 240 "nandboot=echo Booting from nand ...; " \ 241 "run nandargs; " \ 242 "run loaduimage_ubi; " \ 243 "bootm ${loadaddr}\0" \ 244 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 245 "if run loadbootscript; then " \ 246 "run bootscript; " \ 247 "else " \ 248 "if run loaduimage; then " \ 249 "run mmcboot; " \ 250 "else run nandboot; " \ 251 "fi; " \ 252 "fi; " \ 253 "else run nandboot; fi\0" 254 255 #endif /* CONFIG_FLASHCARD */ 256 257 /* Miscellaneous configurable options */ 258 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 259 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 260 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */ 261 #define CONFIG_AUTO_COMPLETE 262 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # " 263 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 264 /* Print Buffer Size */ 265 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 266 sizeof(CONFIG_SYS_PROMPT) + 16) 267 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 268 269 /* Boot Argument Buffer Size */ 270 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 271 272 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) 273 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 274 0x01000000) /* 16MB */ 275 276 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) 277 278 /* 279 * OMAP3 has 12 GP timers, they can be driven by the system clock 280 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 281 * This rate is divided by a local divisor. 282 */ 283 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 284 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 285 #define CONFIG_SYS_HZ 1000 286 287 /* Physical Memory Map */ 288 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 289 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 290 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 291 292 /* NAND and environment organization */ 293 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 294 295 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 296 297 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 298 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 299 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 300 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 301 CONFIG_SYS_INIT_RAM_SIZE - \ 302 GENERATED_GBL_DATA_SIZE) 303 304 /* SRAM config */ 305 #define CONFIG_SYS_SRAM_START 0x40200000 306 #define CONFIG_SYS_SRAM_SIZE 0x10000 307 308 /* Defines for SPL */ 309 #define CONFIG_SPL 310 #define CONFIG_SPL_FRAMEWORK 311 #define CONFIG_SPL_NAND_SIMPLE 312 313 #define CONFIG_SPL_BOARD_INIT 314 #define CONFIG_SPL_LIBCOMMON_SUPPORT 315 #define CONFIG_SPL_LIBDISK_SUPPORT 316 #define CONFIG_SPL_I2C_SUPPORT 317 #define CONFIG_SPL_LIBGENERIC_SUPPORT 318 #define CONFIG_SPL_SERIAL_SUPPORT 319 #define CONFIG_SPL_POWER_SUPPORT 320 #define CONFIG_SPL_NAND_SUPPORT 321 #define CONFIG_SPL_NAND_BASE 322 #define CONFIG_SPL_NAND_DRIVERS 323 #define CONFIG_SPL_NAND_ECC 324 #define CONFIG_SPL_MMC_SUPPORT 325 #define CONFIG_SPL_FAT_SUPPORT 326 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 327 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 328 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 329 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 330 331 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 332 #define CONFIG_SPL_MAX_SIZE (55 * 1024) /* 7 KB for stack */ 333 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 334 335 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ 336 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 337 338 /* NAND boot config */ 339 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 340 #define CONFIG_SYS_NAND_PAGE_COUNT 64 341 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 342 #define CONFIG_SYS_NAND_OOBSIZE 64 343 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 344 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 345 #define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\ 346 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\ 347 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\ 348 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\ 349 60, 61, 62, 63} 350 351 #define CONFIG_SYS_NAND_ECCSIZE 512 352 #define CONFIG_SYS_NAND_ECCBYTES 13 353 354 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 355 356 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 357 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000 358 359 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 360 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 361 362 #endif /* __CONFIG_H */ 363