1 /* 2 * Copyright (C) 2013 Samsung Electronics 3 * Sanghee Kim <sh0130.kim@samsung.com> 4 * Piotr Wilczek <p.wilczek@samsung.com> 5 * 6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* 15 * High Level Configuration Options 16 * (easy to change) 17 */ 18 #define CONFIG_SAMSUNG /* in a SAMSUNG core */ 19 #define CONFIG_S5P /* which is in a S5P Family */ 20 #define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */ 21 #define CONFIG_TIZEN /* TIZEN lib */ 22 23 #include <asm/arch/cpu.h> /* get chip and board defs */ 24 25 #define CONFIG_ARCH_CPU_INIT 26 #define CONFIG_DISPLAY_CPUINFO 27 #define CONFIG_DISPLAY_BOARDINFO 28 29 #define CONFIG_SKIP_LOWLEVEL_INIT 30 31 #define CONFIG_SYS_CACHELINE_SIZE 32 32 33 #define CONFIG_SYS_L2CACHE_OFF 34 #ifndef CONFIG_SYS_L2CACHE_OFF 35 #define CONFIG_SYS_L2_PL310 36 #define CONFIG_SYS_PL310_BASE 0x10502000 37 #endif 38 39 #define CONFIG_NR_DRAM_BANKS 4 40 #define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */ 41 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ 42 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ 43 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ 44 #define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */ 45 #define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */ 46 #define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */ 47 #define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */ 48 #define PHYS_SDRAM_END 0x80000000 49 50 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 51 52 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 53 #define CONFIG_SYS_TEXT_BASE 0x78100000 54 55 #define CONFIG_SYS_CLK_FREQ 24000000 56 57 #define CONFIG_SETUP_MEMORY_TAGS 58 #define CONFIG_CMDLINE_TAG 59 #define CONFIG_REVISION_TAG 60 61 /* MACH_TYPE_TRATS2 */ 62 #define MACH_TYPE_TRATS2 3765 63 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS2 64 65 #define CONFIG_DISPLAY_CPUINFO 66 67 #include <asm/sizes.h> 68 /* Size of malloc() pool */ 69 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) 70 71 /* select serial console configuration */ 72 #define CONFIG_SERIAL2 73 74 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 75 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 76 77 #define CONFIG_CMDLINE_EDITING 78 79 #define CONFIG_BAUDRATE 115200 80 81 /* It should define before config_cmd_default.h */ 82 #define CONFIG_SYS_NO_FLASH 83 84 /*********************************************************** 85 * Command definition 86 ***********************************************************/ 87 #include <config_cmd_default.h> 88 89 #undef CONFIG_CMD_ECHO 90 #undef CONFIG_CMD_FPGA 91 #undef CONFIG_CMD_FLASH 92 #undef CONFIG_CMD_IMLS 93 #undef CONFIG_CMD_NAND 94 #undef CONFIG_CMD_MISC 95 #undef CONFIG_CMD_NFS 96 #undef CONFIG_CMD_SOURCE 97 #undef CONFIG_CMD_XIMG 98 #define CONFIG_CMD_CACHE 99 #define CONFIG_CMD_I2C 100 #define CONFIG_CMD_MMC 101 #define CONFIG_CMD_DFU 102 #define CONFIG_CMD_GPT 103 #define CONFIG_CMD_PMIC 104 105 #define CONFIG_BOOTDELAY 3 106 #define CONFIG_ZERO_BOOTDELAY_CHECK 107 108 #define CONFIG_CMD_FAT 109 #define CONFIG_FAT_WRITE 110 111 /* EXT4 */ 112 #define CONFIG_CMD_EXT4 113 #define CONFIG_CMD_EXT4_WRITE 114 115 /* USB Composite download gadget - g_dnl */ 116 #define CONFIG_USBDOWNLOAD_GADGET 117 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M 118 #define DFU_DEFAULT_POLL_TIMEOUT 300 119 #define CONFIG_DFU_FUNCTION 120 #define CONFIG_DFU_MMC 121 122 /* TIZEN THOR downloader support */ 123 #define CONFIG_CMD_THOR_DOWNLOAD 124 #define CONFIG_THOR_FUNCTION 125 126 /* USB Samsung's IDs */ 127 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 128 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 129 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM 130 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D 131 #define CONFIG_G_DNL_MANUFACTURER "Samsung" 132 133 /* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */ 134 #undef CONFIG_CMD_NET 135 136 /* MMC */ 137 #define CONFIG_GENERIC_MMC 138 #define CONFIG_MMC 139 #define CONFIG_S5P_SDHCI 140 #define CONFIG_SDHCI 141 #define CONFIG_MMC_SDMA 142 #define CONFIG_MMC_DEFAULT_DEV 0 143 144 /* PWM */ 145 #define CONFIG_PWM 146 147 #define CONFIG_BOOTARGS "Please use defined boot" 148 #define CONFIG_BOOTCOMMAND "run mmcboot" 149 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 150 151 #define CONFIG_ENV_OVERWRITE 152 #define CONFIG_SYS_CONSOLE_INFO_QUIET 153 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 154 155 #define CONFIG_ENV_VARS_UBOOT_CONFIG 156 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 157 158 /* Tizen - partitions definitions */ 159 #define PARTS_CSA "csa" 160 #define PARTS_BOOT "boot" 161 #define PARTS_MODEM "modem" 162 #define PARTS_CSC "csc" 163 #define PARTS_ROOT "platform" 164 #define PARTS_DATA "data" 165 #define PARTS_UMS "ums" 166 167 #define PARTS_DEFAULT \ 168 "uuid_disk=${uuid_gpt_disk};" \ 169 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 170 "name="PARTS_BOOT",size=64MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 171 "name="PARTS_MODEM",size=100MiB,uuid=${uuid_gpt_"PARTS_MODEM"};" \ 172 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 173 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 174 "name="PARTS_DATA",size=512MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 175 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 176 177 #define CONFIG_DFU_ALT \ 178 "u-boot mmc 80 800;" \ 179 "uImage ext4 0 2;" \ 180 "exynos4412-trats2.dtb ext4 0 2;" \ 181 ""PARTS_BOOT" part 0 2;" \ 182 ""PARTS_ROOT" part 0 5;" \ 183 ""PARTS_DATA" part 0 6;" \ 184 ""PARTS_UMS" part 0 7;" \ 185 "params.bin mmc 0x38 0x8\0" 186 187 #define CONFIG_EXTRA_ENV_SETTINGS \ 188 "bootk=" \ 189 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 190 "updatemmc=" \ 191 "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \ 192 "mmc boot 0 1 1 0\0" \ 193 "updatebackup=" \ 194 "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \ 195 " mmc boot 0 1 1 0\0" \ 196 "updatebootb=" \ 197 "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \ 198 "updateuboot=" \ 199 "mmc write 0x50000000 0x80 0x400\0" \ 200 "mmcboot=" \ 201 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 202 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 203 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 204 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 205 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 206 "verify=n\0" \ 207 "rootfstype=ext4\0" \ 208 "console=" CONFIG_DEFAULT_CONSOLE \ 209 "kernelname=uImage\0" \ 210 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \ 211 "${kernelname}\0" \ 212 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 213 "${fdtfile}\0" \ 214 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \ 215 "mmcbootpart=2\0" \ 216 "mmcrootpart=5\0" \ 217 "opts=always_resume=1\0" \ 218 "partitions=" PARTS_DEFAULT \ 219 "dfu_alt_info=" CONFIG_DFU_ALT \ 220 "uartpath=ap\0" \ 221 "usbpath=ap\0" \ 222 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \ 223 "consoleoff=set console console=ram; save; reset\0" \ 224 "spladdr=0x40000100\0" \ 225 "splsize=0x200\0" \ 226 "splfile=falcon.bin\0" \ 227 "spl_export=" \ 228 "setexpr spl_imgsize ${splsize} + 8 ;" \ 229 "setenv spl_imgsize 0x${spl_imgsize};" \ 230 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 231 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 232 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 233 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 234 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 235 "spl export atags 0x40007FC0;" \ 236 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 237 "mw.l ${spl_addr_tmp} ${splsize};" \ 238 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 239 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 240 "setenv spl_imgsize;" \ 241 "setenv spl_imgaddr;" \ 242 "setenv spl_addr_tmp;\0" \ 243 "fdtaddr=40800000\0" \ 244 "fdtfile=exynos4412-trats2.dtb\0" 245 246 /* 247 * Miscellaneous configurable options 248 */ 249 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 250 #define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */ 251 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 252 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 253 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 254 255 /* Boot Argument Buffer Size */ 256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 257 258 /* memtest works on */ 259 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 260 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 261 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 262 263 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 264 - GENERATED_GBL_DATA_SIZE) 265 266 /* valid baudrates */ 267 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 268 269 #define CONFIG_SYS_MONITOR_BASE 0x00000000 270 271 /*----------------------------------------------------------------------- 272 * FLASH and environment organization 273 */ 274 275 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 276 277 #define CONFIG_ENV_IS_IN_MMC 278 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 279 #define CONFIG_ENV_SIZE 4096 280 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 281 #define CONFIG_EFI_PARTITION 282 #define CONFIG_PARTITION_UUIDS 283 284 #define CONFIG_BOARD_EARLY_INIT_F 285 286 /* I2C */ 287 #include <asm/arch/gpio.h> 288 289 #define CONFIG_SYS_I2C 290 #define CONFIG_SYS_I2C_S3C24X0 291 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 292 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0 293 #define CONFIG_MAX_I2C_NUM 8 294 #define CONFIG_SYS_I2C_SOFT 295 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 296 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 297 #define I2C_SOFT_DECLARATIONS2 298 #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000 299 #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00 300 #define CONFIG_SOFT_I2C_READ_REPEATED_START 301 #define CONFIG_SYS_I2C_INIT_BOARD 302 303 #ifndef __ASSEMBLY__ 304 int get_soft_i2c_scl_pin(void); 305 int get_soft_i2c_sda_pin(void); 306 #endif 307 #define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin() 308 #define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin() 309 310 /* POWER */ 311 #define CONFIG_POWER 312 #define CONFIG_POWER_I2C 313 #define CONFIG_POWER_MAX77686 314 #define CONFIG_POWER_PMIC_MAX77693 315 #define CONFIG_POWER_MUIC_MAX77693 316 #define CONFIG_POWER_FG_MAX77693 317 #define CONFIG_POWER_BATTERY_TRATS2 318 #define CONFIG_USB_GADGET 319 #define CONFIG_USB_GADGET_S3C_UDC_OTG 320 #define CONFIG_USB_GADGET_DUALSPEED 321 #define CONFIG_USB_GADGET_VBUS_DRAW 2 322 #define CONFIG_USB_CABLE_CHECK 323 324 /* Common misc for Samsung */ 325 #define CONFIG_MISC_COMMON 326 327 #define CONFIG_MISC_INIT_R 328 329 /* Download menu - Samsung common */ 330 #define CONFIG_LCD_MENU 331 #define CONFIG_LCD_MENU_BOARD 332 333 /* Download menu - definitions for check keys */ 334 #ifndef __ASSEMBLY__ 335 #include <power/max77686_pmic.h> 336 337 #define KEY_PWR_PMIC_NAME "MAX77686_PMIC" 338 #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1 339 #define KEY_PWR_STATUS_MASK (1 << 0) 340 #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1 341 #define KEY_PWR_INTERRUPT_MASK (1 << 1) 342 343 #define KEY_VOL_UP_GPIO exynos4x12_gpio_get(2, x2, 2) 344 #define KEY_VOL_DOWN_GPIO exynos4x12_gpio_get(2, x3, 3) 345 #endif /* __ASSEMBLY__ */ 346 347 /* LCD console */ 348 #define LCD_BPP LCD_COLOR16 349 #define CONFIG_SYS_WHITE_ON_BLACK 350 351 /* LCD */ 352 #define CONFIG_EXYNOS_FB 353 #define CONFIG_LCD 354 #define CONFIG_CMD_BMP 355 #define CONFIG_BMP_16BPP 356 #define CONFIG_FB_ADDR 0x52504000 357 #define CONFIG_S6E8AX0 358 #define CONFIG_EXYNOS_MIPI_DSIM 359 #define CONFIG_VIDEO_BMP_GZIP 360 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) 361 362 #define CONFIG_CMD_USB_MASS_STORAGE 363 #define CONFIG_USB_GADGET_MASS_STORAGE 364 365 /* Pass open firmware flat tree */ 366 #define CONFIG_OF_LIBFDT 1 367 368 #endif /* __CONFIG_H */ 369