1 /* 2 * Copyright (C) 2013 Samsung Electronics 3 * Sanghee Kim <sh0130.kim@samsung.com> 4 * Piotr Wilczek <p.wilczek@samsung.com> 5 * 6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* 15 * High Level Configuration Options 16 * (easy to change) 17 */ 18 #define CONFIG_SAMSUNG /* in a SAMSUNG core */ 19 #define CONFIG_S5P /* which is in a S5P Family */ 20 #define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */ 21 #define CONFIG_TIZEN /* TIZEN lib */ 22 23 #define PLATFORM_NO_UNALIGNED 24 25 #include <asm/arch/cpu.h> /* get chip and board defs */ 26 27 #define CONFIG_ARCH_CPU_INIT 28 #define CONFIG_DISPLAY_CPUINFO 29 #define CONFIG_DISPLAY_BOARDINFO 30 31 #define CONFIG_SKIP_LOWLEVEL_INIT 32 33 #define CONFIG_SYS_CACHELINE_SIZE 32 34 35 #ifndef CONFIG_SYS_L2CACHE_OFF 36 #define CONFIG_SYS_L2_PL310 37 #define CONFIG_SYS_PL310_BASE 0x10502000 38 #endif 39 40 #define CONFIG_NR_DRAM_BANKS 4 41 #define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */ 42 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ 43 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ 44 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ 45 #define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */ 46 #define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */ 47 #define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */ 48 #define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */ 49 #define PHYS_SDRAM_END 0x80000000 50 51 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 52 53 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 54 #define CONFIG_SYS_TEXT_BASE 0x78100000 55 56 #define CONFIG_SYS_CLK_FREQ 24000000 57 58 #define CONFIG_SETUP_MEMORY_TAGS 59 #define CONFIG_CMDLINE_TAG 60 #define CONFIG_REVISION_TAG 61 62 /* MACH_TYPE_TRATS2 */ 63 #define MACH_TYPE_TRATS2 3765 64 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS2 65 66 #define CONFIG_DISPLAY_CPUINFO 67 68 #include <asm/sizes.h> 69 /* Size of malloc() pool */ 70 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) 71 72 /* select serial console configuration */ 73 #define CONFIG_SERIAL2 74 75 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 76 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 77 78 #define CONFIG_CMDLINE_EDITING 79 80 #define CONFIG_BAUDRATE 115200 81 82 /* It should define before config_cmd_default.h */ 83 #define CONFIG_SYS_NO_FLASH 84 85 /*********************************************************** 86 * Command definition 87 ***********************************************************/ 88 #include <config_cmd_default.h> 89 90 #undef CONFIG_CMD_ECHO 91 #undef CONFIG_CMD_FPGA 92 #undef CONFIG_CMD_FLASH 93 #undef CONFIG_CMD_IMLS 94 #undef CONFIG_CMD_NAND 95 #undef CONFIG_CMD_MISC 96 #undef CONFIG_CMD_NFS 97 #undef CONFIG_CMD_SOURCE 98 #undef CONFIG_CMD_XIMG 99 #define CONFIG_CMD_CACHE 100 #define CONFIG_CMD_I2C 101 #define CONFIG_CMD_MMC 102 #define CONFIG_CMD_DFU 103 #define CONFIG_CMD_GPT 104 #define CONFIG_CMD_PMIC 105 106 #define CONFIG_BOOTDELAY 3 107 #define CONFIG_ZERO_BOOTDELAY_CHECK 108 109 #define CONFIG_CMD_FAT 110 #define CONFIG_FAT_WRITE 111 112 /* EXT4 */ 113 #define CONFIG_CMD_EXT4 114 #define CONFIG_CMD_EXT4_WRITE 115 116 /* USB Composite download gadget - g_dnl */ 117 #define CONFIG_USBDOWNLOAD_GADGET 118 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M 119 #define CONFIG_DFU_FUNCTION 120 #define CONFIG_DFU_MMC 121 122 /* TIZEN THOR downloader support */ 123 #define CONFIG_CMD_THOR_DOWNLOAD 124 #define CONFIG_THOR_FUNCTION 125 126 /* USB Samsung's IDs */ 127 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 128 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 129 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM 130 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D 131 #define CONFIG_G_DNL_MANUFACTURER "Samsung" 132 133 /* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */ 134 #undef CONFIG_CMD_NET 135 136 /* MMC */ 137 #define CONFIG_GENERIC_MMC 138 #define CONFIG_MMC 139 #define CONFIG_S5P_SDHCI 140 #define CONFIG_SDHCI 141 #define CONFIG_MMC_SDMA 142 #define CONFIG_MMC_DEFAULT_DEV 0 143 144 /* PWM */ 145 #define CONFIG_PWM 146 147 #define CONFIG_BOOTARGS "Please use defined boot" 148 #define CONFIG_BOOTCOMMAND "run mmcboot" 149 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 150 151 #define CONFIG_ENV_OVERWRITE 152 #define CONFIG_SYS_CONSOLE_INFO_QUIET 153 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 154 155 /* Tizen - partitions definitions */ 156 #define PARTS_CSA "csa-mmc" 157 #define PARTS_BOOTLOADER "u-boot" 158 #define PARTS_BOOT "boot" 159 #define PARTS_ROOT "platform" 160 #define PARTS_DATA "data" 161 #define PARTS_CSC "csc" 162 #define PARTS_UMS "ums" 163 164 #define PARTS_DEFAULT \ 165 "uuid_disk=${uuid_gpt_disk};" \ 166 "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 167 "name="PARTS_BOOTLOADER",size=60MiB," \ 168 "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ 169 "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 170 "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 171 "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 172 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 173 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 174 175 #define CONFIG_DFU_ALT \ 176 "u-boot mmc 80 800;" \ 177 "uImage ext4 0 2;" \ 178 "exynos4412-trats2.dtb ext4 0 2;" \ 179 ""PARTS_ROOT" part 0 5\0" 180 181 #define CONFIG_EXTRA_ENV_SETTINGS \ 182 "bootk=" \ 183 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 184 "updatemmc=" \ 185 "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \ 186 "mmc boot 0 1 1 0\0" \ 187 "updatebackup=" \ 188 "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \ 189 " mmc boot 0 1 1 0\0" \ 190 "updatebootb=" \ 191 "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \ 192 "updateuboot=" \ 193 "mmc write 0x50000000 0x80 0x400\0" \ 194 "mmcboot=" \ 195 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 196 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 197 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 198 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 199 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 200 "verify=n\0" \ 201 "rootfstype=ext4\0" \ 202 "console=" CONFIG_DEFAULT_CONSOLE \ 203 "kernelname=uImage\0" \ 204 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 205 "0x40007FC0 ${kernelname}\0" \ 206 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 207 "${fdtfile}\0" \ 208 "mmcdev=0\0" \ 209 "mmcbootpart=2\0" \ 210 "mmcrootpart=5\0" \ 211 "opts=always_resume=1\0" \ 212 "partitions=" PARTS_DEFAULT \ 213 "dfu_alt_info=" CONFIG_DFU_ALT \ 214 "uartpath=ap\0" \ 215 "usbpath=ap\0" \ 216 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \ 217 "consoleoff=set console console=ram; save; reset\0" \ 218 "spladdr=0x40000100\0" \ 219 "splsize=0x200\0" \ 220 "splfile=falcon.bin\0" \ 221 "spl_export=" \ 222 "setexpr spl_imgsize ${splsize} + 8 ;" \ 223 "setenv spl_imgsize 0x${spl_imgsize};" \ 224 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 225 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 226 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 227 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 228 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 229 "spl export atags 0x40007FC0;" \ 230 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 231 "mw.l ${spl_addr_tmp} ${splsize};" \ 232 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 233 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 234 "setenv spl_imgsize;" \ 235 "setenv spl_imgaddr;" \ 236 "setenv spl_addr_tmp;\0" \ 237 "fdtaddr=40800000\0" \ 238 "fdtfile=exynos4412-trats2.dtb\0" 239 240 /* 241 * Miscellaneous configurable options 242 */ 243 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 244 #define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */ 245 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 246 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 247 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 248 249 /* Boot Argument Buffer Size */ 250 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 251 252 /* memtest works on */ 253 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 254 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 255 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 256 257 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ 258 - GENERATED_GBL_DATA_SIZE) 259 260 #define CONFIG_SYS_HZ 1000 261 262 /* valid baudrates */ 263 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 264 265 #define CONFIG_SYS_MONITOR_BASE 0x00000000 266 267 /*----------------------------------------------------------------------- 268 * FLASH and environment organization 269 */ 270 271 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 272 273 #define CONFIG_ENV_IS_IN_MMC 274 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV 275 #define CONFIG_ENV_SIZE 4096 276 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 277 #define CONFIG_EFI_PARTITION 278 #define CONFIG_PARTITION_UUIDS 279 280 #define CONFIG_MISC_INIT_R 281 #define CONFIG_BOARD_EARLY_INIT_F 282 283 /* I2C */ 284 #include <asm/arch/gpio.h> 285 286 #define CONFIG_SYS_I2C 287 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 288 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 289 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 290 #define I2C_SOFT_DECLARATIONS2 291 #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000 292 #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00 293 #define I2C_SOFT_DECLARATIONS3 294 #define CONFIG_SYS_I2C_SOFT_SPEED_3 50000 295 #define CONFIG_SYS_I2C_SOFT_SLAVE_3 0x00 296 #define CONFIG_SOFT_I2C_READ_REPEATED_START 297 #define CONFIG_SYS_I2C_INIT_BOARD 298 #define CONFIG_I2C_MULTI_BUS 299 #define CONFIG_SOFT_I2C_MULTI_BUS 300 #define CONFIG_SYS_MAX_I2C_BUS 15 301 302 #define CONFIG_SOFT_I2C_I2C5_SCL exynos4x12_gpio_part1_get_nr(d0, 3) 303 #define CONFIG_SOFT_I2C_I2C5_SDA exynos4x12_gpio_part1_get_nr(d0, 2) 304 #define CONFIG_SOFT_I2C_I2C9_SCL exynos4x12_gpio_part1_get_nr(f1, 4) 305 #define CONFIG_SOFT_I2C_I2C9_SDA exynos4x12_gpio_part1_get_nr(f1, 5) 306 #define CONFIG_SOFT_I2C_I2C10_SCL exynos4x12_gpio_part2_get_nr(m2, 1) 307 #define CONFIG_SOFT_I2C_I2C10_SDA exynos4x12_gpio_part2_get_nr(m2, 0) 308 #define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin() 309 #define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin() 310 #define I2C_INIT multi_i2c_init() 311 312 /* POWER */ 313 #define CONFIG_POWER 314 #define CONFIG_POWER_I2C 315 #define CONFIG_POWER_MAX77686 316 #define CONFIG_POWER_PMIC_MAX77693 317 #define CONFIG_POWER_MUIC_MAX77693 318 #define CONFIG_POWER_FG_MAX77693 319 #define CONFIG_POWER_BATTERY_TRATS2 320 #define CONFIG_USB_GADGET 321 #define CONFIG_USB_GADGET_S3C_UDC_OTG 322 #define CONFIG_USB_GADGET_DUALSPEED 323 #define CONFIG_USB_GADGET_VBUS_DRAW 2 324 #define CONFIG_USB_CABLE_CHECK 325 326 /* LCD */ 327 #define CONFIG_EXYNOS_FB 328 #define CONFIG_LCD 329 #define CONFIG_CMD_BMP 330 #define CONFIG_BMP_32BPP 331 #define CONFIG_FB_ADDR 0x52504000 332 #define CONFIG_S6E8AX0 333 #define CONFIG_EXYNOS_MIPI_DSIM 334 #define CONFIG_VIDEO_BMP_GZIP 335 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12)) 336 337 #define CONFIG_CMD_USB_MASS_STORAGE 338 #define CONFIG_USB_GADGET_MASS_STORAGE 339 340 /* Pass open firmware flat tree */ 341 #define CONFIG_OF_LIBFDT 1 342 343 #endif /* __CONFIG_H */ 344