1 /* 2 * Copyright (C) 2011 Samsung Electronics 3 * Heungjun Kim <riverful.kim@samsung.com> 4 * 5 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 /* 14 * High Level Configuration Options 15 * (easy to change) 16 */ 17 #define CONFIG_SAMSUNG /* in a SAMSUNG core */ 18 #define CONFIG_S5P /* which is in a S5P Family */ 19 #define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */ 20 #define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */ 21 #define CONFIG_TRATS /* working with TRATS */ 22 #define CONFIG_TIZEN /* TIZEN lib */ 23 24 #include <asm/arch/cpu.h> /* get chip and board defs */ 25 26 #define CONFIG_ARCH_CPU_INIT 27 #define CONFIG_DISPLAY_CPUINFO 28 #define CONFIG_DISPLAY_BOARDINFO 29 30 #ifndef CONFIG_SYS_L2CACHE_OFF 31 #define CONFIG_SYS_L2_PL310 32 #define CONFIG_SYS_PL310_BASE 0x10502000 33 #endif 34 35 #define CONFIG_SYS_SDRAM_BASE 0x40000000 36 #define CONFIG_SYS_TEXT_BASE 0x63300000 37 38 /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */ 39 #define CONFIG_SYS_CLK_FREQ_C210 24000000 40 #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 41 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_CMDLINE_TAG 44 #define CONFIG_REVISION_TAG 45 #define CONFIG_CMDLINE_EDITING 46 #define CONFIG_SKIP_LOWLEVEL_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F 48 49 /* MACH_TYPE_TRATS macro will be removed once added to mach-types */ 50 #define MACH_TYPE_TRATS 3928 51 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS 52 53 #include <asm/sizes.h> 54 /* Size of malloc() pool */ 55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) 56 57 /* select serial console configuration */ 58 #define CONFIG_SERIAL2 /* use SERIAL 2 */ 59 #define CONFIG_BAUDRATE 115200 60 61 /* MMC */ 62 #define CONFIG_GENERIC_MMC 63 #define CONFIG_MMC 64 #define CONFIG_S5P_SDHCI 65 #define CONFIG_SDHCI 66 #define CONFIG_MMC_SDMA 67 68 /* PWM */ 69 #define CONFIG_PWM 70 71 /* It should define before config_cmd_default.h */ 72 #define CONFIG_SYS_NO_FLASH 73 74 /* Command definition */ 75 #include <config_cmd_default.h> 76 77 #undef CONFIG_CMD_FPGA 78 #undef CONFIG_CMD_MISC 79 #undef CONFIG_CMD_NET 80 #undef CONFIG_CMD_NFS 81 #undef CONFIG_CMD_XIMG 82 #undef CONFIG_CMD_CACHE 83 #undef CONFIG_CMD_ONENAND 84 #undef CONFIG_CMD_MTDPARTS 85 #define CONFIG_CMD_MMC 86 #define CONFIG_CMD_DFU 87 #define CONFIG_CMD_GPT 88 #define CONFIG_CMD_SETEXPR 89 90 /* FAT */ 91 #define CONFIG_CMD_FAT 92 #define CONFIG_FAT_WRITE 93 94 /* USB Composite download gadget - g_dnl */ 95 #define CONFIG_USBDOWNLOAD_GADGET 96 97 /* TIZEN THOR downloader support */ 98 #define CONFIG_CMD_THOR_DOWNLOAD 99 #define CONFIG_THOR_FUNCTION 100 101 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M 102 #define DFU_DEFAULT_POLL_TIMEOUT 300 103 #define CONFIG_DFU_FUNCTION 104 #define CONFIG_DFU_MMC 105 106 /* USB Samsung's IDs */ 107 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 108 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 109 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM 110 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D 111 #define CONFIG_G_DNL_MANUFACTURER "Samsung" 112 113 #define CONFIG_BOOTDELAY 1 114 #define CONFIG_ZERO_BOOTDELAY_CHECK 115 #define CONFIG_BOOTARGS "Please use defined boot" 116 #define CONFIG_BOOTCOMMAND "run mmcboot" 117 118 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 119 #define CONFIG_BOOTBLOCK "10" 120 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 121 122 /* Tizen - partitions definitions */ 123 #define PARTS_CSA "csa-mmc" 124 #define PARTS_BOOTLOADER "u-boot" 125 #define PARTS_BOOT "boot" 126 #define PARTS_ROOT "platform" 127 #define PARTS_DATA "data" 128 #define PARTS_CSC "csc" 129 #define PARTS_UMS "ums" 130 131 #define PARTS_DEFAULT \ 132 "uuid_disk=${uuid_gpt_disk};" \ 133 "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ 134 "name="PARTS_BOOTLOADER",size=60MiB," \ 135 "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ 136 "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ 137 "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ 138 "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ 139 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ 140 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ 141 142 #define CONFIG_DFU_ALT \ 143 "u-boot mmc 80 400;" \ 144 "uImage ext4 0 2;" \ 145 "exynos4210-trats.dtb ext4 0 2;" \ 146 ""PARTS_BOOT" part 0 2;" \ 147 ""PARTS_ROOT" part 0 5;" \ 148 ""PARTS_DATA" part 0 6;" \ 149 ""PARTS_UMS" part 0 7\0" 150 151 #define CONFIG_ENV_OVERWRITE 152 #define CONFIG_SYS_CONSOLE_INFO_QUIET 153 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 154 155 #define CONFIG_EXTRA_ENV_SETTINGS \ 156 "bootk=" \ 157 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 158 "updatemmc=" \ 159 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ 160 "mmc boot 0 1 1 0\0" \ 161 "updatebackup=" \ 162 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ 163 "mmc boot 0 1 1 0\0" \ 164 "updatebootb=" \ 165 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 166 "lpj=lpj=3981312\0" \ 167 "nfsboot=" \ 168 "setenv bootargs root=/dev/nfs rw " \ 169 "nfsroot=${nfsroot},nolock,tcp " \ 170 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 171 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 172 "; run bootk\0" \ 173 "ramfsboot=" \ 174 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 175 "${console} ${meminfo} " \ 176 "initrd=0x43000000,8M ramdisk=8192\0" \ 177 "mmcboot=" \ 178 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 179 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 180 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ 181 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ 182 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 183 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 184 "verify=n\0" \ 185 "rootfstype=ext4\0" \ 186 "console=" CONFIG_DEFAULT_CONSOLE \ 187 "meminfo=crashkernel=32M@0x50000000\0" \ 188 "nfsroot=/nfsroot/arm\0" \ 189 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 190 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 191 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ 192 "${fdtfile}\0" \ 193 "mmcdev=0\0" \ 194 "mmcbootpart=2\0" \ 195 "mmcrootpart=5\0" \ 196 "opts=always_resume=1\0" \ 197 "partitions=" PARTS_DEFAULT \ 198 "dfu_alt_info=" CONFIG_DFU_ALT \ 199 "spladdr=0x40000100\0" \ 200 "splsize=0x200\0" \ 201 "splfile=falcon.bin\0" \ 202 "spl_export=" \ 203 "setexpr spl_imgsize ${splsize} + 8 ;" \ 204 "setenv spl_imgsize 0x${spl_imgsize};" \ 205 "setexpr spl_imgaddr ${spladdr} - 8 ;" \ 206 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ 207 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ 208 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 209 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ 210 "spl export atags 0x40007FC0;" \ 211 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ 212 "mw.l ${spl_addr_tmp} ${splsize};" \ 213 "ext4write mmc ${mmcdev}:${mmcbootpart}" \ 214 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ 215 "setenv spl_imgsize;" \ 216 "setenv spl_imgaddr;" \ 217 "setenv spl_addr_tmp;\0" \ 218 "fdtaddr=40800000\0" \ 219 "fdtfile=exynos4210-trats.dtb\0" 220 221 222 /* Miscellaneous configurable options */ 223 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 224 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 225 #define CONFIG_SYS_PROMPT "TRATS # " 226 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 227 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 228 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 229 /* Boot Argument Buffer Size */ 230 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 231 /* memtest works on */ 232 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 233 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 234 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 235 236 /* TRATS has 4 banks of DRAM */ 237 #define CONFIG_NR_DRAM_BANKS 4 238 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ 239 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 240 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE 241 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) 242 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE 243 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) 244 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE 245 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) 246 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE 247 248 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 249 250 #define CONFIG_SYS_MONITOR_BASE 0x00000000 251 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 252 253 #define CONFIG_ENV_IS_IN_MMC 254 #define CONFIG_SYS_MMC_ENV_DEV 0 255 #define CONFIG_ENV_SIZE 4096 256 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ 257 258 #define CONFIG_DOS_PARTITION 259 #define CONFIG_EFI_PARTITION 260 261 /* EXT4 */ 262 #define CONFIG_CMD_EXT4 263 #define CONFIG_CMD_EXT4_WRITE 264 /* Falcon mode definitions */ 265 #define CONFIG_CMD_SPL 266 #define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100 267 268 /* GPT */ 269 #define CONFIG_EFI_PARTITION 270 #define CONFIG_PARTITION_UUIDS 271 272 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 273 #define CONFIG_SYS_CACHELINE_SIZE 32 274 275 #define CONFIG_SYS_I2C 276 #define CONFIG_SYS_I2C_S3C24X0 277 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 278 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0xFE 279 #define CONFIG_MAX_I2C_NUM 8 280 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 281 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 282 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F 283 #define CONFIG_SOFT_I2C_READ_REPEATED_START 284 #define CONFIG_SYS_I2C_INIT_BOARD 285 286 #include <asm/arch/gpio.h> 287 288 /* I2C FG */ 289 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part2_get_nr(y4, 1) 290 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part2_get_nr(y4, 0) 291 292 #define CONFIG_POWER 293 #define CONFIG_POWER_I2C 294 #define CONFIG_POWER_MAX8997 295 296 #define CONFIG_POWER_FG 297 #define CONFIG_POWER_FG_MAX17042 298 #define CONFIG_POWER_MUIC 299 #define CONFIG_POWER_MUIC_MAX8997 300 #define CONFIG_POWER_BATTERY 301 #define CONFIG_POWER_BATTERY_TRATS 302 #define CONFIG_USB_GADGET 303 #define CONFIG_USB_GADGET_S3C_UDC_OTG 304 #define CONFIG_USB_GADGET_DUALSPEED 305 #define CONFIG_USB_GADGET_VBUS_DRAW 2 306 #define CONFIG_USB_CABLE_CHECK 307 308 /* LCD */ 309 #define CONFIG_EXYNOS_FB 310 #define CONFIG_LCD 311 #define CONFIG_CMD_BMP 312 #define CONFIG_BMP_32BPP 313 #define CONFIG_FB_ADDR 0x52504000 314 #define CONFIG_S6E8AX0 315 #define CONFIG_EXYNOS_MIPI_DSIM 316 #define CONFIG_VIDEO_BMP_GZIP 317 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12)) 318 319 #define CONFIG_CMD_USB_MASS_STORAGE 320 #define CONFIG_USB_GADGET_MASS_STORAGE 321 322 /* Pass open firmware flat tree */ 323 #define CONFIG_OF_LIBFDT 1 324 325 #endif /* __CONFIG_H */ 326