xref: /rk3399_rockchip-uboot/include/configs/trats.h (revision 14464b32f69185c9e884f0fbe96a03a7504bd70d)
189f95492SHeungJun, Kim /*
289f95492SHeungJun, Kim  * Copyright (C) 2011 Samsung Electronics
389f95492SHeungJun, Kim  * Heungjun Kim <riverful.kim@samsung.com>
489f95492SHeungJun, Kim  *
589f95492SHeungJun, Kim  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
689f95492SHeungJun, Kim  *
71a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
889f95492SHeungJun, Kim  */
989f95492SHeungJun, Kim 
10fe601647SPiotr Wilczek #ifndef __CONFIG_TRATS_H
11fe601647SPiotr Wilczek #define __CONFIG_TRATS_H
1289f95492SHeungJun, Kim 
134c7bb1d2SSimon Glass #include <configs/exynos4-common.h>
14fe601647SPiotr Wilczek 
15fe601647SPiotr Wilczek #define CONFIG_TRATS
16fe601647SPiotr Wilczek 
1790464971SDonghwa Lee #define CONFIG_TIZEN			/* TIZEN lib */
1889f95492SHeungJun, Kim 
19c4e96dbfSŁukasz Majewski #define CONFIG_SYS_L2CACHE_OFF
20d0460b01SŁukasz Majewski #ifndef CONFIG_SYS_L2CACHE_OFF
21d0460b01SŁukasz Majewski #define CONFIG_SYS_L2_PL310
22d0460b01SŁukasz Majewski #define CONFIG_SYS_PL310_BASE	0x10502000
23d0460b01SŁukasz Majewski #endif
2489f95492SHeungJun, Kim 
25fe601647SPiotr Wilczek /* TRATS has 4 banks of DRAM */
26fe601647SPiotr Wilczek #define CONFIG_NR_DRAM_BANKS		4
2789f95492SHeungJun, Kim #define CONFIG_SYS_SDRAM_BASE		0x40000000
28fe601647SPiotr Wilczek #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
2989f95492SHeungJun, Kim #define CONFIG_SYS_TEXT_BASE		0x63300000
30fe601647SPiotr Wilczek #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
3189f95492SHeungJun, Kim 
32fe601647SPiotr Wilczek /* memtest works on */
33fe601647SPiotr Wilczek #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
34fe601647SPiotr Wilczek #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
35fe601647SPiotr Wilczek #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
3689f95492SHeungJun, Kim 
37fe601647SPiotr Wilczek #define CONFIG_SYS_TEXT_BASE		0x63300000
3889f95492SHeungJun, Kim 
3989f95492SHeungJun, Kim /* select serial console configuration */
40fe601647SPiotr Wilczek #define CONFIG_SERIAL2
4189f95492SHeungJun, Kim 
42fe601647SPiotr Wilczek #define CONFIG_MACH_TYPE		MACH_TYPE_TRATS
4389f95492SHeungJun, Kim 
44*0a1387bfSŁukasz Majewski #define CONFIG_BOOTCOMMAND		"run autoboot"
456afc3f6eSŁukasz Majewski #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
4689f95492SHeungJun, Kim 
47fe601647SPiotr Wilczek #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
48fe601647SPiotr Wilczek 					- GENERATED_GBL_DATA_SIZE)
49fe601647SPiotr Wilczek 
50fe601647SPiotr Wilczek #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
51fe601647SPiotr Wilczek 
52fe601647SPiotr Wilczek #define CONFIG_SYS_MONITOR_BASE	0x00000000
53fe601647SPiotr Wilczek 
5489f95492SHeungJun, Kim #define CONFIG_BOOTBLOCK		"10"
5589f95492SHeungJun, Kim #define CONFIG_ENV_COMMON_BOOT		"${console} ${meminfo}"
5689f95492SHeungJun, Kim 
57fe601647SPiotr Wilczek #define CONFIG_SYS_MMC_ENV_DEV		CONFIG_MMC_DEFAULT_DEV
58fe601647SPiotr Wilczek #define CONFIG_ENV_SIZE			4096
59fe601647SPiotr Wilczek #define CONFIG_ENV_OFFSET		((32 - 4) << 10) /* 32KiB - 4KiB */
60fe601647SPiotr Wilczek 
61fe601647SPiotr Wilczek #define CONFIG_ENV_OVERWRITE
62fe601647SPiotr Wilczek 
63fe601647SPiotr Wilczek #define CONFIG_ENV_VARS_UBOOT_CONFIG
64fe601647SPiotr Wilczek #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
65fe601647SPiotr Wilczek 
669960d9a8SLukasz Majewski /* Tizen - partitions definitions */
679960d9a8SLukasz Majewski #define PARTS_CSA		"csa-mmc"
689960d9a8SLukasz Majewski #define PARTS_BOOT		"boot"
6918f3e0ebSPrzemyslaw Marczak #define PARTS_QBOOT		"qboot"
7018f3e0ebSPrzemyslaw Marczak #define PARTS_CSC		"csc"
719960d9a8SLukasz Majewski #define PARTS_ROOT		"platform"
729960d9a8SLukasz Majewski #define PARTS_DATA		"data"
739960d9a8SLukasz Majewski #define PARTS_UMS		"ums"
749960d9a8SLukasz Majewski 
759960d9a8SLukasz Majewski #define PARTS_DEFAULT \
769960d9a8SLukasz Majewski 	"uuid_disk=${uuid_gpt_disk};" \
7718f3e0ebSPrzemyslaw Marczak 	"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
7818f3e0ebSPrzemyslaw Marczak 	"name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
7918f3e0ebSPrzemyslaw Marczak 	"name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
809960d9a8SLukasz Majewski 	"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
8118f3e0ebSPrzemyslaw Marczak 	"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
8218f3e0ebSPrzemyslaw Marczak 	"name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
839960d9a8SLukasz Majewski 	"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
849960d9a8SLukasz Majewski 
8593a1ab57SLukasz Majewski #define CONFIG_DFU_ALT \
86b7d4259aSMateusz Zalega 	"u-boot raw 0x80 0x400;" \
87dcb7eb66SŁukasz Majewski 	"/uImage ext4 0 2;" \
88dcb7eb66SŁukasz Majewski 	"/modem.bin ext4 0 2;" \
89dcb7eb66SŁukasz Majewski 	"/exynos4210-trats.dtb ext4 0 2;" \
9018f3e0ebSPrzemyslaw Marczak 	""PARTS_CSA" part 0 1;" \
91cdd15bceSŁukasz Majewski 	""PARTS_BOOT" part 0 2;" \
9218f3e0ebSPrzemyslaw Marczak 	""PARTS_QBOOT" part 0 3;" \
9318f3e0ebSPrzemyslaw Marczak 	""PARTS_CSC" part 0 4;" \
94cdd15bceSŁukasz Majewski 	""PARTS_ROOT" part 0 5;" \
95cdd15bceSŁukasz Majewski 	""PARTS_DATA" part 0 6;" \
96a0afc6f3SPrzemyslaw Marczak 	""PARTS_UMS" part 0 7;" \
97*0a1387bfSŁukasz Majewski 	"params.bin raw 0x38 0x8;" \
98*0a1387bfSŁukasz Majewski 	"/Image.itb ext4 0 2\0"
9993a1ab57SLukasz Majewski 
10089f95492SHeungJun, Kim #define CONFIG_EXTRA_ENV_SETTINGS \
10189f95492SHeungJun, Kim 	"bootk=" \
102425e26deSPiotr Wilczek 		"run loaduimage;" \
103425e26deSPiotr Wilczek 		"if run loaddtb; then " \
104425e26deSPiotr Wilczek 			"bootm 0x40007FC0 - ${fdtaddr};" \
105425e26deSPiotr Wilczek 		"fi;" \
106425e26deSPiotr Wilczek 		"bootm 0x40007FC0;\0" \
10789f95492SHeungJun, Kim 	"updatebackup=" \
108188c42b3SJaehoon Chung 		"mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
109188c42b3SJaehoon Chung 		"mmc dev 0 0\0" \
11089f95492SHeungJun, Kim 	"updatebootb=" \
11189f95492SHeungJun, Kim 		"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
11289f95492SHeungJun, Kim 	"lpj=lpj=3981312\0" \
11389f95492SHeungJun, Kim 	"nfsboot=" \
11435777e22SŁukasz Majewski 		"setenv bootargs root=/dev/nfs rw " \
11589f95492SHeungJun, Kim 		"nfsroot=${nfsroot},nolock,tcp " \
11689f95492SHeungJun, Kim 		"ip=${ipaddr}:${serverip}:${gatewayip}:" \
11789f95492SHeungJun, Kim 		"${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
11889f95492SHeungJun, Kim 		"; run bootk\0" \
11989f95492SHeungJun, Kim 	"ramfsboot=" \
12035777e22SŁukasz Majewski 		"setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
12189f95492SHeungJun, Kim 		"${console} ${meminfo} " \
12289f95492SHeungJun, Kim 		"initrd=0x43000000,8M ramdisk=8192\0" \
12389f95492SHeungJun, Kim 	"mmcboot=" \
12435777e22SŁukasz Majewski 		"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
12589f95492SHeungJun, Kim 		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
126425e26deSPiotr Wilczek 		"run bootk\0" \
12735777e22SŁukasz Majewski 	"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
12889f95492SHeungJun, Kim 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
12989f95492SHeungJun, Kim 	"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
13089f95492SHeungJun, Kim 	"verify=n\0" \
13189f95492SHeungJun, Kim 	"rootfstype=ext4\0" \
13289f95492SHeungJun, Kim 	"console=" CONFIG_DEFAULT_CONSOLE \
13389f95492SHeungJun, Kim 	"meminfo=crashkernel=32M@0x50000000\0" \
13489f95492SHeungJun, Kim 	"nfsroot=/nfsroot/arm\0" \
13589f95492SHeungJun, Kim 	"bootblock=" CONFIG_BOOTBLOCK "\0" \
13635777e22SŁukasz Majewski 	"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
137ba223bb2SArkadiusz Wlodarczyk 	"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
138ba223bb2SArkadiusz Wlodarczyk 		"${fdtfile}\0" \
13989f95492SHeungJun, Kim 	"mmcdev=0\0" \
14089f95492SHeungJun, Kim 	"mmcbootpart=2\0" \
14135777e22SŁukasz Majewski 	"mmcrootpart=5\0" \
14293a1ab57SLukasz Majewski 	"opts=always_resume=1\0" \
1439960d9a8SLukasz Majewski 	"partitions=" PARTS_DEFAULT \
14435777e22SŁukasz Majewski 	"dfu_alt_info=" CONFIG_DFU_ALT \
14535777e22SŁukasz Majewski 	"spladdr=0x40000100\0" \
14635777e22SŁukasz Majewski 	"splsize=0x200\0" \
14735777e22SŁukasz Majewski 	"splfile=falcon.bin\0" \
14835777e22SŁukasz Majewski 	"spl_export=" \
14935777e22SŁukasz Majewski 		   "setexpr spl_imgsize ${splsize} + 8 ;" \
150dc993a65SPrzemyslaw Marczak 		   "setenv spl_imgsize 0x${spl_imgsize};" \
15135777e22SŁukasz Majewski 		   "setexpr spl_imgaddr ${spladdr} - 8 ;" \
15235777e22SŁukasz Majewski 		   "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
15335777e22SŁukasz Majewski 		   "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
15435777e22SŁukasz Majewski 		   "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
15535777e22SŁukasz Majewski 		   "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
15635777e22SŁukasz Majewski 		   "spl export atags 0x40007FC0;" \
15735777e22SŁukasz Majewski 		   "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
15835777e22SŁukasz Majewski 		   "mw.l ${spl_addr_tmp} ${splsize};" \
15935777e22SŁukasz Majewski 		   "ext4write mmc ${mmcdev}:${mmcbootpart}" \
16035777e22SŁukasz Majewski 		   " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
16135777e22SŁukasz Majewski 		   "setenv spl_imgsize;" \
16235777e22SŁukasz Majewski 		   "setenv spl_imgaddr;" \
163ba223bb2SArkadiusz Wlodarczyk 		   "setenv spl_addr_tmp;\0" \
164*0a1387bfSŁukasz Majewski 	CONFIG_EXTRA_ENV_ITB \
165ba223bb2SArkadiusz Wlodarczyk 	"fdtaddr=40800000\0" \
166ba223bb2SArkadiusz Wlodarczyk 
16735777e22SŁukasz Majewski /* Falcon mode definitions */
168fe601647SPiotr Wilczek #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
16989f95492SHeungJun, Kim 
1709960d9a8SLukasz Majewski /* GPT */
1719960d9a8SLukasz Majewski 
172e0021706SPrzemyslaw Marczak /* Security subsystem - enable hw_rand() */
173e0021706SPrzemyslaw Marczak #define CONFIG_EXYNOS_ACE_SHA
174e0021706SPrzemyslaw Marczak #define CONFIG_LIB_HW_RAND
175e0021706SPrzemyslaw Marczak 
176679549d1SPrzemyslaw Marczak /* Common misc for Samsung */
177679549d1SPrzemyslaw Marczak #define CONFIG_MISC_COMMON
178679549d1SPrzemyslaw Marczak 
179679549d1SPrzemyslaw Marczak #define CONFIG_MISC_INIT_R
180679549d1SPrzemyslaw Marczak 
18100e64ab6SPrzemyslaw Marczak /* Download menu - Samsung common */
18200e64ab6SPrzemyslaw Marczak #define CONFIG_LCD_MENU
18300e64ab6SPrzemyslaw Marczak #define CONFIG_LCD_MENU_BOARD
18400e64ab6SPrzemyslaw Marczak 
18500e64ab6SPrzemyslaw Marczak /* Download menu - definitions for check keys */
18600e64ab6SPrzemyslaw Marczak #ifndef __ASSEMBLY__
18700e64ab6SPrzemyslaw Marczak 
18800e64ab6SPrzemyslaw Marczak #define KEY_PWR_PMIC_NAME		"MAX8997_PMIC"
18900e64ab6SPrzemyslaw Marczak #define KEY_PWR_STATUS_REG		MAX8997_REG_STATUS1
19000e64ab6SPrzemyslaw Marczak #define KEY_PWR_STATUS_MASK		(1 << 0)
19100e64ab6SPrzemyslaw Marczak #define KEY_PWR_INTERRUPT_REG		MAX8997_REG_INT1
19200e64ab6SPrzemyslaw Marczak #define KEY_PWR_INTERRUPT_MASK		(1 << 0)
19300e64ab6SPrzemyslaw Marczak 
1949b97b727SAkshay Saraswat #define KEY_VOL_UP_GPIO			EXYNOS4_GPIO_X20
1959b97b727SAkshay Saraswat #define KEY_VOL_DOWN_GPIO		EXYNOS4_GPIO_X21
19600e64ab6SPrzemyslaw Marczak #endif /* __ASSEMBLY__ */
19700e64ab6SPrzemyslaw Marczak 
19800e64ab6SPrzemyslaw Marczak /* LCD console */
19900e64ab6SPrzemyslaw Marczak #define LCD_BPP			LCD_COLOR16
20000e64ab6SPrzemyslaw Marczak 
20151b1cd6dSDonghwa Lee /* LCD */
2022df21cb3SPrzemyslaw Marczak #define CONFIG_BMP_16BPP
20351b1cd6dSDonghwa Lee #define CONFIG_FB_ADDR		0x52504000
20451b1cd6dSDonghwa Lee #define CONFIG_EXYNOS_MIPI_DSIM
20590464971SDonghwa Lee #define CONFIG_VIDEO_BMP_GZIP
206903afe18SPrzemyslaw Marczak #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
20751b1cd6dSDonghwa Lee 
20889f95492SHeungJun, Kim #endif	/* __CONFIG_H */
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