1*452308c0SStefan Roese /* 2*452308c0SStefan Roese * Copyright (C) 2015 Stefan Roese <sr@denx.de> 3*452308c0SStefan Roese * 4*452308c0SStefan Roese * SPDX-License-Identifier: GPL-2.0+ 5*452308c0SStefan Roese */ 6*452308c0SStefan Roese 7*452308c0SStefan Roese #ifndef __CONFIG_TQMA6_WRU4_H 8*452308c0SStefan Roese #define __CONFIG_TQMA6_WRU4_H 9*452308c0SStefan Roese 10*452308c0SStefan Roese #define CONFIG_DEFAULT_FDT_FILE "imx6s-wru4.dtb" 11*452308c0SStefan Roese 12*452308c0SStefan Roese /* DTT sensors */ 13*452308c0SStefan Roese #define CONFIG_DTT_SENSORS { 0, 1 } 14*452308c0SStefan Roese #define CONFIG_SYS_DTT_BUS_NUM 2 15*452308c0SStefan Roese 16*452308c0SStefan Roese /* Ethernet */ 17*452308c0SStefan Roese #define CONFIG_FEC_XCV_TYPE RMII 18*452308c0SStefan Roese #define CONFIG_ETHPRIME "FEC" 19*452308c0SStefan Roese #define CONFIG_FEC_MXC_PHYADDR 0x01 20*452308c0SStefan Roese #define CONFIG_PHY_SMSC 21*452308c0SStefan Roese 22*452308c0SStefan Roese /* UART */ 23*452308c0SStefan Roese #define CONFIG_MXC_UART_BASE UART4_BASE 24*452308c0SStefan Roese #define CONFIG_CONSOLE_DEV "ttymxc3" 25*452308c0SStefan Roese 26*452308c0SStefan Roese #define CONFIG_MISC_INIT_R 27*452308c0SStefan Roese 28*452308c0SStefan Roese /* Watchdog */ 29*452308c0SStefan Roese #define CONFIG_HW_WATCHDOG 30*452308c0SStefan Roese #define CONFIG_IMX_WATCHDOG 31*452308c0SStefan Roese #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 32*452308c0SStefan Roese 33*452308c0SStefan Roese /* Config on-board RTC */ 34*452308c0SStefan Roese #define CONFIG_RTC_DS1337 35*452308c0SStefan Roese #define CONFIG_SYS_RTC_BUS_NUM 2 36*452308c0SStefan Roese #define CONFIG_SYS_I2C_RTC_ADDR 0x68 37*452308c0SStefan Roese /* Turn off RTC square-wave output to save battery */ 38*452308c0SStefan Roese #define CONFIG_SYS_RTC_DS1337_NOOSC 39*452308c0SStefan Roese #define CONFIG_CMD_DATE 40*452308c0SStefan Roese 41*452308c0SStefan Roese #define CONFIG_CMD_GPIO 42*452308c0SStefan Roese 43*452308c0SStefan Roese /* LED */ 44*452308c0SStefan Roese #define CONFIG_CMD_LED 45*452308c0SStefan Roese #define CONFIG_STATUS_LED 46*452308c0SStefan Roese #define CONFIG_BOARD_SPECIFIC_LED 47*452308c0SStefan Roese #define STATUS_LED_BIT 0 48*452308c0SStefan Roese #define STATUS_LED_STATE STATUS_LED_ON 49*452308c0SStefan Roese #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 50*452308c0SStefan Roese #define STATUS_LED_BIT1 1 51*452308c0SStefan Roese #define STATUS_LED_STATE1 STATUS_LED_ON 52*452308c0SStefan Roese #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 53*452308c0SStefan Roese #define STATUS_LED_BIT2 2 54*452308c0SStefan Roese #define STATUS_LED_STATE2 STATUS_LED_ON 55*452308c0SStefan Roese #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) 56*452308c0SStefan Roese #define STATUS_LED_BIT3 3 57*452308c0SStefan Roese #define STATUS_LED_STATE3 STATUS_LED_ON 58*452308c0SStefan Roese #define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) 59*452308c0SStefan Roese #define STATUS_LED_BIT4 4 60*452308c0SStefan Roese #define STATUS_LED_STATE4 STATUS_LED_ON 61*452308c0SStefan Roese #define STATUS_LED_PERIOD4 (CONFIG_SYS_HZ / 2) 62*452308c0SStefan Roese #define STATUS_LED_BIT5 5 63*452308c0SStefan Roese #define STATUS_LED_STATE5 STATUS_LED_ON 64*452308c0SStefan Roese #define STATUS_LED_PERIOD5 (CONFIG_SYS_HZ / 2) 65*452308c0SStefan Roese 66*452308c0SStefan Roese /* Bootcounter */ 67*452308c0SStefan Roese #define CONFIG_BOOTCOUNT_LIMIT 68*452308c0SStefan Roese #define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR 69*452308c0SStefan Roese #define CONFIG_SYS_BOOTCOUNT_BE 70*452308c0SStefan Roese 71*452308c0SStefan Roese #endif /* __CONFIG_TQMA6_WRU4_H */ 72