1452308c0SStefan Roese /* 2452308c0SStefan Roese * Copyright (C) 2015 Stefan Roese <sr@denx.de> 3452308c0SStefan Roese * 4452308c0SStefan Roese * SPDX-License-Identifier: GPL-2.0+ 5452308c0SStefan Roese */ 6452308c0SStefan Roese 7452308c0SStefan Roese #ifndef __CONFIG_TQMA6_WRU4_H 8452308c0SStefan Roese #define __CONFIG_TQMA6_WRU4_H 9452308c0SStefan Roese 10452308c0SStefan Roese /* Ethernet */ 11452308c0SStefan Roese #define CONFIG_FEC_XCV_TYPE RMII 12452308c0SStefan Roese #define CONFIG_ETHPRIME "FEC" 13452308c0SStefan Roese #define CONFIG_FEC_MXC_PHYADDR 0x01 14452308c0SStefan Roese #define CONFIG_PHY_SMSC 15452308c0SStefan Roese 16452308c0SStefan Roese /* UART */ 17452308c0SStefan Roese #define CONFIG_MXC_UART_BASE UART4_BASE 1812ca05a3SSimon Glass #define CONSOLE_DEV "ttymxc3" 19452308c0SStefan Roese 20452308c0SStefan Roese #define CONFIG_MISC_INIT_R 21452308c0SStefan Roese 22452308c0SStefan Roese /* Watchdog */ 23452308c0SStefan Roese #define CONFIG_HW_WATCHDOG 24452308c0SStefan Roese #define CONFIG_IMX_WATCHDOG 25452308c0SStefan Roese #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 26452308c0SStefan Roese 27452308c0SStefan Roese /* Config on-board RTC */ 28452308c0SStefan Roese #define CONFIG_RTC_DS1337 29452308c0SStefan Roese #define CONFIG_SYS_RTC_BUS_NUM 2 30452308c0SStefan Roese #define CONFIG_SYS_I2C_RTC_ADDR 0x68 31452308c0SStefan Roese /* Turn off RTC square-wave output to save battery */ 32*2bd3cab3SChris Packham #define CONFIG_RTC_DS1337_NOOSC 33452308c0SStefan Roese 34452308c0SStefan Roese /* LED */ 35452308c0SStefan Roese 36452308c0SStefan Roese /* Bootcounter */ 37452308c0SStefan Roese #define CONFIG_BOOTCOUNT_LIMIT 38452308c0SStefan Roese #define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR 39452308c0SStefan Roese #define CONFIG_SYS_BOOTCOUNT_BE 40452308c0SStefan Roese 418b8ca0d7SStefan Roese /* 428b8ca0d7SStefan Roese * Remove all unused interfaces / commands that are defined in 438b8ca0d7SStefan Roese * the common header tqms6.h 448b8ca0d7SStefan Roese */ 458b8ca0d7SStefan Roese #undef CONFIG_MXC_SPI 468b8ca0d7SStefan Roese 47452308c0SStefan Roese #endif /* __CONFIG_TQMA6_WRU4_H */ 48