1b29ca4a1SStefan Roese /* 2b29ca4a1SStefan Roese * Copyright (C) 2013 Stefan Roese <sr@denx.de> 3b29ca4a1SStefan Roese * 4b29ca4a1SStefan Roese * Configuration settings for the ProjectionDesign / Barco 5b29ca4a1SStefan Roese * Titanium board. 6b29ca4a1SStefan Roese * 7b29ca4a1SStefan Roese * Based on mx6qsabrelite.h which is: 8b29ca4a1SStefan Roese * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 9b29ca4a1SStefan Roese * 101a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 11b29ca4a1SStefan Roese */ 12b29ca4a1SStefan Roese 13b29ca4a1SStefan Roese #ifndef __CONFIG_H 14b29ca4a1SStefan Roese #define __CONFIG_H 15b29ca4a1SStefan Roese 1602824dc7SEric Nelson #include "mx6_common.h" 17b29ca4a1SStefan Roese 18b29ca4a1SStefan Roese #define CONFIG_MX6Q 19b29ca4a1SStefan Roese 20b29ca4a1SStefan Roese #define MACH_TYPE_TITANIUM 3769 21b29ca4a1SStefan Roese #define CONFIG_MACH_TYPE MACH_TYPE_TITANIUM 22b29ca4a1SStefan Roese 23b29ca4a1SStefan Roese /* Size of malloc() pool */ 24b29ca4a1SStefan Roese #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) 25b29ca4a1SStefan Roese 26b29ca4a1SStefan Roese #define CONFIG_BOARD_EARLY_INIT_F 27b29ca4a1SStefan Roese #define CONFIG_MISC_INIT_R 28b29ca4a1SStefan Roese 29b29ca4a1SStefan Roese #define CONFIG_MXC_UART 30b29ca4a1SStefan Roese #define CONFIG_MXC_UART_BASE UART1_BASE 31b29ca4a1SStefan Roese 32b29ca4a1SStefan Roese /* I2C Configs */ 33b29ca4a1SStefan Roese #define CONFIG_CMD_I2C 34b089d039Strem #define CONFIG_SYS_I2C 35b089d039Strem #define CONFIG_SYS_I2C_MXC 36*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 37*03544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 38f8cb101eSYork Sun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 39b29ca4a1SStefan Roese #define CONFIG_SYS_I2C_SPEED 100000 40b29ca4a1SStefan Roese 41b29ca4a1SStefan Roese /* MMC Configs */ 42b29ca4a1SStefan Roese #define CONFIG_SYS_FSL_ESDHC_ADDR 0 43b29ca4a1SStefan Roese #define CONFIG_SYS_FSL_USDHC_NUM 1 44b29ca4a1SStefan Roese 45b29ca4a1SStefan Roese #define CONFIG_CMD_PING 46b29ca4a1SStefan Roese #define CONFIG_CMD_DHCP 47b29ca4a1SStefan Roese #define CONFIG_CMD_MII 48b29ca4a1SStefan Roese #define CONFIG_FEC_MXC 49b29ca4a1SStefan Roese #define CONFIG_MII 50b29ca4a1SStefan Roese #define IMX_FEC_BASE ENET_BASE_ADDR 51b29ca4a1SStefan Roese #define CONFIG_FEC_XCV_TYPE RGMII 52b29ca4a1SStefan Roese #define CONFIG_FEC_MXC_PHYADDR 4 53b29ca4a1SStefan Roese #define CONFIG_PHYLIB 54b29ca4a1SStefan Roese #define CONFIG_PHY_MICREL 55b29ca4a1SStefan Roese #define CONFIG_PHY_MICREL_KSZ9021 56b29ca4a1SStefan Roese 57b29ca4a1SStefan Roese /* USB Configs */ 58b29ca4a1SStefan Roese #define CONFIG_CMD_USB 59b29ca4a1SStefan Roese #define CONFIG_USB_EHCI 60b29ca4a1SStefan Roese #define CONFIG_USB_EHCI_MX6 61b29ca4a1SStefan Roese #define CONFIG_USB_STORAGE 62b29ca4a1SStefan Roese #define CONFIG_MXC_USB_PORT 1 63b29ca4a1SStefan Roese #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 64b29ca4a1SStefan Roese #define CONFIG_MXC_USB_FLAGS 0 65b29ca4a1SStefan Roese 66b29ca4a1SStefan Roese /* Miscellaneous commands */ 67b29ca4a1SStefan Roese #define CONFIG_CMD_BMODE 68b29ca4a1SStefan Roese 69b29ca4a1SStefan Roese #define CONFIG_SYS_MEMTEST_START 0x10000000 70b29ca4a1SStefan Roese #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20)) 71b29ca4a1SStefan Roese 72b29ca4a1SStefan Roese #define CONFIG_HOSTNAME titanium 73b29ca4a1SStefan Roese #define CONFIG_UBI_PART ubi 74b29ca4a1SStefan Roese #define CONFIG_UBIFS_VOLUME rootfs0 75b29ca4a1SStefan Roese 76b29ca4a1SStefan Roese #define MTDIDS_DEFAULT "nand0=gpmi-nand" 77b29ca4a1SStefan Roese #define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \ 78b29ca4a1SStefan Roese "512k(env2),-(ubi)" 79b29ca4a1SStefan Roese 80b29ca4a1SStefan Roese #define CONFIG_EXTRA_ENV_SETTINGS \ 81b29ca4a1SStefan Roese "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 82b29ca4a1SStefan Roese "kernel_fs=/boot/uImage\0" \ 83b29ca4a1SStefan Roese "kernel_addr=11000000\0" \ 84b29ca4a1SStefan Roese "dtb=" __stringify(CONFIG_HOSTNAME) "/" \ 85b29ca4a1SStefan Roese __stringify(CONFIG_HOSTNAME) ".dtb\0" \ 86b29ca4a1SStefan Roese "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \ 87b29ca4a1SStefan Roese "dtb_addr=12800000\0" \ 88b29ca4a1SStefan Roese "script=boot.scr\0" \ 89b29ca4a1SStefan Roese "uimage=uImage\0" \ 90b29ca4a1SStefan Roese "console=ttymxc0\0" \ 91b29ca4a1SStefan Roese "baudrate=115200\0" \ 92b29ca4a1SStefan Roese "fdt_high=0xffffffff\0" \ 93b29ca4a1SStefan Roese "initrd_high=0xffffffff\0" \ 94b29ca4a1SStefan Roese "mmcdev=0\0" \ 95b29ca4a1SStefan Roese "mmcpart=1\0" \ 96b29ca4a1SStefan Roese "uimage=uImage\0" \ 97b29ca4a1SStefan Roese "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ 98b29ca4a1SStefan Roese " ${script}\0" \ 99b29ca4a1SStefan Roese "bootscript=echo Running bootscript from mmc ...; source\0" \ 100b29ca4a1SStefan Roese "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 101b29ca4a1SStefan Roese "mmcroot=/dev/mmcblk0p2\0" \ 102b29ca4a1SStefan Roese "mmcargs=setenv bootargs console=${console},${baudrate} " \ 103b29ca4a1SStefan Roese "root=${mmcroot} rootwait rw\0" \ 104b29ca4a1SStefan Roese "bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ 105b29ca4a1SStefan Roese " ${uimage}; bootm\0" \ 106b29ca4a1SStefan Roese "addip=setenv bootargs ${bootargs} " \ 107b29ca4a1SStefan Roese "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 108b29ca4a1SStefan Roese ":${hostname}:${netdev}:off panic=1\0" \ 109b29ca4a1SStefan Roese "addcon=setenv bootargs ${bootargs} console=ttymxc0," \ 110b29ca4a1SStefan Roese "${baudrate}\0" \ 111b29ca4a1SStefan Roese "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 112b29ca4a1SStefan Roese "rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \ 113b29ca4a1SStefan Roese "nfsargs=setenv bootargs root=/dev/nfs rw " \ 114b29ca4a1SStefan Roese "nfsroot=${serverip}:${rootpath}\0" \ 115b29ca4a1SStefan Roese "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \ 116b29ca4a1SStefan Roese "part=" __stringify(CONFIG_UBI_PART) "\0" \ 117b29ca4a1SStefan Roese "boot_vol=0\0" \ 118b29ca4a1SStefan Roese "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \ 119b29ca4a1SStefan Roese "load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \ 120b29ca4a1SStefan Roese "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \ 121b29ca4a1SStefan Roese " ${filesize}\0" \ 122b29ca4a1SStefan Roese "upd_ubifs=run load_ubifs update_ubifs\0" \ 123b29ca4a1SStefan Roese "init_ubi=nand erase.part ubi;ubi part ${part};" \ 124b29ca4a1SStefan Roese "ubi create ${vol} c800000\0" \ 125b29ca4a1SStefan Roese "mtdids=" MTDIDS_DEFAULT "\0" \ 126b29ca4a1SStefan Roese "mtdparts=" MTDPARTS_DEFAULT "\0" \ 127b29ca4a1SStefan Roese "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \ 128b29ca4a1SStefan Roese " addcon addmtd;" \ 129b29ca4a1SStefan Roese "bootm ${kernel_addr} - ${dtb_addr}\0" \ 130b29ca4a1SStefan Roese "ubifsargs=set bootargs ubi.mtd=ubi " \ 131b29ca4a1SStefan Roese "root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \ 132b29ca4a1SStefan Roese "ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \ 133b29ca4a1SStefan Roese "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \ 134b29ca4a1SStefan Roese "ubifsload ${dtb_addr} ${dtb_fs};\0" \ 135b29ca4a1SStefan Roese "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \ 136b29ca4a1SStefan Roese "addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \ 137b29ca4a1SStefan Roese "load_kernel=tftp ${kernel_addr} ${kernel}\0" \ 138b29ca4a1SStefan Roese "load_dtb=tftp ${dtb_addr} ${dtb}\0" \ 139b29ca4a1SStefan Roese "net_nfs=run load_dtb load_kernel; " \ 140b29ca4a1SStefan Roese "run nfsargs addip addcon addmtd;" \ 141b29ca4a1SStefan Roese "bootm ${kernel_addr} - ${dtb_addr}\0" \ 142b29ca4a1SStefan Roese "delenv=env default -a -f; saveenv; reset\0" 143b29ca4a1SStefan Roese 144b29ca4a1SStefan Roese #define CONFIG_BOOTCOMMAND "run nand_ubifs" 145b29ca4a1SStefan Roese 146b29ca4a1SStefan Roese /* Print Buffer Size */ 147b29ca4a1SStefan Roese #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 148b29ca4a1SStefan Roese sizeof(CONFIG_SYS_PROMPT) + 16) 149b29ca4a1SStefan Roese 150b29ca4a1SStefan Roese /* Physical Memory Map */ 151b29ca4a1SStefan Roese #define CONFIG_NR_DRAM_BANKS 1 152b29ca4a1SStefan Roese #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 153b29ca4a1SStefan Roese #define PHYS_SDRAM_SIZE (512 << 20) 154b29ca4a1SStefan Roese 155b29ca4a1SStefan Roese #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 156b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 157b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 158b29ca4a1SStefan Roese 159b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_SP_OFFSET \ 160b29ca4a1SStefan Roese (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 161b29ca4a1SStefan Roese #define CONFIG_SYS_INIT_SP_ADDR \ 162b29ca4a1SStefan Roese (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 163b29ca4a1SStefan Roese 164b29ca4a1SStefan Roese /* Enable NAND support */ 165b29ca4a1SStefan Roese #define CONFIG_CMD_NAND 166b29ca4a1SStefan Roese #define CONFIG_CMD_NAND_TRIMFFS 167b29ca4a1SStefan Roese #define CONFIG_CMD_TIME 168b29ca4a1SStefan Roese 169b29ca4a1SStefan Roese #ifdef CONFIG_CMD_NAND 170b29ca4a1SStefan Roese 171b29ca4a1SStefan Roese /* NAND stuff */ 172b29ca4a1SStefan Roese #define CONFIG_NAND_MXS 173b29ca4a1SStefan Roese #define CONFIG_SYS_MAX_NAND_DEVICE 1 174b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_BASE 0x40000000 175b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_5_ADDR_CYCLE 176b29ca4a1SStefan Roese #define CONFIG_SYS_NAND_ONFI_DETECTION 177b29ca4a1SStefan Roese 178b29ca4a1SStefan Roese /* DMA stuff, needed for GPMI/MXS NAND support */ 179b29ca4a1SStefan Roese #define CONFIG_APBH_DMA 180b29ca4a1SStefan Roese #define CONFIG_APBH_DMA_BURST 181b29ca4a1SStefan Roese #define CONFIG_APBH_DMA_BURST8 182b29ca4a1SStefan Roese 183b29ca4a1SStefan Roese /* Environment in NAND */ 184b29ca4a1SStefan Roese #define CONFIG_ENV_IS_IN_NAND 185b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET (16 << 20) 186b29ca4a1SStefan Roese #define CONFIG_ENV_SECT_SIZE (128 << 10) 187b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 188b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10)) 189b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 190b29ca4a1SStefan Roese 191b29ca4a1SStefan Roese #else /* CONFIG_CMD_NAND */ 192b29ca4a1SStefan Roese 193b29ca4a1SStefan Roese /* Environment in MMC */ 194b29ca4a1SStefan Roese #define CONFIG_ENV_SIZE (8 << 10) 195b29ca4a1SStefan Roese #define CONFIG_ENV_IS_IN_MMC 196b29ca4a1SStefan Roese #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 197b29ca4a1SStefan Roese #define CONFIG_SYS_MMC_ENV_DEV 0 198b29ca4a1SStefan Roese 199b29ca4a1SStefan Roese #endif /* CONFIG_CMD_NAND */ 200b29ca4a1SStefan Roese 201b29ca4a1SStefan Roese /* UBI/UBIFS config options */ 202b29ca4a1SStefan Roese #define CONFIG_LZO 203b29ca4a1SStefan Roese #define CONFIG_MTD_DEVICE 204b29ca4a1SStefan Roese #define CONFIG_MTD_PARTITIONS 205b29ca4a1SStefan Roese #define CONFIG_RBTREE 206b29ca4a1SStefan Roese #define CONFIG_CMD_MTDPARTS 207b29ca4a1SStefan Roese #define CONFIG_CMD_UBI 208b29ca4a1SStefan Roese #define CONFIG_CMD_UBIFS 209b29ca4a1SStefan Roese 210b29ca4a1SStefan Roese #endif /* __CONFIG_H */ 211