13d657a05SEnric Balletbò i Serra /* 23d657a05SEnric Balletbò i Serra * (C) Copyright 2013 33d657a05SEnric Balletbò i Serra * Texas Instruments Incorporated. 43d657a05SEnric Balletbò i Serra * Sricharan R <r.sricharan@ti.com> 53d657a05SEnric Balletbò i Serra * 63d657a05SEnric Balletbò i Serra * Derived from OMAP4 done by: 73d657a05SEnric Balletbò i Serra * Aneesh V <aneesh@ti.com> 83d657a05SEnric Balletbò i Serra * 93d657a05SEnric Balletbò i Serra * TI OMAP5 AND DRA7XX common configuration settings 103d657a05SEnric Balletbò i Serra * 113d657a05SEnric Balletbò i Serra * SPDX-License-Identifier: GPL-2.0+ 123d657a05SEnric Balletbò i Serra * 133d657a05SEnric Balletbò i Serra * For more details, please see the technical documents listed at 143d657a05SEnric Balletbò i Serra * http://www.ti.com/product/omap5432 153d657a05SEnric Balletbò i Serra */ 163d657a05SEnric Balletbò i Serra 173d657a05SEnric Balletbò i Serra #ifndef __CONFIG_TI_OMAP5_COMMON_H 183d657a05SEnric Balletbò i Serra #define __CONFIG_TI_OMAP5_COMMON_H 193d657a05SEnric Balletbò i Serra 203d657a05SEnric Balletbò i Serra #define CONFIG_OMAP54XX 213d657a05SEnric Balletbò i Serra #define CONFIG_DISPLAY_CPUINFO 223d657a05SEnric Balletbò i Serra #define CONFIG_DISPLAY_BOARDINFO 233d657a05SEnric Balletbò i Serra #define CONFIG_MISC_INIT_R 243d657a05SEnric Balletbò i Serra #define CONFIG_ARCH_CPU_INIT 253d657a05SEnric Balletbò i Serra 263d657a05SEnric Balletbò i Serra #define CONFIG_SYS_CACHELINE_SIZE 64 273d657a05SEnric Balletbò i Serra 283d657a05SEnric Balletbò i Serra /* Use General purpose timer 1 */ 293d657a05SEnric Balletbò i Serra #define CONFIG_SYS_TIMERBASE GPT2_BASE 303d657a05SEnric Balletbò i Serra 313d657a05SEnric Balletbò i Serra /* 323d657a05SEnric Balletbò i Serra * For the DDR timing information we can either dynamically determine 333d657a05SEnric Balletbò i Serra * the timings to use or use pre-determined timings (based on using the 343d657a05SEnric Balletbò i Serra * dynamic method. Default to the static timing infomation. 353d657a05SEnric Balletbò i Serra */ 363d657a05SEnric Balletbò i Serra #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 373d657a05SEnric Balletbò i Serra #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS 383d657a05SEnric Balletbò i Serra #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION 393d657a05SEnric Balletbò i Serra #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS 403d657a05SEnric Balletbò i Serra #endif 413d657a05SEnric Balletbò i Serra 423d657a05SEnric Balletbò i Serra #ifndef CONFIG_SPL_BUILD 433d657a05SEnric Balletbò i Serra #define CONFIG_PALMAS_POWER 443d657a05SEnric Balletbò i Serra #endif 453d657a05SEnric Balletbò i Serra 463d657a05SEnric Balletbò i Serra #include <asm/arch/cpu.h> 473d657a05SEnric Balletbò i Serra #include <asm/arch/omap.h> 483d657a05SEnric Balletbò i Serra 493d657a05SEnric Balletbò i Serra #define CONFIG_ENV_SIZE (128 << 10) 503d657a05SEnric Balletbò i Serra 513d657a05SEnric Balletbò i Serra #include <configs/ti_armv7_common.h> 523d657a05SEnric Balletbò i Serra 533d657a05SEnric Balletbò i Serra /* 543d657a05SEnric Balletbò i Serra * Hardware drivers 553d657a05SEnric Balletbò i Serra */ 563d657a05SEnric Balletbò i Serra #define CONFIG_SYS_NS16550 573d657a05SEnric Balletbò i Serra #define CONFIG_SYS_NS16550_SERIAL 583d657a05SEnric Balletbò i Serra #define CONFIG_SYS_NS16550_REG_SIZE (-4) 593d657a05SEnric Balletbò i Serra #define CONFIG_SYS_NS16550_CLK 48000000 603d657a05SEnric Balletbò i Serra 613d657a05SEnric Balletbò i Serra /* Per-SoC commands */ 623d657a05SEnric Balletbò i Serra #undef CONFIG_CMD_NET 633d657a05SEnric Balletbò i Serra #undef CONFIG_CMD_NFS 643d657a05SEnric Balletbò i Serra 653d657a05SEnric Balletbò i Serra /* 663d657a05SEnric Balletbò i Serra * Environment setup 673d657a05SEnric Balletbò i Serra */ 683d657a05SEnric Balletbò i Serra #ifndef PARTS_DEFAULT 693d657a05SEnric Balletbò i Serra #define PARTS_DEFAULT 703d657a05SEnric Balletbò i Serra #endif 713d657a05SEnric Balletbò i Serra 723d657a05SEnric Balletbò i Serra #define CONFIG_EXTRA_ENV_SETTINGS \ 73*fb3ad9bdSTom Rini DEFAULT_LINUX_BOOT_ENV \ 743d657a05SEnric Balletbò i Serra "console=" CONSOLEDEV ",115200n8\0" \ 753d657a05SEnric Balletbò i Serra "fdtfile=undefined\0" \ 763d657a05SEnric Balletbò i Serra "bootpart=0:2\0" \ 773d657a05SEnric Balletbò i Serra "bootdir=/boot\0" \ 783d657a05SEnric Balletbò i Serra "bootfile=zImage\0" \ 793d657a05SEnric Balletbò i Serra "usbtty=cdc_acm\0" \ 803d657a05SEnric Balletbò i Serra "vram=16M\0" \ 813d657a05SEnric Balletbò i Serra "partitions=" PARTS_DEFAULT "\0" \ 823d657a05SEnric Balletbò i Serra "optargs=\0" \ 833d657a05SEnric Balletbò i Serra "mmcdev=0\0" \ 843d657a05SEnric Balletbò i Serra "mmcroot=/dev/mmcblk1p2 rw\0" \ 853d657a05SEnric Balletbò i Serra "mmcrootfstype=ext4 rootwait\0" \ 863d657a05SEnric Balletbò i Serra "mmcargs=setenv bootargs console=${console} " \ 873d657a05SEnric Balletbò i Serra "${optargs} " \ 883d657a05SEnric Balletbò i Serra "vram=${vram} " \ 893d657a05SEnric Balletbò i Serra "root=${mmcroot} " \ 903d657a05SEnric Balletbò i Serra "rootfstype=${mmcrootfstype}\0" \ 913d657a05SEnric Balletbò i Serra "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 923d657a05SEnric Balletbò i Serra "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 933d657a05SEnric Balletbò i Serra "source ${loadaddr}\0" \ 943d657a05SEnric Balletbò i Serra "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ 953d657a05SEnric Balletbò i Serra "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ 963d657a05SEnric Balletbò i Serra "env import -t ${loadaddr} ${filesize}\0" \ 973d657a05SEnric Balletbò i Serra "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 983d657a05SEnric Balletbò i Serra "mmcboot=mmc dev ${mmcdev}; " \ 993d657a05SEnric Balletbò i Serra "if mmc rescan; then " \ 1003d657a05SEnric Balletbò i Serra "echo SD/MMC found on device ${mmcdev};" \ 1013d657a05SEnric Balletbò i Serra "if run loadbootenv; then " \ 1023d657a05SEnric Balletbò i Serra "echo Loaded environment from ${bootenv};" \ 1033d657a05SEnric Balletbò i Serra "run importbootenv;" \ 1043d657a05SEnric Balletbò i Serra "fi;" \ 1053d657a05SEnric Balletbò i Serra "if test -n $uenvcmd; then " \ 1063d657a05SEnric Balletbò i Serra "echo Running uenvcmd ...;" \ 1073d657a05SEnric Balletbò i Serra "run uenvcmd;" \ 1083d657a05SEnric Balletbò i Serra "fi;" \ 1093d657a05SEnric Balletbò i Serra "if run loadimage; then " \ 1103d657a05SEnric Balletbò i Serra "run loadfdt; " \ 1113d657a05SEnric Balletbò i Serra "echo Booting from mmc${mmcdev} ...; " \ 1123d657a05SEnric Balletbò i Serra "run mmcargs; " \ 1133d657a05SEnric Balletbò i Serra "bootz ${loadaddr} - ${fdtaddr}; " \ 1143d657a05SEnric Balletbò i Serra "fi;" \ 1153d657a05SEnric Balletbò i Serra "fi;\0" \ 1163d657a05SEnric Balletbò i Serra "findfdt="\ 1173d657a05SEnric Balletbò i Serra "if test $board_name = omap5_uevm; then " \ 1183d657a05SEnric Balletbò i Serra "setenv fdtfile omap5-uevm.dtb; fi; " \ 1193d657a05SEnric Balletbò i Serra "if test $board_name = dra7xx; then " \ 1203d657a05SEnric Balletbò i Serra "setenv fdtfile dra7-evm.dtb; fi;" \ 1213d657a05SEnric Balletbò i Serra "if test $fdtfile = undefined; then " \ 1223d657a05SEnric Balletbò i Serra "echo WARNING: Could not determine device tree to use; fi; \0" \ 1233d657a05SEnric Balletbò i Serra "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ 1243d657a05SEnric Balletbò i Serra 1253d657a05SEnric Balletbò i Serra #define CONFIG_BOOTCOMMAND \ 1263d657a05SEnric Balletbò i Serra "run findfdt; " \ 1273d657a05SEnric Balletbò i Serra "run mmcboot;" \ 1283d657a05SEnric Balletbò i Serra "setenv mmcdev 1; " \ 1293d657a05SEnric Balletbò i Serra "setenv bootpart 1:2; " \ 1303d657a05SEnric Balletbò i Serra "setenv mmcroot /dev/mmcblk0p2 rw; " \ 1313d657a05SEnric Balletbò i Serra "run mmcboot;" \ 1323d657a05SEnric Balletbò i Serra 1333d657a05SEnric Balletbò i Serra 1343d657a05SEnric Balletbò i Serra /* 1353d657a05SEnric Balletbò i Serra * SPL related defines. The Public RAM memory map the ROM defines the 1363d657a05SEnric Balletbò i Serra * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 1373d657a05SEnric Balletbò i Serra * (dra7xx is larger, but we do not need to be larger at this time). We 1383d657a05SEnric Balletbò i Serra * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and 1393d657a05SEnric Balletbò i Serra * print some information. 1403d657a05SEnric Balletbò i Serra */ 1413d657a05SEnric Balletbò i Serra #define CONFIG_SPL_TEXT_BASE 0x40300000 1423d657a05SEnric Balletbò i Serra #define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) 1433d657a05SEnric Balletbò i Serra #define CONFIG_SPL_DISPLAY_PRINT 1443d657a05SEnric Balletbò i Serra #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 1453d657a05SEnric Balletbò i Serra 14670e71b61SEnric Balletbò i Serra #ifdef CONFIG_NAND 14770e71b61SEnric Balletbò i Serra #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ 14870e71b61SEnric Balletbò i Serra #endif 14970e71b61SEnric Balletbò i Serra 1503d657a05SEnric Balletbò i Serra #endif /* __CONFIG_TI_OMAP5_COMMON_H */ 151