1 /* 2 * Common configuration header file for all Keystone II EVM platforms 3 * 4 * (C) Copyright 2012-2014 5 * Texas Instruments Incorporated, <www.ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_KS2_EVM_H 11 #define __CONFIG_KS2_EVM_H 12 13 #define CONFIG_SOC_KEYSTONE 14 15 /* U-Boot Build Configuration */ 16 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ 17 #define CONFIG_BOARD_EARLY_INIT_F 18 #define CONFIG_DISPLAY_CPUINFO 19 20 /* SoC Configuration */ 21 #define CONFIG_ARCH_CPU_INIT 22 #define CONFIG_SYS_ARCH_TIMER 23 #define CONFIG_SYS_TEXT_BASE 0x0c000000 24 #define CONFIG_SPL_TARGET "u-boot-spi.gph" 25 #define CONFIG_SYS_DCACHE_OFF 26 27 /* Memory Configuration */ 28 #define CONFIG_NR_DRAM_BANKS 2 29 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 30 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ 31 #define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */ 32 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \ 33 GENERATED_GBL_DATA_SIZE) 34 35 #ifdef CONFIG_SYS_MALLOC_F_LEN 36 #define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN 37 #else 38 #define SPL_MALLOC_F_SIZE 0 39 #endif 40 41 /* SPL SPI Loader Configuration */ 42 #define CONFIG_SPL_PAD_TO 65536 43 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8) 44 #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \ 45 CONFIG_SPL_MAX_SIZE) 46 #define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024) 47 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 48 CONFIG_SPL_BSS_MAX_SIZE) 49 #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024) 50 #define CONFIG_SPL_STACK_SIZE (8 * 1024) 51 #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ 52 CONFIG_SYS_SPL_MALLOC_SIZE + \ 53 SPL_MALLOC_F_SIZE + \ 54 CONFIG_SPL_STACK_SIZE - 4) 55 #define CONFIG_SPL_SPI_FLASH_SUPPORT 56 #define CONFIG_SPL_SPI_SUPPORT 57 #define CONFIG_SPL_SPI_LOAD 58 #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO 59 60 /* UART Configuration */ 61 #define CONFIG_SYS_NS16550 62 #define CONFIG_SYS_NS16550_SERIAL 63 #define CONFIG_SYS_NS16550_MEM32 64 #define CONFIG_SYS_NS16550_REG_SIZE -4 65 #define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE 66 #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE 67 #define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6) 68 #define CONFIG_CONS_INDEX 1 69 70 /* SPI Configuration */ 71 #define CONFIG_SPI_FLASH_STMICRO 72 #define CONFIG_DAVINCI_SPI 73 #define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6) 74 #define CONFIG_SF_DEFAULT_SPEED 30000000 75 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 76 #define CONFIG_SYS_SPI0 77 #define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE 78 #define CONFIG_SYS_SPI0_NUM_CS 4 79 #define CONFIG_SYS_SPI1 80 #define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE 81 #define CONFIG_SYS_SPI1_NUM_CS 4 82 #define CONFIG_SYS_SPI2 83 #define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE 84 #define CONFIG_SYS_SPI2_NUM_CS 4 85 86 /* Network Configuration */ 87 #define CONFIG_PHYLIB 88 #define CONFIG_PHY_MARVELL 89 #define CONFIG_MII 90 #define CONFIG_BOOTP_DEFAULT 91 #define CONFIG_BOOTP_DNS 92 #define CONFIG_BOOTP_DNS2 93 #define CONFIG_BOOTP_SEND_HOSTNAME 94 #define CONFIG_NET_RETRY_COUNT 32 95 #define CONFIG_SYS_SGMII_REFCLK_MHZ 312 96 #define CONFIG_SYS_SGMII_LINERATE_MHZ 1250 97 #define CONFIG_SYS_SGMII_RATESCALE 2 98 99 /* Keyston Navigator Configuration */ 100 #define CONFIG_TI_KSNAV 101 #define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS 102 #define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE 103 #define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE 104 #define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE 105 #define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE 106 #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE 107 #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE 108 #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE 109 #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE 110 #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE 111 #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE 112 #define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE 113 #define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM 114 #define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM 115 116 /* NETCP pktdma */ 117 #define CONFIG_KSNAV_PKTDMA_NETCP 118 #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE 119 #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE 120 #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM 121 #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE 122 #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM 123 #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE 124 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE 125 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM 126 #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE 127 #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE 128 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE 129 130 /* Keystone net */ 131 #define CONFIG_DRIVER_TI_KEYSTONE_NET 132 #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR 133 #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE 134 #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE 135 #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE 136 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES 137 138 /* SerDes */ 139 #define CONFIG_TI_KEYSTONE_SERDES 140 141 /* AEMIF */ 142 #define CONFIG_TI_AEMIF 143 #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE 144 145 /* I2C Configuration */ 146 #define CONFIG_SYS_I2C_DAVINCI 147 #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 148 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ 149 #define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000 150 #define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */ 151 #define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000 152 #define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */ 153 #define I2C_BUS_MAX 3 154 155 /* EEPROM definitions */ 156 #define CONFIG_SYS_I2C_MULTI_EEPROMS 157 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 158 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 159 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 160 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 161 #define CONFIG_ENV_EEPROM_IS_ON_I2C 162 163 /* NAND Configuration */ 164 #define CONFIG_NAND_DAVINCI 165 #define CONFIG_KEYSTONE_RBL_NAND 166 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET 167 #define CONFIG_SYS_NAND_MASK_CLE 0x4000 168 #define CONFIG_SYS_NAND_MASK_ALE 0x2000 169 #define CONFIG_SYS_NAND_CS 2 170 #define CONFIG_SYS_NAND_USE_FLASH_BBT 171 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST 172 173 #define CONFIG_SYS_NAND_LARGEPAGE 174 #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } 175 #define CONFIG_SYS_MAX_NAND_DEVICE 1 176 #define CONFIG_SYS_NAND_MAX_CHIPS 1 177 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE 178 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ 179 #define CONFIG_ENV_IS_IN_NAND 180 #define CONFIG_ENV_OFFSET 0x100000 181 #define CONFIG_MTD_PARTITIONS 182 #define CONFIG_RBTREE 183 #define CONFIG_LZO 184 #define MTDIDS_DEFAULT "nand0=davinci_nand.0" 185 #define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \ 186 "1024k(bootloader)ro,512k(params)ro," \ 187 "-(ubifs)" 188 189 /* USB Configuration */ 190 #define CONFIG_USB_XHCI 191 #define CONFIG_USB_XHCI_DWC3 192 #define CONFIG_USB_XHCI_KEYSTONE 193 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 194 #define CONFIG_EFI_PARTITION 195 #define CONFIG_FS_FAT 196 #define CONFIG_SYS_CACHELINE_SIZE 64 197 #define CONFIG_USB_SS_BASE KS2_USB_SS_BASE 198 #define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE 199 #define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE 200 #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE 201 202 /* U-Boot command configuration */ 203 #define CONFIG_CMD_DHCP 204 #define CONFIG_CMD_PING 205 #define CONFIG_CMD_SAVES 206 #define CONFIG_CMD_NAND 207 #define CONFIG_CMD_UBI 208 #define CONFIG_CMD_UBIFS 209 #define CONFIG_CMD_SF 210 #define CONFIG_CMD_EEPROM 211 #define CONFIG_CMD_USB 212 213 /* U-Boot general configuration */ 214 #define CONFIG_MISC_INIT_R 215 #define CONFIG_CRC32_VERIFY 216 #define CONFIG_MX_CYCLIC 217 #define CONFIG_TIMESTAMP 218 219 /* EDMA3 */ 220 #define CONFIG_TI_EDMA3 221 222 #define CONFIG_EXTRA_ENV_SETTINGS \ 223 DEFAULT_LINUX_BOOT_ENV \ 224 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ 225 "boot=ubi\0" \ 226 "tftp_root=/\0" \ 227 "nfs_root=/export\0" \ 228 "mem_lpae=1\0" \ 229 "mem_reserve=512M\0" \ 230 "addr_ubi=0x82000000\0" \ 231 "addr_secdb_key=0xc000000\0" \ 232 "name_kern=zImage\0" \ 233 "run_mon=mon_install ${addr_mon}\0" \ 234 "run_kern=bootz ${loadaddr} - ${fdtaddr}\0" \ 235 "init_net=run args_all args_net\0" \ 236 "init_ubi=run args_all args_ubi; " \ 237 "ubi part ubifs; ubifsmount ubi:boot;" \ 238 "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \ 239 "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ 240 "get_fdt_ubi=ubifsload ${fdtaddr} ${name_fdt}\0" \ 241 "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ 242 "get_kern_ubi=ubifsload ${loadaddr} ${name_kern}\0" \ 243 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ 244 "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \ 245 "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \ 246 "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \ 247 "sf write ${loadaddr} 0 ${filesize}\0" \ 248 "burn_uboot_nand=nand erase 0 0x100000; " \ 249 "nand write ${loadaddr} 0 ${filesize}\0" \ 250 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \ 251 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \ 252 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \ 253 "${nfs_options} ip=dhcp\0" \ 254 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \ 255 "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \ 256 "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \ 257 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \ 258 "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \ 259 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \ 260 "burn_ubi=nand erase.part ubifs; " \ 261 "nand write ${addr_ubi} ubifs ${filesize}\0" \ 262 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \ 263 "args_ramfs=setenv bootargs ${bootargs} " \ 264 "rdinit=/sbin/init rw root=/dev/ram0 " \ 265 "initrd=0x808080000,80M\0" \ 266 "no_post=1\0" \ 267 "mtdparts=mtdparts=davinci_nand.0:" \ 268 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0" 269 270 #define CONFIG_BOOTCOMMAND \ 271 "run init_${boot} get_fdt_${boot} get_mon_${boot} " \ 272 "get_kern_${boot} run_mon run_kern" 273 274 #define CONFIG_BOOTARGS \ 275 276 /* Linux interfacing */ 277 #define CONFIG_OF_BOARD_SETUP 278 279 /* Now for the remaining common defines */ 280 #include <configs/ti_armv7_common.h> 281 282 /* We wont be loading up OS from SPL for now.. */ 283 #undef CONFIG_SPL_OS_BOOT 284 285 /* We do not have MMC support.. yet.. */ 286 #undef CONFIG_SPL_LIBDISK_SUPPORT 287 #undef CONFIG_SPL_MMC_SUPPORT 288 #undef CONFIG_SPL_FAT_SUPPORT 289 #undef CONFIG_SPL_EXT_SUPPORT 290 #undef CONFIG_MMC 291 #undef CONFIG_GENERIC_MMC 292 #undef CONFIG_CMD_MMC 293 294 /* And no support for GPIO, yet.. */ 295 #undef CONFIG_SPL_GPIO_SUPPORT 296 #undef CONFIG_CMD_GPIO 297 298 /* we may include files below only after all above definitions */ 299 #include <asm/arch/hardware.h> 300 #include <asm/arch/clock.h> 301 #define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6) 302 303 #endif /* __CONFIG_KS2_EVM_H */ 304