187694558STom Rini /* 287694558STom Rini * ti_armv7_common.h 387694558STom Rini * 487694558STom Rini * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 587694558STom Rini * 687694558STom Rini * SPDX-License-Identifier: GPL-2.0+ 787694558STom Rini * 887694558STom Rini * The various ARMv7 SoCs from TI all share a number of IP blocks when 987694558STom Rini * implementing a given feature. Rather than define these in every 1087694558STom Rini * board or even SoC common file, we define a common file to be re-used 1187694558STom Rini * in all cases. While technically true that some of these details are 1287694558STom Rini * configurable at the board design, they are common throughout SoC 1387694558STom Rini * reference platforms as well as custom designs and become de facto 1487694558STom Rini * standards. 1587694558STom Rini */ 1687694558STom Rini 1787694558STom Rini #ifndef __CONFIG_TI_ARMV7_COMMON_H__ 1887694558STom Rini #define __CONFIG_TI_ARMV7_COMMON_H__ 1987694558STom Rini 2087694558STom Rini /* Common define for many platforms. */ 2187694558STom Rini #define CONFIG_OMAP 2287694558STom Rini #define CONFIG_OMAP_COMMON 2387694558STom Rini 2487694558STom Rini /* 2587694558STom Rini * We typically do not contain NOR flash. In the cases where we do, we 2687694558STom Rini * undefine this later. 2787694558STom Rini */ 2887694558STom Rini #define CONFIG_SYS_NO_FLASH 2987694558STom Rini 3087694558STom Rini /* Support both device trees and ATAGs. */ 3187694558STom Rini #define CONFIG_OF_LIBFDT 3287694558STom Rini #define CONFIG_CMDLINE_TAG 3387694558STom Rini #define CONFIG_SETUP_MEMORY_TAGS 3487694558STom Rini #define CONFIG_INITRD_TAG 3587694558STom Rini 3687694558STom Rini /* 3787694558STom Rini * Our DDR memory always starts at 0x80000000 and U-Boot shall have 3887694558STom Rini * relocated itself to higher in memory by the time this value is used. 39*fb3ad9bdSTom Rini * However, set this to a 32MB offset to allow for easier Linux kernel 40*fb3ad9bdSTom Rini * booting as the default is often used as the kernel load address. 4187694558STom Rini */ 42*fb3ad9bdSTom Rini #define CONFIG_SYS_LOAD_ADDR 0x82000000 43*fb3ad9bdSTom Rini 44*fb3ad9bdSTom Rini /* 45*fb3ad9bdSTom Rini * We setup defaults based on constraints from the Linux kernel, which should 46*fb3ad9bdSTom Rini * also be safe elsewhere. We have the default load at 32MB into DDR (for 47*fb3ad9bdSTom Rini * the kernel), FDT above 128MB (the maximum location for the end of the 48*fb3ad9bdSTom Rini * kernel), and the ramdisk 512KB above that (allowing for hopefully never 49*fb3ad9bdSTom Rini * seen large trees). We say all of this must be within the first 256MB 50*fb3ad9bdSTom Rini * as that will normally be within the kernel lowmem and thus visible via 51*fb3ad9bdSTom Rini * bootm_size and we only run on platforms with 256MB or more of memory. 52*fb3ad9bdSTom Rini */ 53*fb3ad9bdSTom Rini #define DEFAULT_LINUX_BOOT_ENV \ 54*fb3ad9bdSTom Rini "loadaddr=0x82000000\0" \ 55*fb3ad9bdSTom Rini "kernel_addr_r=0x82000000\0" \ 56*fb3ad9bdSTom Rini "fdtaddr=0x88000000\0" \ 57*fb3ad9bdSTom Rini "fdt_addr_r=0x88000000\0" \ 58*fb3ad9bdSTom Rini "rdaddr=0x88080000\0" \ 59*fb3ad9bdSTom Rini "ramdisk_addr_r=0x88080000\0" \ 60*fb3ad9bdSTom Rini "bootm_size=0x10000000\0" 6187694558STom Rini 6287694558STom Rini /* 6387694558STom Rini * Default to a quick boot delay. 6487694558STom Rini */ 6587694558STom Rini #define CONFIG_BOOTDELAY 1 6687694558STom Rini 6787694558STom Rini /* 68c6a7fce1SEnric Balletbò i Serra * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined, 69c6a7fce1SEnric Balletbò i Serra * we say (for simplicity) that we have 1 bank, always, even when 70c6a7fce1SEnric Balletbò i Serra * we have more. We always start at 0x80000000, and we place the 71c6a7fce1SEnric Balletbò i Serra * initial stack pointer in our SRAM. Otherwise, we can define 72c6a7fce1SEnric Balletbò i Serra * CONFIG_NR_DRAM_BANKS before including this file. 7387694558STom Rini */ 74c6a7fce1SEnric Balletbò i Serra #ifndef CONFIG_NR_DRAM_BANKS 7587694558STom Rini #define CONFIG_NR_DRAM_BANKS 1 76c6a7fce1SEnric Balletbò i Serra #endif 7787694558STom Rini #define CONFIG_SYS_SDRAM_BASE 0x80000000 7887694558STom Rini #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 7987694558STom Rini GENERATED_GBL_DATA_SIZE) 8087694558STom Rini 8187694558STom Rini /* Timer information. */ 8287694558STom Rini #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 8387694558STom Rini 8487694558STom Rini /* I2C IP block */ 8587694558STom Rini #define CONFIG_I2C 861dd44e5aSTom Rini #define CONFIG_CMD_I2C 876789e84eSHeiko Schocher #define CONFIG_SYS_I2C 886789e84eSHeiko Schocher #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 896789e84eSHeiko Schocher #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 906789e84eSHeiko Schocher #define CONFIG_SYS_I2C_OMAP24XX 9187694558STom Rini 9287694558STom Rini /* MMC/SD IP block */ 9387694558STom Rini #define CONFIG_MMC 9487694558STom Rini #define CONFIG_GENERIC_MMC 9587694558STom Rini #define CONFIG_OMAP_HSMMC 9687694558STom Rini #define CONFIG_CMD_MMC 9787694558STom Rini 9887694558STom Rini /* McSPI IP block */ 9987694558STom Rini #define CONFIG_SPI 10087694558STom Rini #define CONFIG_OMAP3_SPI 1010fedc4a5STom Rini #define CONFIG_CMD_SPI 10287694558STom Rini 10387694558STom Rini /* GPIO block */ 10487694558STom Rini #define CONFIG_OMAP_GPIO 105a1665ed1STom Rini #define CONFIG_CMD_GPIO 10687694558STom Rini 10787694558STom Rini /* 10887694558STom Rini * GPMC NAND block. We support 1 device and the physical address to 10987694558STom Rini * access CS0 at is 0x8000000. 11087694558STom Rini */ 11187694558STom Rini #ifdef CONFIG_NAND 11287694558STom Rini #define CONFIG_NAND_OMAP_GPMC 11387694558STom Rini #define CONFIG_SYS_NAND_BASE 0x8000000 11487694558STom Rini #define CONFIG_SYS_MAX_NAND_DEVICE 1 1151dd44e5aSTom Rini #define CONFIG_CMD_NAND 11687694558STom Rini #endif 11787694558STom Rini 11887694558STom Rini /* 11987694558STom Rini * The following are general good-enough settings for U-Boot. We set a 12087694558STom Rini * large malloc pool as we generally have a lot of DDR, and we opt for 12187694558STom Rini * function over binary size in the main portion of U-Boot as this is 12287694558STom Rini * generally easily constrained later if needed. We enable the config 12387694558STom Rini * options that give us information in the environment about what board 12487694558STom Rini * we are on so we do not need to rely on the command prompt. We set a 12587694558STom Rini * console baudrate of 115200 and use the default baud rate table. 12687694558STom Rini */ 12787694558STom Rini #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 12887694558STom Rini #define CONFIG_SYS_HUSH_PARSER 1291dd44e5aSTom Rini #define CONFIG_SYS_PROMPT "U-Boot# " 1301dd44e5aSTom Rini #define CONFIG_SYS_CONSOLE_INFO_QUIET 1311dd44e5aSTom Rini #define CONFIG_BAUDRATE 115200 1321dd44e5aSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG /* Strongly encouraged */ 1331dd44e5aSTom Rini #define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ 1341dd44e5aSTom Rini 1351dd44e5aSTom Rini /* As stated above, the following choices are optional. */ 1361dd44e5aSTom Rini #define CONFIG_SYS_LONGHELP 13787694558STom Rini #define CONFIG_AUTO_COMPLETE 13887694558STom Rini #define CONFIG_CMDLINE_EDITING 13987694558STom Rini #define CONFIG_VERSION_VARIABLE 14087694558STom Rini 14187694558STom Rini /* We set the max number of command args high to avoid HUSH bugs. */ 14287694558STom Rini #define CONFIG_SYS_MAXARGS 64 14387694558STom Rini 14487694558STom Rini /* Console I/O Buffer Size */ 14587694558STom Rini #define CONFIG_SYS_CBSIZE 512 14687694558STom Rini /* Print Buffer Size */ 14787694558STom Rini #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 14887694558STom Rini + sizeof(CONFIG_SYS_PROMPT) + 16) 14987694558STom Rini /* Boot Argument Buffer Size */ 15087694558STom Rini #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 15187694558STom Rini 15287694558STom Rini /* 15387694558STom Rini * When we have SPI, NOR or NAND flash we expect to be making use of 15487694558STom Rini * mtdparts, both for ease of use in U-Boot and for passing information 15587694558STom Rini * on to the Linux kernel. 15687694558STom Rini */ 15787694558STom Rini #if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND) 15887694558STom Rini #define CONFIG_MTD_DEVICE /* Required for mtdparts */ 15987694558STom Rini #define CONFIG_CMD_MTDPARTS 16087694558STom Rini #endif 16187694558STom Rini 16287694558STom Rini /* 16387694558STom Rini * For commands to use, we take the default list and add a few other 16487694558STom Rini * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH 16587694558STom Rini * prior to this include, in order to skip a few commands. When we do 16687694558STom Rini * have flash, if we expect these commands they must be enabled in that 1671dd44e5aSTom Rini * config. If desired, a specific list of desired commands can be used 1681dd44e5aSTom Rini * instead. 16987694558STom Rini */ 17087694558STom Rini #include <config_cmd_default.h> 17187694558STom Rini #define CONFIG_CMD_ASKENV 17287694558STom Rini #define CONFIG_CMD_ECHO 17387694558STom Rini #define CONFIG_CMD_BOOTZ 17487694558STom Rini 17587694558STom Rini /* 17687694558STom Rini * Common filesystems support. When we have removable storage we 17787694558STom Rini * enabled a number of useful commands and support. 17887694558STom Rini */ 17987694558STom Rini #if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE) 18087694558STom Rini #define CONFIG_DOS_PARTITION 18187694558STom Rini #define CONFIG_CMD_FAT 18287694558STom Rini #define CONFIG_FAT_WRITE 18387694558STom Rini #define CONFIG_CMD_EXT2 18487694558STom Rini #define CONFIG_CMD_EXT4 18587694558STom Rini #define CONFIG_CMD_FS_GENERIC 18687694558STom Rini #endif 18787694558STom Rini 18887694558STom Rini /* 18987694558STom Rini * Our platforms make use of SPL to initalize the hardware (primarily 19087694558STom Rini * memory) enough for full U-Boot to be loaded. We also support Falcon 19187694558STom Rini * Mode so that the Linux kernel can be booted directly from SPL 19287694558STom Rini * instead, if desired. We make use of the general SPL framework found 19387694558STom Rini * under common/spl/. Given our generally common memory map, we set a 19487694558STom Rini * number of related defaults and sizes here. 19587694558STom Rini */ 19687694558STom Rini #ifndef CONFIG_NOR_BOOT 19787694558STom Rini #define CONFIG_SPL 19887694558STom Rini #define CONFIG_SPL_FRAMEWORK 19987694558STom Rini #define CONFIG_SPL_OS_BOOT 20087694558STom Rini 20187694558STom Rini /* 20287694558STom Rini * Place the image at the start of the ROM defined image space. 20387694558STom Rini * We limit our size to the ROM-defined downloaded image area, and use the 20487694558STom Rini * rest of the space for stack. We load U-Boot itself into memory at 20587694558STom Rini * 0x80800000 for legacy reasons (to not conflict with older SPLs). We 20687694558STom Rini * have our BSS be placed 1MiB after this, to allow for the default 20787694558STom Rini * Linux kernel address of 0x80008000 to work, in the Falcon Mode case. 20887694558STom Rini * We have the SPL malloc pool at the end of the BSS area. 20987694558STom Rini */ 21087694558STom Rini #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 21187694558STom Rini #define CONFIG_SYS_TEXT_BASE 0x80800000 21287694558STom Rini #define CONFIG_SPL_BSS_START_ADDR 0x80a00000 21387694558STom Rini #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 21487694558STom Rini #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ 21587694558STom Rini CONFIG_SPL_BSS_MAX_SIZE) 21687694558STom Rini #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 21787694558STom Rini 21887694558STom Rini /* RAW SD card / eMMC locations. */ 21987694558STom Rini #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 22087694558STom Rini #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 22187694558STom Rini 22287694558STom Rini /* FAT sd card locations. */ 22387694558STom Rini #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 22487694558STom Rini #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 22587694558STom Rini 22687694558STom Rini #ifdef CONFIG_SPL_OS_BOOT 227552998e5STom Rini #define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000 22887694558STom Rini 22987694558STom Rini /* FAT */ 23087694558STom Rini #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" 23187694558STom Rini #define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args" 23287694558STom Rini 23387694558STom Rini /* RAW SD card / eMMC */ 23487694558STom Rini #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 23587694558STom Rini #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 23687694558STom Rini #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 23787694558STom Rini 23887694558STom Rini /* NAND */ 23987694558STom Rini #ifdef CONFIG_NAND 24087694558STom Rini #define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */ 24187694558STom Rini #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 24287694558STom Rini #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 24387694558STom Rini #endif 24487694558STom Rini 24587694558STom Rini /* spl export command */ 24687694558STom Rini #define CONFIG_CMD_SPL 24787694558STom Rini #endif 24887694558STom Rini 24987694558STom Rini #ifdef CONFIG_MMC 250a7142dd0STom Rini #define CONFIG_SPL_LIBDISK_SUPPORT 25187694558STom Rini #define CONFIG_SPL_MMC_SUPPORT 25287694558STom Rini #define CONFIG_SPL_FAT_SUPPORT 25387694558STom Rini #endif 25487694558STom Rini 255a7142dd0STom Rini /* General parts of the framework, required. */ 25687694558STom Rini #define CONFIG_SPL_I2C_SUPPORT 25787694558STom Rini #define CONFIG_SPL_LIBCOMMON_SUPPORT 25887694558STom Rini #define CONFIG_SPL_LIBGENERIC_SUPPORT 25987694558STom Rini #define CONFIG_SPL_SERIAL_SUPPORT 26087694558STom Rini #define CONFIG_SPL_GPIO_SUPPORT 26187694558STom Rini #define CONFIG_SPL_BOARD_INIT 26287694558STom Rini 26387694558STom Rini #ifdef CONFIG_NAND 26487694558STom Rini #define CONFIG_SPL_NAND_SUPPORT 26587694558STom Rini #define CONFIG_SPL_NAND_BASE 26687694558STom Rini #define CONFIG_SPL_NAND_DRIVERS 26787694558STom Rini #define CONFIG_SPL_NAND_ECC 2686dd3b566STom Rini #define CONFIG_SPL_MTD_SUPPORT 26987694558STom Rini #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 27087694558STom Rini #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 27187694558STom Rini #endif 27287694558STom Rini #endif /* !CONFIG_NOR_BOOT */ 27387694558STom Rini 27487694558STom Rini #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ 275