xref: /rk3399_rockchip-uboot/include/configs/ti_armv7_common.h (revision 1490eb89f4697b02cfb8f826d2f5eaf37edcbd47)
187694558STom Rini /*
287694558STom Rini  * ti_armv7_common.h
387694558STom Rini  *
487694558STom Rini  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
587694558STom Rini  *
687694558STom Rini  * SPDX-License-Identifier:	GPL-2.0+
787694558STom Rini  *
887694558STom Rini  * The various ARMv7 SoCs from TI all share a number of IP blocks when
987694558STom Rini  * implementing a given feature.  Rather than define these in every
1087694558STom Rini  * board or even SoC common file, we define a common file to be re-used
1187694558STom Rini  * in all cases.  While technically true that some of these details are
1287694558STom Rini  * configurable at the board design, they are common throughout SoC
1387694558STom Rini  * reference platforms as well as custom designs and become de facto
1487694558STom Rini  * standards.
1587694558STom Rini  */
1687694558STom Rini 
1787694558STom Rini #ifndef __CONFIG_TI_ARMV7_COMMON_H__
1887694558STom Rini #define __CONFIG_TI_ARMV7_COMMON_H__
1987694558STom Rini 
2087694558STom Rini /* Support both device trees and ATAGs. */
2187694558STom Rini #define CONFIG_CMDLINE_TAG
2287694558STom Rini #define CONFIG_SETUP_MEMORY_TAGS
2387694558STom Rini #define CONFIG_INITRD_TAG
2487694558STom Rini 
2587694558STom Rini /*
2687694558STom Rini  * Our DDR memory always starts at 0x80000000 and U-Boot shall have
2787694558STom Rini  * relocated itself to higher in memory by the time this value is used.
28fb3ad9bdSTom Rini  * However, set this to a 32MB offset to allow for easier Linux kernel
29fb3ad9bdSTom Rini  * booting as the default is often used as the kernel load address.
3087694558STom Rini  */
31fb3ad9bdSTom Rini #define CONFIG_SYS_LOAD_ADDR		0x82000000
32fb3ad9bdSTom Rini 
33fb3ad9bdSTom Rini /*
34fb3ad9bdSTom Rini  * We setup defaults based on constraints from the Linux kernel, which should
35fb3ad9bdSTom Rini  * also be safe elsewhere.  We have the default load at 32MB into DDR (for
36fb3ad9bdSTom Rini  * the kernel), FDT above 128MB (the maximum location for the end of the
37fb3ad9bdSTom Rini  * kernel), and the ramdisk 512KB above that (allowing for hopefully never
38fb3ad9bdSTom Rini  * seen large trees).  We say all of this must be within the first 256MB
39fb3ad9bdSTom Rini  * as that will normally be within the kernel lowmem and thus visible via
40fb3ad9bdSTom Rini  * bootm_size and we only run on platforms with 256MB or more of memory.
41fb3ad9bdSTom Rini  */
42fb3ad9bdSTom Rini #define DEFAULT_LINUX_BOOT_ENV \
43fb3ad9bdSTom Rini 	"loadaddr=0x82000000\0" \
44fb3ad9bdSTom Rini 	"kernel_addr_r=0x82000000\0" \
45fb3ad9bdSTom Rini 	"fdtaddr=0x88000000\0" \
46fb3ad9bdSTom Rini 	"fdt_addr_r=0x88000000\0" \
47fb3ad9bdSTom Rini 	"rdaddr=0x88080000\0" \
48fb3ad9bdSTom Rini 	"ramdisk_addr_r=0x88080000\0" \
497749b67fSSjoerd Simons 	"scriptaddr=0x80000000\0" \
507749b67fSSjoerd Simons 	"pxefile_addr_r=0x80100000\0" \
512a777884SLokesh Vutla 	"bootm_size=0x10000000\0" \
522a777884SLokesh Vutla 	"boot_fdt=try\0"
5387694558STom Rini 
541e93cc84SLokesh Vutla #define DEFAULT_FIT_TI_ARGS \
551e93cc84SLokesh Vutla 	"boot_fit=0\0" \
56*1a7c159aSMadan Srinivas 	"fit_loadaddr=0x87000000\0" \
57f7c8f032SAndrew F. Davis 	"fit_bootfile=fitImage\0" \
581e93cc84SLokesh Vutla 	"update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile}\0" \
595bb7318fSAndrew F. Davis 	"loadfit=run args_mmc; bootm ${loadaddr}#${fdtfile};\0" \
601e93cc84SLokesh Vutla 
6187694558STom Rini /*
62c6a7fce1SEnric Balletbò i Serra  * DDR information.  If the CONFIG_NR_DRAM_BANKS is not defined,
63c6a7fce1SEnric Balletbò i Serra  * we say (for simplicity) that we have 1 bank, always, even when
64c6a7fce1SEnric Balletbò i Serra  * we have more.  We always start at 0x80000000, and we place the
65c6a7fce1SEnric Balletbò i Serra  * initial stack pointer in our SRAM. Otherwise, we can define
66c6a7fce1SEnric Balletbò i Serra  * CONFIG_NR_DRAM_BANKS before including this file.
6787694558STom Rini  */
68c6a7fce1SEnric Balletbò i Serra #ifndef CONFIG_NR_DRAM_BANKS
6987694558STom Rini #define CONFIG_NR_DRAM_BANKS		1
70c6a7fce1SEnric Balletbò i Serra #endif
7187694558STom Rini #define CONFIG_SYS_SDRAM_BASE		0x80000000
72e07cff11SNishanth Menon 
73e07cff11SNishanth Menon #ifndef CONFIG_SYS_INIT_SP_ADDR
7487694558STom Rini #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
7587694558STom Rini 						GENERATED_GBL_DATA_SIZE)
76e07cff11SNishanth Menon #endif
7787694558STom Rini 
7887694558STom Rini /* Timer information. */
7987694558STom Rini #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
8087694558STom Rini 
81eff6b773SMugunthan V N /*
82eff6b773SMugunthan V N  * Disable DM_* for SPL build and can be re-enabled after adding
83eff6b773SMugunthan V N  * DM support in SPL
84eff6b773SMugunthan V N  */
85eff6b773SMugunthan V N #ifdef CONFIG_SPL_BUILD
86eff6b773SMugunthan V N #undef CONFIG_DM_I2C
87eff6b773SMugunthan V N #endif
88eff6b773SMugunthan V N 
8987694558STom Rini /* I2C IP block */
9087694558STom Rini #define CONFIG_I2C
91c50f2610SMugunthan V N #ifndef CONFIG_DM_I2C
926789e84eSHeiko Schocher #define CONFIG_SYS_I2C
93c50f2610SMugunthan V N #else
94c50f2610SMugunthan V N /*
95c50f2610SMugunthan V N  * Enable CONFIG_DM_I2C_COMPAT temporarily until all the i2c client
96c50f2610SMugunthan V N  * devices are adopted to DM
97c50f2610SMugunthan V N  */
98c50f2610SMugunthan V N #define CONFIG_DM_I2C_COMPAT
99c50f2610SMugunthan V N #endif
10087694558STom Rini 
10187694558STom Rini /*
10287694558STom Rini  * The following are general good-enough settings for U-Boot.  We set a
10387694558STom Rini  * large malloc pool as we generally have a lot of DDR, and we opt for
10487694558STom Rini  * function over binary size in the main portion of U-Boot as this is
10587694558STom Rini  * generally easily constrained later if needed.  We enable the config
10687694558STom Rini  * options that give us information in the environment about what board
10787694558STom Rini  * we are on so we do not need to rely on the command prompt.  We set a
10887694558STom Rini  * console baudrate of 115200 and use the default baud rate table.
10987694558STom Rini  */
1105e61b0dfSTom Rini #define CONFIG_SYS_MALLOC_LEN		SZ_32M
1111dd44e5aSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG	/* Strongly encouraged */
1121dd44e5aSTom Rini #define CONFIG_ENV_OVERWRITE		/* Overwrite ethaddr / serial# */
1131dd44e5aSTom Rini 
1141dd44e5aSTom Rini /* As stated above, the following choices are optional. */
1151dd44e5aSTom Rini #define CONFIG_SYS_LONGHELP
11687694558STom Rini #define CONFIG_AUTO_COMPLETE
11787694558STom Rini #define CONFIG_CMDLINE_EDITING
11887694558STom Rini 
11987694558STom Rini /* We set the max number of command args high to avoid HUSH bugs. */
12087694558STom Rini #define CONFIG_SYS_MAXARGS		64
12187694558STom Rini 
12287694558STom Rini /* Console I/O Buffer Size */
123b9daed8aSLokesh Vutla #define CONFIG_SYS_CBSIZE		1024
12487694558STom Rini /* Boot Argument Buffer Size */
12587694558STom Rini #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
12687694558STom Rini 
12787694558STom Rini /*
12887694558STom Rini  * When we have SPI, NOR or NAND flash we expect to be making use of
12987694558STom Rini  * mtdparts, both for ease of use in U-Boot and for passing information
13087694558STom Rini  * on to the Linux kernel.
13187694558STom Rini  */
13287694558STom Rini 
1336440b807SGuillaume GARDET #define CONFIG_SUPPORT_RAW_INITRD
13487694558STom Rini 
13587694558STom Rini /*
13687694558STom Rini  * Our platforms make use of SPL to initalize the hardware (primarily
137e95b9b44SAndrew F. Davis  * memory) enough for full U-Boot to be loaded. We make use of the general
138e95b9b44SAndrew F. Davis  * SPL framework found under common/spl/.  Given our generally common memory
139e95b9b44SAndrew F. Davis  * map, we set a number of related defaults and sizes here.
14087694558STom Rini  */
1417a5f71bcSSourav Poddar #if !defined(CONFIG_NOR_BOOT) && \
1427a5f71bcSSourav Poddar 	!(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
14387694558STom Rini #define CONFIG_SPL_FRAMEWORK
144e95b9b44SAndrew F. Davis 
145e95b9b44SAndrew F. Davis /*
146e95b9b44SAndrew F. Davis  * We also support Falcon Mode so that the Linux kernel can be booted
147e95b9b44SAndrew F. Davis  * directly from SPL. This is not currently available on HS devices.
148e95b9b44SAndrew F. Davis  */
14987694558STom Rini 
15087694558STom Rini /*
151865813edSTom Rini  * Place the image at the start of the ROM defined image space (per
152865813edSTom Rini  * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
153fa2f81b0STom Rini  * downloaded image area minus 1KiB for scratch space.  We initalize DRAM as
154fa2f81b0STom Rini  * soon as we can so that we can place stack, malloc and BSS there.  We load
155fa2f81b0STom Rini  * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
156fa2f81b0STom Rini  * with older SPLs).  We have our BSS be placed 2MiB after this, to allow for
157fa2f81b0STom Rini  * the default Linux kernel address of 0x80008000 to work with most sized
158fa2f81b0STom Rini  * kernels, in the Falcon Mode case.  We have the SPL malloc pool at the end
159fa2f81b0STom Rini  * of the BSS area.  We suggest that the stack be placed at 32MiB after the
160fa2f81b0STom Rini  * start of DRAM to allow room for all of the above (handled in Kconfig).
16187694558STom Rini  */
162df4dbb5dSTom Rini #ifndef CONFIG_SYS_TEXT_BASE
16387694558STom Rini #define CONFIG_SYS_TEXT_BASE		0x80800000
164df4dbb5dSTom Rini #endif
165df4dbb5dSTom Rini #ifndef CONFIG_SPL_BSS_START_ADDR
16687694558STom Rini #define CONFIG_SPL_BSS_START_ADDR	0x80a00000
16787694558STom Rini #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
168df4dbb5dSTom Rini #endif
169df4dbb5dSTom Rini #ifndef CONFIG_SYS_SPL_MALLOC_START
17087694558STom Rini #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
17187694558STom Rini 					 CONFIG_SPL_BSS_MAX_SIZE)
1725e61b0dfSTom Rini #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_8M
173df4dbb5dSTom Rini #endif
174fa2f81b0STom Rini #ifndef CONFIG_SPL_MAX_SIZE
175fa2f81b0STom Rini #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
176fa2f81b0STom Rini 					 CONFIG_SPL_TEXT_BASE)
177fa2f81b0STom Rini #endif
178fa2f81b0STom Rini 
17987694558STom Rini 
18087694558STom Rini /* FAT sd card locations. */
181e2ccdf89SPaul Kocialkowski #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
182205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
18387694558STom Rini 
18487694558STom Rini #ifdef CONFIG_SPL_OS_BOOT
18587694558STom Rini /* FAT */
186205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
187205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"args"
18887694558STom Rini 
18987694558STom Rini /* RAW SD card / eMMC */
1907a53a1a8SJean-Jacques Hiblot #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1700  /* address 0x2E0000 */
1917a53a1a8SJean-Jacques Hiblot #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x1500  /* address 0x2A0000 */
1927a53a1a8SJean-Jacques Hiblot #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x200   /* 256KiB */
19387694558STom Rini #endif
19487694558STom Rini 
195a7142dd0STom Rini /* General parts of the framework, required. */
19687694558STom Rini 
19787694558STom Rini #ifdef CONFIG_NAND
19887694558STom Rini #define CONFIG_SPL_NAND_BASE
19987694558STom Rini #define CONFIG_SPL_NAND_DRIVERS
20087694558STom Rini #define CONFIG_SPL_NAND_ECC
20187694558STom Rini #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
20287694558STom Rini #endif
20387694558STom Rini #endif /* !CONFIG_NOR_BOOT */
20487694558STom Rini 
2052320866bSCooper Jr., Franklin /* Generic Environment Variables */
2062320866bSCooper Jr., Franklin 
2072320866bSCooper Jr., Franklin #ifdef CONFIG_CMD_NET
2082320866bSCooper Jr., Franklin #define NETARGS \
2092320866bSCooper Jr., Franklin 	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
2102320866bSCooper Jr., Franklin 		"::off\0" \
2112320866bSCooper Jr., Franklin 	"nfsopts=nolock\0" \
2122320866bSCooper Jr., Franklin 	"rootpath=/export/rootfs\0" \
2132320866bSCooper Jr., Franklin 	"netloadimage=tftp ${loadaddr} ${bootfile}\0" \
2142320866bSCooper Jr., Franklin 	"netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
2152320866bSCooper Jr., Franklin 	"netargs=setenv bootargs console=${console} " \
2162320866bSCooper Jr., Franklin 		"${optargs} " \
2172320866bSCooper Jr., Franklin 		"root=/dev/nfs " \
2182320866bSCooper Jr., Franklin 		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
2192320866bSCooper Jr., Franklin 		"ip=dhcp\0" \
2202320866bSCooper Jr., Franklin 	"netboot=echo Booting from network ...; " \
2212320866bSCooper Jr., Franklin 		"setenv autoload no; " \
2222320866bSCooper Jr., Franklin 		"dhcp; " \
2232320866bSCooper Jr., Franklin 		"run netloadimage; " \
2242320866bSCooper Jr., Franklin 		"run netloadfdt; " \
2252320866bSCooper Jr., Franklin 		"run netargs; " \
2262320866bSCooper Jr., Franklin 		"bootz ${loadaddr} - ${fdtaddr}\0"
22760480f81SCooper Jr., Franklin #else
22860480f81SCooper Jr., Franklin #define NETARGS ""
2292320866bSCooper Jr., Franklin #endif
2302320866bSCooper Jr., Franklin 
231755324c4SMatwey V. Kornilov #include <config_distro_defaults.h>
232755324c4SMatwey V. Kornilov 
23387694558STom Rini #endif	/* __CONFIG_TI_ARMV7_COMMON_H__ */
234