187694558STom Rini /* 287694558STom Rini * ti_am335x_common.h 387694558STom Rini * 487694558STom Rini * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 587694558STom Rini * 687694558STom Rini * SPDX-License-Identifier: GPL-2.0+ 787694558STom Rini * 887694558STom Rini * For more details, please see the technical documents listed at 987694558STom Rini * http://www.ti.com/product/am3359#technicaldocuments 1087694558STom Rini */ 1187694558STom Rini 1287694558STom Rini #ifndef __CONFIG_TI_AM335X_COMMON_H__ 1387694558STom Rini #define __CONFIG_TI_AM335X_COMMON_H__ 1487694558STom Rini 1587694558STom Rini #define CONFIG_AM33XX 1687694558STom Rini #define CONFIG_ARCH_CPU_INIT 1787694558STom Rini #define CONFIG_SYS_CACHELINE_SIZE 64 1887694558STom Rini #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 1987694558STom Rini #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 2016678eb4SHeiko Schocher #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 2187694558STom Rini 22*1a44cd89SSimon Glass #ifndef CONFIG_SPL_BUILD 23*1a44cd89SSimon Glass # define CONFIG_DM 24*1a44cd89SSimon Glass # define CONFIG_CMD_DM 25*1a44cd89SSimon Glass # define CONFIG_DM_GPIO 26*1a44cd89SSimon Glass # define CONFIG_DM_SERIAL 27*1a44cd89SSimon Glass # define CONFIG_OMAP_SERIAL 28*1a44cd89SSimon Glass # define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 29*1a44cd89SSimon Glass #endif 30*1a44cd89SSimon Glass 3187694558STom Rini #include <asm/arch/omap.h> 3287694558STom Rini 3387694558STom Rini /* NS16550 Configuration */ 3487694558STom Rini #define CONFIG_SYS_NS16550 35*1a44cd89SSimon Glass #ifdef CONFIG_SPL_BUILD 3687694558STom Rini #define CONFIG_SYS_NS16550_SERIAL 3787694558STom Rini #define CONFIG_SYS_NS16550_REG_SIZE (-4) 38*1a44cd89SSimon Glass #endif 3987694558STom Rini #define CONFIG_SYS_NS16550_CLK 48000000 4087694558STom Rini 4187694558STom Rini /* Network defines. */ 42a7a06400STom Rini #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ 4387694558STom Rini #define CONFIG_CMD_DHCP 44a35ad51eSMugunthan V N #define CONFIG_CMD_MII 45a7a06400STom Rini #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 4687694558STom Rini #define CONFIG_BOOTP_DNS2 4787694558STom Rini #define CONFIG_BOOTP_SEND_HOSTNAME 4887694558STom Rini #define CONFIG_BOOTP_GATEWAY 4987694558STom Rini #define CONFIG_BOOTP_SUBNETMASK 5087694558STom Rini #define CONFIG_NET_RETRY_COUNT 10 51a7a06400STom Rini #define CONFIG_CMD_PING 52a7a06400STom Rini #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 53a7a06400STom Rini #define CONFIG_MII /* Required in net/eth.c */ 5487694558STom Rini 55c27efde6STom Rini /* 56a1c143f4STom Rini * RTC related defines. To use bootcount you must set bootlimit in the 57abcaa6eeSTom Rini * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT 58abcaa6eeSTom Rini * in the board config. 59a1c143f4STom Rini */ 60a1c143f4STom Rini #define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000 61a1c143f4STom Rini 626843918eSTom Rini /* Enable the HW watchdog, since we can use this with bootcount */ 636843918eSTom Rini #define CONFIG_HW_WATCHDOG 646843918eSTom Rini #define CONFIG_OMAP_WATCHDOG 656843918eSTom Rini 66a1c143f4STom Rini /* 67c27efde6STom Rini * SPL related defines. The Public RAM memory map the ROM defines the 68c27efde6STom Rini * area between 0x402F0400 and 0x4030B800 as a download area and 69c27efde6STom Rini * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also 70c27efde6STom Rini * supports X-MODEM loading via UART, and we leverage this and then use 71c27efde6STom Rini * Y-MODEM to load u-boot.img, when booted over UART. 72c27efde6STom Rini */ 7387694558STom Rini #define CONFIG_SPL_TEXT_BASE 0x402F0400 74c27efde6STom Rini #define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) 75d3289aacSTom Rini #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ 76d3289aacSTom Rini (128 << 20)) 7787694558STom Rini 786843918eSTom Rini /* Enable the watchdog inside of SPL */ 796843918eSTom Rini #define CONFIG_SPL_WATCHDOG_SUPPORT 806843918eSTom Rini 8187694558STom Rini /* 8287694558STom Rini * Since SPL did pll and ddr initialization for us, 8387694558STom Rini * we don't need to do it twice. 8487694558STom Rini */ 8587694558STom Rini #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) 8687694558STom Rini #define CONFIG_SKIP_LOWLEVEL_INIT 8787694558STom Rini #endif 8887694558STom Rini 89196311dcSTom Rini /* 90196311dcSTom Rini * When building U-Boot such that there is no previous loader 91196311dcSTom Rini * we need to call board_early_init_f. This is taken care of in 92196311dcSTom Rini * s_init when we have SPL used. 93196311dcSTom Rini */ 94196311dcSTom Rini #if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL) 95196311dcSTom Rini #define CONFIG_BOARD_EARLY_INIT_F 96196311dcSTom Rini #endif 97196311dcSTom Rini 9870e71b61SEnric Balletbò i Serra #ifdef CONFIG_NAND 9970e71b61SEnric Balletbò i Serra #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ 10070e71b61SEnric Balletbò i Serra #endif 10170e71b61SEnric Balletbò i Serra 10287694558STom Rini /* Now bring in the rest of the common code. */ 10387694558STom Rini #include <configs/ti_armv7_common.h> 10487694558STom Rini 10587694558STom Rini #endif /* __CONFIG_TI_AM335X_COMMON_H__ */ 106