187694558STom Rini /* 287694558STom Rini * ti_am335x_common.h 387694558STom Rini * 487694558STom Rini * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 587694558STom Rini * 687694558STom Rini * SPDX-License-Identifier: GPL-2.0+ 787694558STom Rini * 887694558STom Rini * For more details, please see the technical documents listed at 987694558STom Rini * http://www.ti.com/product/am3359#technicaldocuments 1087694558STom Rini */ 1187694558STom Rini 1287694558STom Rini #ifndef __CONFIG_TI_AM335X_COMMON_H__ 1387694558STom Rini #define __CONFIG_TI_AM335X_COMMON_H__ 1487694558STom Rini 1587694558STom Rini #define CONFIG_AM33XX 1687694558STom Rini #define CONFIG_BOARD_LATE_INIT 1787694558STom Rini #define CONFIG_ARCH_CPU_INIT 1887694558STom Rini #define CONFIG_SYS_CACHELINE_SIZE 64 1987694558STom Rini #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 2087694558STom Rini #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 21*16678eb4SHeiko Schocher #define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 2287694558STom Rini 2387694558STom Rini #include <asm/arch/omap.h> 2487694558STom Rini 2587694558STom Rini /* NS16550 Configuration */ 2687694558STom Rini #define CONFIG_SYS_NS16550 2787694558STom Rini #define CONFIG_SYS_NS16550_SERIAL 2887694558STom Rini #define CONFIG_SYS_NS16550_REG_SIZE (-4) 2987694558STom Rini #define CONFIG_SYS_NS16550_CLK 48000000 3087694558STom Rini 3187694558STom Rini /* Network defines. */ 32a7a06400STom Rini #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ 3387694558STom Rini #define CONFIG_CMD_DHCP 34a7a06400STom Rini #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 3587694558STom Rini #define CONFIG_BOOTP_DNS2 3687694558STom Rini #define CONFIG_BOOTP_SEND_HOSTNAME 3787694558STom Rini #define CONFIG_BOOTP_GATEWAY 3887694558STom Rini #define CONFIG_BOOTP_SUBNETMASK 3987694558STom Rini #define CONFIG_NET_RETRY_COUNT 10 40a7a06400STom Rini #define CONFIG_CMD_PING 41a7a06400STom Rini #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 42a7a06400STom Rini #define CONFIG_MII /* Required in net/eth.c */ 4387694558STom Rini 44c27efde6STom Rini /* 45a1c143f4STom Rini * RTC related defines. To use bootcount you must set bootlimit in the 46a1c143f4STom Rini * environment to a non-zero value. 47a1c143f4STom Rini */ 48a1c143f4STom Rini #define CONFIG_BOOTCOUNT_LIMIT 49a1c143f4STom Rini #define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000 50a1c143f4STom Rini 516843918eSTom Rini /* Enable the HW watchdog, since we can use this with bootcount */ 526843918eSTom Rini #define CONFIG_HW_WATCHDOG 536843918eSTom Rini #define CONFIG_OMAP_WATCHDOG 546843918eSTom Rini 55a1c143f4STom Rini /* 56c27efde6STom Rini * SPL related defines. The Public RAM memory map the ROM defines the 57c27efde6STom Rini * area between 0x402F0400 and 0x4030B800 as a download area and 58c27efde6STom Rini * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also 59c27efde6STom Rini * supports X-MODEM loading via UART, and we leverage this and then use 60c27efde6STom Rini * Y-MODEM to load u-boot.img, when booted over UART. 61c27efde6STom Rini */ 6287694558STom Rini #define CONFIG_SPL_TEXT_BASE 0x402F0400 63c27efde6STom Rini #define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) 6487694558STom Rini 656843918eSTom Rini /* Enable the watchdog inside of SPL */ 666843918eSTom Rini #define CONFIG_SPL_WATCHDOG_SUPPORT 676843918eSTom Rini 6887694558STom Rini /* 6987694558STom Rini * Since SPL did pll and ddr initialization for us, 7087694558STom Rini * we don't need to do it twice. 7187694558STom Rini */ 7287694558STom Rini #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) 7387694558STom Rini #define CONFIG_SKIP_LOWLEVEL_INIT 7487694558STom Rini #endif 7587694558STom Rini 7687694558STom Rini /* Now bring in the rest of the common code. */ 7787694558STom Rini #include <configs/ti_armv7_common.h> 7887694558STom Rini 7987694558STom Rini #endif /* __CONFIG_TI_AM335X_COMMON_H__ */ 80