1*f01b631fSTom Warren /* 2*f01b631fSTom Warren * (C) Copyright 2010-2012 3*f01b631fSTom Warren * NVIDIA Corporation <www.nvidia.com> 4*f01b631fSTom Warren * 5*f01b631fSTom Warren * See file CREDITS for list of people who contributed to this 6*f01b631fSTom Warren * project. 7*f01b631fSTom Warren * 8*f01b631fSTom Warren * This program is free software; you can redistribute it and/or 9*f01b631fSTom Warren * modify it under the terms of the GNU General Public License as 10*f01b631fSTom Warren * published by the Free Software Foundation; either version 2 of 11*f01b631fSTom Warren * the License, or (at your option) any later version. 12*f01b631fSTom Warren * 13*f01b631fSTom Warren * This program is distributed in the hope that it will be useful, 14*f01b631fSTom Warren * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*f01b631fSTom Warren * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*f01b631fSTom Warren * GNU General Public License for more details. 17*f01b631fSTom Warren * 18*f01b631fSTom Warren * You should have received a copy of the GNU General Public License 19*f01b631fSTom Warren * along with this program; if not, write to the Free Software 20*f01b631fSTom Warren * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*f01b631fSTom Warren * MA 02111-1307 USA 22*f01b631fSTom Warren */ 23*f01b631fSTom Warren 24*f01b631fSTom Warren #ifndef _TEGRA30_COMMON_H_ 25*f01b631fSTom Warren #define _TEGRA30_COMMON_H_ 26*f01b631fSTom Warren #include "tegra-common.h" 27*f01b631fSTom Warren 28*f01b631fSTom Warren /* 29*f01b631fSTom Warren * NS16550 Configuration 30*f01b631fSTom Warren */ 31*f01b631fSTom Warren #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ 32*f01b631fSTom Warren 33*f01b631fSTom Warren /* 34*f01b631fSTom Warren * High Level Configuration Options 35*f01b631fSTom Warren */ 36*f01b631fSTom Warren #define CONFIG_TEGRA30 /* in a NVidia Tegra30 core */ 37*f01b631fSTom Warren 38*f01b631fSTom Warren /* Environment information, boards can override if required */ 39*f01b631fSTom Warren #define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ 40*f01b631fSTom Warren 41*f01b631fSTom Warren /* 42*f01b631fSTom Warren * Miscellaneous configurable options 43*f01b631fSTom Warren */ 44*f01b631fSTom Warren #define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */ 45*f01b631fSTom Warren #define CONFIG_STACKBASE 0x82800000 /* 40MB */ 46*f01b631fSTom Warren 47*f01b631fSTom Warren /*----------------------------------------------------------------------- 48*f01b631fSTom Warren * Physical Memory Map 49*f01b631fSTom Warren */ 50*f01b631fSTom Warren #define CONFIG_SYS_TEXT_BASE 0x8010E000 51*f01b631fSTom Warren 52*f01b631fSTom Warren /* 53*f01b631fSTom Warren * Memory layout for where various images get loaded by boot scripts: 54*f01b631fSTom Warren * 55*f01b631fSTom Warren * scriptaddr can be pretty much anywhere that doesn't conflict with something 56*f01b631fSTom Warren * else. Put it above BOOTMAPSZ to eliminate conflicts. 57*f01b631fSTom Warren * 58*f01b631fSTom Warren * kernel_addr_r must be within the first 128M of RAM in order for the 59*f01b631fSTom Warren * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will 60*f01b631fSTom Warren * decompress itself to 0x8000 after the start of RAM, kernel_addr_r 61*f01b631fSTom Warren * should not overlap that area, or the kernel will have to copy itself 62*f01b631fSTom Warren * somewhere else before decompression. Similarly, the address of any other 63*f01b631fSTom Warren * data passed to the kernel shouldn't overlap the start of RAM. Pushing 64*f01b631fSTom Warren * this up to 16M allows for a sizable kernel to be decompressed below the 65*f01b631fSTom Warren * compressed load address. 66*f01b631fSTom Warren * 67*f01b631fSTom Warren * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for 68*f01b631fSTom Warren * the compressed kernel to be up to 16M too. 69*f01b631fSTom Warren * 70*f01b631fSTom Warren * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows 71*f01b631fSTom Warren * for the FDT/DTB to be up to 1M, which is hopefully plenty. 72*f01b631fSTom Warren */ 73*f01b631fSTom Warren #define MEM_LAYOUT_ENV_SETTINGS \ 74*f01b631fSTom Warren "scriptaddr=0x90000000\0" \ 75*f01b631fSTom Warren "kernel_addr_r=0x81000000\0" \ 76*f01b631fSTom Warren "fdt_addr_r=0x82000000\0" \ 77*f01b631fSTom Warren "ramdisk_addr_r=0x82100000\0" 78*f01b631fSTom Warren 79*f01b631fSTom Warren /* Defines for SPL */ 80*f01b631fSTom Warren #define CONFIG_SPL_TEXT_BASE 0x80108000 81*f01b631fSTom Warren #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 82*f01b631fSTom Warren #define CONFIG_SPL_STACK 0x800ffffc 83*f01b631fSTom Warren 84*f01b631fSTom Warren #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/tegra30/u-boot-spl.lds" 85*f01b631fSTom Warren 86*f01b631fSTom Warren #endif /* _TEGRA30_COMMON_H_ */ 87