xref: /rk3399_rockchip-uboot/include/configs/tegra-common.h (revision bbc1b99e8b8a1b87c2d0d959a1fcd1990abe82dd)
1f01b631fSTom Warren /*
2f01b631fSTom Warren  *  (C) Copyright 2010-2012
3f01b631fSTom Warren  *  NVIDIA Corporation <www.nvidia.com>
4f01b631fSTom Warren  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6f01b631fSTom Warren  */
7f01b631fSTom Warren 
8bfcf46dbSTom Warren #ifndef _TEGRA_COMMON_H_
9bfcf46dbSTom Warren #define _TEGRA_COMMON_H_
101ace4022SAlexey Brodkin #include <linux/sizes.h>
11f01b631fSTom Warren #include <linux/stringify.h>
12f01b631fSTom Warren 
13f01b631fSTom Warren /*
14f01b631fSTom Warren  * High Level Configuration Options
15f01b631fSTom Warren  */
16f01b631fSTom Warren #define CONFIG_ARMCORTEXA9		/* This is an ARM V7 CPU core */
17f01b631fSTom Warren #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
18f01b631fSTom Warren 
19f01b631fSTom Warren #include <asm/arch/tegra.h>		/* get chip and board defs */
20f01b631fSTom Warren 
21f41f0a19SThierry Reding /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
22f41f0a19SThierry Reding #ifndef CONFIG_ARM64
2331df9893SRob Herring #define CONFIG_SYS_TIMER_RATE		1000000
2431df9893SRob Herring #define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE
25f41f0a19SThierry Reding #endif
2631df9893SRob Herring 
27f01b631fSTom Warren /*
28f01b631fSTom Warren  * Display CPU and Board information
29f01b631fSTom Warren  */
30f01b631fSTom Warren #define CONFIG_DISPLAY_CPUINFO
31f01b631fSTom Warren #define CONFIG_DISPLAY_BOARDINFO
32f01b631fSTom Warren 
33f01b631fSTom Warren #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
34f01b631fSTom Warren 
35f01b631fSTom Warren /* Environment */
36f01b631fSTom Warren #define CONFIG_ENV_VARS_UBOOT_CONFIG
37f01b631fSTom Warren #define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */
38f01b631fSTom Warren 
39f01b631fSTom Warren /*
40f01b631fSTom Warren  * Size of malloc() pool
41f01b631fSTom Warren  */
4252a7c98aSPrzemyslaw Marczak #ifdef CONFIG_DFU_MMC
4352a7c98aSPrzemyslaw Marczak #define CONFIG_SYS_MALLOC_LEN		((4 << 20) + \
4452a7c98aSPrzemyslaw Marczak 					CONFIG_SYS_DFU_DATA_BUF_SIZE)
4552a7c98aSPrzemyslaw Marczak #else
46f01b631fSTom Warren #define CONFIG_SYS_MALLOC_LEN		(4 << 20)	/* 4MB  */
4752a7c98aSPrzemyslaw Marczak #endif
48d1e5b406SThierry Reding 
496527268dSThierry Reding #ifndef CONFIG_ARM64
50d1e5b406SThierry Reding #define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)       /* 1 MiB */
516527268dSThierry Reding #endif
52f01b631fSTom Warren 
53f01b631fSTom Warren /*
54bfcf46dbSTom Warren  * NS16550 Configuration
55f01b631fSTom Warren  */
56858530a8SSimon Glass #define CONFIG_TEGRA_SERIAL
57858530a8SSimon Glass #define CONFIG_SYS_NS16550
58f01b631fSTom Warren 
59f01b631fSTom Warren /*
60f175603fSStephen Warren  * Common HW configuration.
61f175603fSStephen Warren  * If this varies between SoCs later, move to tegraNN-common.h
62f175603fSStephen Warren  * Note: This is number of devices, not max device ID.
63f175603fSStephen Warren  */
64f175603fSStephen Warren #define CONFIG_SYS_MMC_MAX_DEVICE 4
65f175603fSStephen Warren 
66f175603fSStephen Warren /*
67f01b631fSTom Warren  * select serial console configuration
68f01b631fSTom Warren  */
69f01b631fSTom Warren #define CONFIG_CONS_INDEX	1
70f01b631fSTom Warren 
71f01b631fSTom Warren /* allow to overwrite serial and ethaddr */
72f01b631fSTom Warren #define CONFIG_ENV_OVERWRITE
73f01b631fSTom Warren #define CONFIG_BAUDRATE			115200
74f01b631fSTom Warren 
75f01b631fSTom Warren /* turn on command-line edit/hist/auto */
76f01b631fSTom Warren #define CONFIG_COMMAND_HISTORY
77f01b631fSTom Warren 
7811d9c030SStephen Warren /* turn on commonly used storage-related commands */
7911d9c030SStephen Warren #define CONFIG_PARTITION_UUIDS
8011d9c030SStephen Warren #define CONFIG_CMD_PART
8111d9c030SStephen Warren 
82f01b631fSTom Warren #define CONFIG_SYS_NO_FLASH
83f01b631fSTom Warren 
84f01b631fSTom Warren #define CONFIG_CONSOLE_MUX
85f01b631fSTom Warren #define CONFIG_SYS_CONSOLE_IS_IN_ENV
8686bd20b0SStephen Warren #ifndef CONFIG_SPL_BUILD
8786bd20b0SStephen Warren #define CONFIG_SYS_STDIO_DEREGISTER
8886bd20b0SStephen Warren #endif
89f01b631fSTom Warren 
90f01b631fSTom Warren /*
91f01b631fSTom Warren  * Increasing the size of the IO buffer as default nfsargs size is more
92f01b631fSTom Warren  *  than 256 and so it is not possible to edit it
93f01b631fSTom Warren  */
94f01b631fSTom Warren #define CONFIG_SYS_CBSIZE		(256 * 2) /* Console I/O Buffer Size */
95f01b631fSTom Warren /* Print Buffer Size */
96f01b631fSTom Warren #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
97f01b631fSTom Warren 					sizeof(CONFIG_SYS_PROMPT) + 16)
980859b49dSSimon Glass #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
99f01b631fSTom Warren /* Boot Argument Buffer Size */
100f01b631fSTom Warren #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
101f01b631fSTom Warren 
102f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
103f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
104f01b631fSTom Warren 
1056527268dSThierry Reding #ifndef CONFIG_ARM64
1069dacbb27SSimon Glass #ifndef CONFIG_SPL_BUILD
1074270d5afSMarcel Ziswiler #define CONFIG_USE_ARCH_MEMCPY
1089dacbb27SSimon Glass #endif
1096527268dSThierry Reding #endif
1104270d5afSMarcel Ziswiler 
111f01b631fSTom Warren /*-----------------------------------------------------------------------
112f01b631fSTom Warren  * Physical Memory Map
113f01b631fSTom Warren  */
114*bbc1b99eSStephen Warren #define CONFIG_NR_DRAM_BANKS	2
115f01b631fSTom Warren #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
116f01b631fSTom Warren #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
117f01b631fSTom Warren 
118f01b631fSTom Warren #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
119f01b631fSTom Warren #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
120f01b631fSTom Warren 
121f01b631fSTom Warren #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */
122f01b631fSTom Warren 
123f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
124f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
125f01b631fSTom Warren #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
126f01b631fSTom Warren 						CONFIG_SYS_INIT_RAM_SIZE - \
127f01b631fSTom Warren 						GENERATED_GBL_DATA_SIZE)
128f01b631fSTom Warren 
129f01b631fSTom Warren #define CONFIG_TEGRA_GPIO
130f01b631fSTom Warren #define CONFIG_CMD_GPIO
131f01b631fSTom Warren #define CONFIG_CMD_ENTERRCM
132f01b631fSTom Warren 
133f01b631fSTom Warren /* Defines for SPL */
134f01b631fSTom Warren #define CONFIG_SPL_FRAMEWORK
135f01b631fSTom Warren #define CONFIG_SPL_RAM_DEVICE
136f01b631fSTom Warren #define CONFIG_SPL_BOARD_INIT
137f01b631fSTom Warren #define CONFIG_SPL_NAND_SIMPLE
1386ebc3461SAlbert ARIBAUD #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
139f01b631fSTom Warren 						CONFIG_SPL_TEXT_BASE)
140f01b631fSTom Warren #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
141f01b631fSTom Warren 
142f01b631fSTom Warren #define CONFIG_SPL_LIBCOMMON_SUPPORT
143f01b631fSTom Warren #define CONFIG_SPL_LIBGENERIC_SUPPORT
144f01b631fSTom Warren #define CONFIG_SPL_SERIAL_SUPPORT
145f01b631fSTom Warren #define CONFIG_SPL_GPIO_SUPPORT
146f01b631fSTom Warren 
147dd7f65f6SSimon Glass #define CONFIG_SYS_GENERIC_BOARD
148026baff7SStephen Warren #define CONFIG_BOARD_EARLY_INIT_F
149026baff7SStephen Warren #define CONFIG_BOARD_LATE_INIT
1503efff99fSTom Warren 
151a885f852SStephen Warren /* Misc utility code */
152a885f852SStephen Warren #define CONFIG_BOUNCE_BUFFER
1533efff99fSTom Warren #define CONFIG_CRC32_VERIFY
154dd7f65f6SSimon Glass 
15568cf64dbSStephen Warren #ifndef CONFIG_SPL_BUILD
15668cf64dbSStephen Warren #include <config_distro_defaults.h>
15768cf64dbSStephen Warren #endif
15868cf64dbSStephen Warren 
159f01b631fSTom Warren #endif /* _TEGRA_COMMON_H_ */
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