1f01b631fSTom Warren /* 2f01b631fSTom Warren * (C) Copyright 2010-2012 3f01b631fSTom Warren * NVIDIA Corporation <www.nvidia.com> 4f01b631fSTom Warren * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6f01b631fSTom Warren */ 7f01b631fSTom Warren 8bfcf46dbSTom Warren #ifndef _TEGRA_COMMON_H_ 9bfcf46dbSTom Warren #define _TEGRA_COMMON_H_ 101ace4022SAlexey Brodkin #include <linux/sizes.h> 11f01b631fSTom Warren #include <linux/stringify.h> 12f01b631fSTom Warren 13f01b631fSTom Warren /* 14f01b631fSTom Warren * High Level Configuration Options 15f01b631fSTom Warren */ 16f01b631fSTom Warren #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17f01b631fSTom Warren #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18f01b631fSTom Warren 19f01b631fSTom Warren #include <asm/arch/tegra.h> /* get chip and board defs */ 20f01b631fSTom Warren 2147f3d3c8SSimon Glass #define CONFIG_DM 2247f3d3c8SSimon Glass #define CONFIG_CMD_DM 2347f3d3c8SSimon Glass 2431df9893SRob Herring #define CONFIG_SYS_TIMER_RATE 1000000 2531df9893SRob Herring #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 2631df9893SRob Herring 27f01b631fSTom Warren /* 28f01b631fSTom Warren * Display CPU and Board information 29f01b631fSTom Warren */ 30f01b631fSTom Warren #define CONFIG_DISPLAY_CPUINFO 31f01b631fSTom Warren #define CONFIG_DISPLAY_BOARDINFO 32f01b631fSTom Warren 33f01b631fSTom Warren #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34f01b631fSTom Warren 35f01b631fSTom Warren /* Environment */ 36f01b631fSTom Warren #define CONFIG_ENV_VARS_UBOOT_CONFIG 37f01b631fSTom Warren #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 38f01b631fSTom Warren 39f01b631fSTom Warren /* 40f01b631fSTom Warren * Size of malloc() pool 41f01b631fSTom Warren */ 42f01b631fSTom Warren #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ 43*a4741111SSimon Glass #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 44f01b631fSTom Warren 45f01b631fSTom Warren /* 46bfcf46dbSTom Warren * NS16550 Configuration 47f01b631fSTom Warren */ 48f01b631fSTom Warren #define CONFIG_SYS_NS16550 49f01b631fSTom Warren #define CONFIG_SYS_NS16550_SERIAL 50f01b631fSTom Warren #define CONFIG_SYS_NS16550_REG_SIZE (-4) 51f01b631fSTom Warren #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 52f01b631fSTom Warren 53f01b631fSTom Warren /* 54f175603fSStephen Warren * Common HW configuration. 55f175603fSStephen Warren * If this varies between SoCs later, move to tegraNN-common.h 56f175603fSStephen Warren * Note: This is number of devices, not max device ID. 57f175603fSStephen Warren */ 58f175603fSStephen Warren #define CONFIG_SYS_MMC_MAX_DEVICE 4 59f175603fSStephen Warren 60f175603fSStephen Warren /* 61f01b631fSTom Warren * select serial console configuration 62f01b631fSTom Warren */ 63f01b631fSTom Warren #define CONFIG_CONS_INDEX 1 64f01b631fSTom Warren 65f01b631fSTom Warren /* allow to overwrite serial and ethaddr */ 66f01b631fSTom Warren #define CONFIG_ENV_OVERWRITE 67f01b631fSTom Warren #define CONFIG_BAUDRATE 115200 68f01b631fSTom Warren 69f01b631fSTom Warren /* include default commands */ 70f01b631fSTom Warren #include <config_cmd_default.h> 71f01b631fSTom Warren 72f01b631fSTom Warren /* remove unused commands */ 73f01b631fSTom Warren #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 74f01b631fSTom Warren #undef CONFIG_CMD_FPGA /* FPGA configuration support */ 75f01b631fSTom Warren #undef CONFIG_CMD_IMI 76f01b631fSTom Warren #undef CONFIG_CMD_IMLS 77f01b631fSTom Warren #undef CONFIG_CMD_NFS /* NFS support */ 78f01b631fSTom Warren #undef CONFIG_CMD_NET /* network support */ 79f01b631fSTom Warren 80f01b631fSTom Warren /* turn on command-line edit/hist/auto */ 81f01b631fSTom Warren #define CONFIG_COMMAND_HISTORY 82f01b631fSTom Warren 8311d9c030SStephen Warren /* turn on commonly used storage-related commands */ 8411d9c030SStephen Warren #define CONFIG_PARTITION_UUIDS 8511d9c030SStephen Warren #define CONFIG_CMD_PART 8611d9c030SStephen Warren 87f01b631fSTom Warren #define CONFIG_SYS_NO_FLASH 88f01b631fSTom Warren 89f01b631fSTom Warren #define CONFIG_CONSOLE_MUX 90f01b631fSTom Warren #define CONFIG_SYS_CONSOLE_IS_IN_ENV 91f01b631fSTom Warren 92f01b631fSTom Warren /* 93f01b631fSTom Warren * Miscellaneous configurable options 94f01b631fSTom Warren */ 95f01b631fSTom Warren #define CONFIG_SYS_PROMPT V_PROMPT 96f01b631fSTom Warren /* 97f01b631fSTom Warren * Increasing the size of the IO buffer as default nfsargs size is more 98f01b631fSTom Warren * than 256 and so it is not possible to edit it 99f01b631fSTom Warren */ 100f01b631fSTom Warren #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ 101f01b631fSTom Warren /* Print Buffer Size */ 102f01b631fSTom Warren #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 103f01b631fSTom Warren sizeof(CONFIG_SYS_PROMPT) + 16) 104f01b631fSTom Warren #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 105f01b631fSTom Warren /* Boot Argument Buffer Size */ 106f01b631fSTom Warren #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 107f01b631fSTom Warren 108f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 109f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 110f01b631fSTom Warren 111f01b631fSTom Warren /*----------------------------------------------------------------------- 112f01b631fSTom Warren * Physical Memory Map 113f01b631fSTom Warren */ 114f01b631fSTom Warren #define CONFIG_NR_DRAM_BANKS 1 115f01b631fSTom Warren #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 116f01b631fSTom Warren #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 117f01b631fSTom Warren 118f01b631fSTom Warren #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 119f01b631fSTom Warren #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 120f01b631fSTom Warren 121f01b631fSTom Warren #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 122f01b631fSTom Warren 123f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 124f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 125f01b631fSTom Warren #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 126f01b631fSTom Warren CONFIG_SYS_INIT_RAM_SIZE - \ 127f01b631fSTom Warren GENERATED_GBL_DATA_SIZE) 128f01b631fSTom Warren 129f01b631fSTom Warren #define CONFIG_TEGRA_GPIO 130f01b631fSTom Warren #define CONFIG_CMD_GPIO 131f01b631fSTom Warren #define CONFIG_CMD_ENTERRCM 132f01b631fSTom Warren 133f01b631fSTom Warren /* Defines for SPL */ 134f01b631fSTom Warren #define CONFIG_SPL_FRAMEWORK 135f01b631fSTom Warren #define CONFIG_SPL_RAM_DEVICE 136f01b631fSTom Warren #define CONFIG_SPL_BOARD_INIT 137f01b631fSTom Warren #define CONFIG_SPL_NAND_SIMPLE 1386ebc3461SAlbert ARIBAUD #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 139f01b631fSTom Warren CONFIG_SPL_TEXT_BASE) 140f01b631fSTom Warren #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 141f01b631fSTom Warren 142f01b631fSTom Warren #define CONFIG_SPL_LIBCOMMON_SUPPORT 143f01b631fSTom Warren #define CONFIG_SPL_LIBGENERIC_SUPPORT 144f01b631fSTom Warren #define CONFIG_SPL_SERIAL_SUPPORT 145f01b631fSTom Warren #define CONFIG_SPL_GPIO_SUPPORT 146f01b631fSTom Warren 147cd2e46cbSMasahiro Yamada #ifdef CONFIG_SPL_BUILD 148cd2e46cbSMasahiro Yamada # define CONFIG_USE_PRIVATE_LIBGCC 149cd2e46cbSMasahiro Yamada #endif 150cd2e46cbSMasahiro Yamada 151dd7f65f6SSimon Glass #define CONFIG_SYS_GENERIC_BOARD 1523efff99fSTom Warren 153a885f852SStephen Warren /* Misc utility code */ 154a885f852SStephen Warren #define CONFIG_BOUNCE_BUFFER 1553efff99fSTom Warren #define CONFIG_CRC32_VERIFY 156dd7f65f6SSimon Glass 15768cf64dbSStephen Warren #ifndef CONFIG_SPL_BUILD 15868cf64dbSStephen Warren #include <config_distro_defaults.h> 15968cf64dbSStephen Warren #endif 16068cf64dbSStephen Warren 161f01b631fSTom Warren #endif /* _TEGRA_COMMON_H_ */ 162