1f01b631fSTom Warren /* 2f01b631fSTom Warren * (C) Copyright 2010-2012 3f01b631fSTom Warren * NVIDIA Corporation <www.nvidia.com> 4f01b631fSTom Warren * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6f01b631fSTom Warren */ 7f01b631fSTom Warren 8bfcf46dbSTom Warren #ifndef _TEGRA_COMMON_H_ 9bfcf46dbSTom Warren #define _TEGRA_COMMON_H_ 101ace4022SAlexey Brodkin #include <linux/sizes.h> 11f01b631fSTom Warren #include <linux/stringify.h> 12f01b631fSTom Warren 13f01b631fSTom Warren /* 14f01b631fSTom Warren * High Level Configuration Options 15f01b631fSTom Warren */ 16f01b631fSTom Warren #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17f01b631fSTom Warren #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18f01b631fSTom Warren 19f01b631fSTom Warren #include <asm/arch/tegra.h> /* get chip and board defs */ 20f01b631fSTom Warren 2131df9893SRob Herring #define CONFIG_SYS_TIMER_RATE 1000000 2231df9893SRob Herring #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 2331df9893SRob Herring 24f01b631fSTom Warren /* 25f01b631fSTom Warren * Display CPU and Board information 26f01b631fSTom Warren */ 27f01b631fSTom Warren #define CONFIG_DISPLAY_CPUINFO 28f01b631fSTom Warren #define CONFIG_DISPLAY_BOARDINFO 29f01b631fSTom Warren 30f01b631fSTom Warren #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31f01b631fSTom Warren 32f01b631fSTom Warren /* Environment */ 33f01b631fSTom Warren #define CONFIG_ENV_VARS_UBOOT_CONFIG 34f01b631fSTom Warren #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 35f01b631fSTom Warren 36f01b631fSTom Warren /* 37f01b631fSTom Warren * Size of malloc() pool 38f01b631fSTom Warren */ 3952a7c98aSPrzemyslaw Marczak #ifdef CONFIG_DFU_MMC 4052a7c98aSPrzemyslaw Marczak #define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \ 4152a7c98aSPrzemyslaw Marczak CONFIG_SYS_DFU_DATA_BUF_SIZE) 4252a7c98aSPrzemyslaw Marczak #else 43f01b631fSTom Warren #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ 4452a7c98aSPrzemyslaw Marczak #endif 45d1e5b406SThierry Reding 46*6527268dSThierry Reding #ifndef CONFIG_ARM64 47d1e5b406SThierry Reding #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 48*6527268dSThierry Reding #endif 49f01b631fSTom Warren 50f01b631fSTom Warren /* 51bfcf46dbSTom Warren * NS16550 Configuration 52f01b631fSTom Warren */ 53858530a8SSimon Glass #define CONFIG_TEGRA_SERIAL 54858530a8SSimon Glass #define CONFIG_SYS_NS16550 55f01b631fSTom Warren 56f01b631fSTom Warren /* 57f175603fSStephen Warren * Common HW configuration. 58f175603fSStephen Warren * If this varies between SoCs later, move to tegraNN-common.h 59f175603fSStephen Warren * Note: This is number of devices, not max device ID. 60f175603fSStephen Warren */ 61f175603fSStephen Warren #define CONFIG_SYS_MMC_MAX_DEVICE 4 62f175603fSStephen Warren 63f175603fSStephen Warren /* 64f01b631fSTom Warren * select serial console configuration 65f01b631fSTom Warren */ 66f01b631fSTom Warren #define CONFIG_CONS_INDEX 1 67f01b631fSTom Warren 68f01b631fSTom Warren /* allow to overwrite serial and ethaddr */ 69f01b631fSTom Warren #define CONFIG_ENV_OVERWRITE 70f01b631fSTom Warren #define CONFIG_BAUDRATE 115200 71f01b631fSTom Warren 72f01b631fSTom Warren /* turn on command-line edit/hist/auto */ 73f01b631fSTom Warren #define CONFIG_COMMAND_HISTORY 74f01b631fSTom Warren 7511d9c030SStephen Warren /* turn on commonly used storage-related commands */ 7611d9c030SStephen Warren #define CONFIG_PARTITION_UUIDS 7711d9c030SStephen Warren #define CONFIG_CMD_PART 7811d9c030SStephen Warren 79f01b631fSTom Warren #define CONFIG_SYS_NO_FLASH 80f01b631fSTom Warren 81f01b631fSTom Warren #define CONFIG_CONSOLE_MUX 82f01b631fSTom Warren #define CONFIG_SYS_CONSOLE_IS_IN_ENV 8386bd20b0SStephen Warren #ifndef CONFIG_SPL_BUILD 8486bd20b0SStephen Warren #define CONFIG_SYS_STDIO_DEREGISTER 8586bd20b0SStephen Warren #endif 86f01b631fSTom Warren 87f01b631fSTom Warren /* 88f01b631fSTom Warren * Miscellaneous configurable options 89f01b631fSTom Warren */ 90f01b631fSTom Warren #define CONFIG_SYS_PROMPT V_PROMPT 91f01b631fSTom Warren /* 92f01b631fSTom Warren * Increasing the size of the IO buffer as default nfsargs size is more 93f01b631fSTom Warren * than 256 and so it is not possible to edit it 94f01b631fSTom Warren */ 95f01b631fSTom Warren #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ 96f01b631fSTom Warren /* Print Buffer Size */ 97f01b631fSTom Warren #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 98f01b631fSTom Warren sizeof(CONFIG_SYS_PROMPT) + 16) 990859b49dSSimon Glass #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 100f01b631fSTom Warren /* Boot Argument Buffer Size */ 101f01b631fSTom Warren #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 102f01b631fSTom Warren 103f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 104f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 105f01b631fSTom Warren 106*6527268dSThierry Reding #ifndef CONFIG_ARM64 1079dacbb27SSimon Glass #ifndef CONFIG_SPL_BUILD 1084270d5afSMarcel Ziswiler #define CONFIG_USE_ARCH_MEMCPY 1099dacbb27SSimon Glass #endif 110*6527268dSThierry Reding #endif 1114270d5afSMarcel Ziswiler 112f01b631fSTom Warren /*----------------------------------------------------------------------- 113f01b631fSTom Warren * Physical Memory Map 114f01b631fSTom Warren */ 115f01b631fSTom Warren #define CONFIG_NR_DRAM_BANKS 1 116f01b631fSTom Warren #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 117f01b631fSTom Warren #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 118f01b631fSTom Warren 119f01b631fSTom Warren #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 120f01b631fSTom Warren #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 121f01b631fSTom Warren 122f01b631fSTom Warren #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 123f01b631fSTom Warren 124f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 125f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 126f01b631fSTom Warren #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 127f01b631fSTom Warren CONFIG_SYS_INIT_RAM_SIZE - \ 128f01b631fSTom Warren GENERATED_GBL_DATA_SIZE) 129f01b631fSTom Warren 130f01b631fSTom Warren #define CONFIG_TEGRA_GPIO 131f01b631fSTom Warren #define CONFIG_CMD_GPIO 132f01b631fSTom Warren #define CONFIG_CMD_ENTERRCM 133f01b631fSTom Warren 134f01b631fSTom Warren /* Defines for SPL */ 135f01b631fSTom Warren #define CONFIG_SPL_FRAMEWORK 136f01b631fSTom Warren #define CONFIG_SPL_RAM_DEVICE 137f01b631fSTom Warren #define CONFIG_SPL_BOARD_INIT 138f01b631fSTom Warren #define CONFIG_SPL_NAND_SIMPLE 1396ebc3461SAlbert ARIBAUD #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 140f01b631fSTom Warren CONFIG_SPL_TEXT_BASE) 141f01b631fSTom Warren #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 142f01b631fSTom Warren 143f01b631fSTom Warren #define CONFIG_SPL_LIBCOMMON_SUPPORT 144f01b631fSTom Warren #define CONFIG_SPL_LIBGENERIC_SUPPORT 145f01b631fSTom Warren #define CONFIG_SPL_SERIAL_SUPPORT 146f01b631fSTom Warren #define CONFIG_SPL_GPIO_SUPPORT 147f01b631fSTom Warren 148dd7f65f6SSimon Glass #define CONFIG_SYS_GENERIC_BOARD 149026baff7SStephen Warren #define CONFIG_BOARD_EARLY_INIT_F 150026baff7SStephen Warren #define CONFIG_BOARD_LATE_INIT 1513efff99fSTom Warren 152a885f852SStephen Warren /* Misc utility code */ 153a885f852SStephen Warren #define CONFIG_BOUNCE_BUFFER 1543efff99fSTom Warren #define CONFIG_CRC32_VERIFY 155dd7f65f6SSimon Glass 15668cf64dbSStephen Warren #ifndef CONFIG_SPL_BUILD 15768cf64dbSStephen Warren #include <config_distro_defaults.h> 15868cf64dbSStephen Warren #endif 15968cf64dbSStephen Warren 160f01b631fSTom Warren #endif /* _TEGRA_COMMON_H_ */ 161