1f01b631fSTom Warren /* 2f01b631fSTom Warren * (C) Copyright 2010-2012 3f01b631fSTom Warren * NVIDIA Corporation <www.nvidia.com> 4f01b631fSTom Warren * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6f01b631fSTom Warren */ 7f01b631fSTom Warren 8bfcf46dbSTom Warren #ifndef _TEGRA_COMMON_H_ 9bfcf46dbSTom Warren #define _TEGRA_COMMON_H_ 101ace4022SAlexey Brodkin #include <linux/sizes.h> 11f01b631fSTom Warren #include <linux/stringify.h> 12f01b631fSTom Warren 13f01b631fSTom Warren /* 14f01b631fSTom Warren * High Level Configuration Options 15f01b631fSTom Warren */ 16f01b631fSTom Warren #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17f01b631fSTom Warren #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18f01b631fSTom Warren 19f01b631fSTom Warren #include <asm/arch/tegra.h> /* get chip and board defs */ 20f01b631fSTom Warren 2147f3d3c8SSimon Glass #define CONFIG_DM 2247f3d3c8SSimon Glass #define CONFIG_CMD_DM 232fccd2d9SSimon Glass #define CONFIG_DM_GPIO 24858530a8SSimon Glass #ifndef CONFIG_SPL_BUILD 25858530a8SSimon Glass #define CONFIG_DM_SERIAL 26858530a8SSimon Glass #endif 2747f3d3c8SSimon Glass 2831df9893SRob Herring #define CONFIG_SYS_TIMER_RATE 1000000 2931df9893SRob Herring #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 3031df9893SRob Herring 31f01b631fSTom Warren /* 32f01b631fSTom Warren * Display CPU and Board information 33f01b631fSTom Warren */ 34f01b631fSTom Warren #define CONFIG_DISPLAY_CPUINFO 35f01b631fSTom Warren #define CONFIG_DISPLAY_BOARDINFO 36f01b631fSTom Warren 37f01b631fSTom Warren #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 38f01b631fSTom Warren 39f01b631fSTom Warren /* Environment */ 40f01b631fSTom Warren #define CONFIG_ENV_VARS_UBOOT_CONFIG 41f01b631fSTom Warren #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 42f01b631fSTom Warren 43f01b631fSTom Warren /* 44f01b631fSTom Warren * Size of malloc() pool 45f01b631fSTom Warren */ 46f01b631fSTom Warren #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ 47a4741111SSimon Glass #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 48f01b631fSTom Warren 49f01b631fSTom Warren /* 50bfcf46dbSTom Warren * NS16550 Configuration 51f01b631fSTom Warren */ 52858530a8SSimon Glass #ifdef CONFIG_SPL_BUILD 53f01b631fSTom Warren #define CONFIG_SYS_NS16550_SERIAL 54f01b631fSTom Warren #define CONFIG_SYS_NS16550_REG_SIZE (-4) 55f01b631fSTom Warren #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 56858530a8SSimon Glass #else 57858530a8SSimon Glass #define CONFIG_TEGRA_SERIAL 58858530a8SSimon Glass #endif 59858530a8SSimon Glass #define CONFIG_SYS_NS16550 60f01b631fSTom Warren 61f01b631fSTom Warren /* 62f175603fSStephen Warren * Common HW configuration. 63f175603fSStephen Warren * If this varies between SoCs later, move to tegraNN-common.h 64f175603fSStephen Warren * Note: This is number of devices, not max device ID. 65f175603fSStephen Warren */ 66f175603fSStephen Warren #define CONFIG_SYS_MMC_MAX_DEVICE 4 67f175603fSStephen Warren 68f175603fSStephen Warren /* 69f01b631fSTom Warren * select serial console configuration 70f01b631fSTom Warren */ 71f01b631fSTom Warren #define CONFIG_CONS_INDEX 1 72f01b631fSTom Warren 73f01b631fSTom Warren /* allow to overwrite serial and ethaddr */ 74f01b631fSTom Warren #define CONFIG_ENV_OVERWRITE 75f01b631fSTom Warren #define CONFIG_BAUDRATE 115200 76f01b631fSTom Warren 77f01b631fSTom Warren /* include default commands */ 78f01b631fSTom Warren #include <config_cmd_default.h> 79f01b631fSTom Warren 80f01b631fSTom Warren /* remove unused commands */ 81f01b631fSTom Warren #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 82f01b631fSTom Warren #undef CONFIG_CMD_FPGA /* FPGA configuration support */ 83f01b631fSTom Warren #undef CONFIG_CMD_IMI 84f01b631fSTom Warren #undef CONFIG_CMD_IMLS 85f01b631fSTom Warren #undef CONFIG_CMD_NFS /* NFS support */ 86f01b631fSTom Warren #undef CONFIG_CMD_NET /* network support */ 87f01b631fSTom Warren 88f01b631fSTom Warren /* turn on command-line edit/hist/auto */ 89f01b631fSTom Warren #define CONFIG_COMMAND_HISTORY 90f01b631fSTom Warren 9111d9c030SStephen Warren /* turn on commonly used storage-related commands */ 9211d9c030SStephen Warren #define CONFIG_PARTITION_UUIDS 9311d9c030SStephen Warren #define CONFIG_CMD_PART 9411d9c030SStephen Warren 95f01b631fSTom Warren #define CONFIG_SYS_NO_FLASH 96f01b631fSTom Warren 97f01b631fSTom Warren #define CONFIG_CONSOLE_MUX 98f01b631fSTom Warren #define CONFIG_SYS_CONSOLE_IS_IN_ENV 99f01b631fSTom Warren 100f01b631fSTom Warren /* 101f01b631fSTom Warren * Miscellaneous configurable options 102f01b631fSTom Warren */ 103f01b631fSTom Warren #define CONFIG_SYS_PROMPT V_PROMPT 104f01b631fSTom Warren /* 105f01b631fSTom Warren * Increasing the size of the IO buffer as default nfsargs size is more 106f01b631fSTom Warren * than 256 and so it is not possible to edit it 107f01b631fSTom Warren */ 108f01b631fSTom Warren #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ 109f01b631fSTom Warren /* Print Buffer Size */ 110f01b631fSTom Warren #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 111f01b631fSTom Warren sizeof(CONFIG_SYS_PROMPT) + 16) 112f01b631fSTom Warren #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 113f01b631fSTom Warren /* Boot Argument Buffer Size */ 114f01b631fSTom Warren #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 115f01b631fSTom Warren 116f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 117f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 118f01b631fSTom Warren 119*4270d5afSMarcel Ziswiler #define CONFIG_USE_ARCH_MEMCPY 120*4270d5afSMarcel Ziswiler 121f01b631fSTom Warren /*----------------------------------------------------------------------- 122f01b631fSTom Warren * Physical Memory Map 123f01b631fSTom Warren */ 124f01b631fSTom Warren #define CONFIG_NR_DRAM_BANKS 1 125f01b631fSTom Warren #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 126f01b631fSTom Warren #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 127f01b631fSTom Warren 128f01b631fSTom Warren #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 129f01b631fSTom Warren #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 130f01b631fSTom Warren 131f01b631fSTom Warren #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 132f01b631fSTom Warren 133f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 134f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 135f01b631fSTom Warren #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 136f01b631fSTom Warren CONFIG_SYS_INIT_RAM_SIZE - \ 137f01b631fSTom Warren GENERATED_GBL_DATA_SIZE) 138f01b631fSTom Warren 139f01b631fSTom Warren #define CONFIG_TEGRA_GPIO 140f01b631fSTom Warren #define CONFIG_CMD_GPIO 141f01b631fSTom Warren #define CONFIG_CMD_ENTERRCM 142f01b631fSTom Warren 143f01b631fSTom Warren /* Defines for SPL */ 144f01b631fSTom Warren #define CONFIG_SPL_FRAMEWORK 145f01b631fSTom Warren #define CONFIG_SPL_RAM_DEVICE 146f01b631fSTom Warren #define CONFIG_SPL_BOARD_INIT 147f01b631fSTom Warren #define CONFIG_SPL_NAND_SIMPLE 1486ebc3461SAlbert ARIBAUD #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 149f01b631fSTom Warren CONFIG_SPL_TEXT_BASE) 150f01b631fSTom Warren #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 151f01b631fSTom Warren 152f01b631fSTom Warren #define CONFIG_SPL_LIBCOMMON_SUPPORT 153f01b631fSTom Warren #define CONFIG_SPL_LIBGENERIC_SUPPORT 154f01b631fSTom Warren #define CONFIG_SPL_SERIAL_SUPPORT 155f01b631fSTom Warren #define CONFIG_SPL_GPIO_SUPPORT 156f01b631fSTom Warren 157cd2e46cbSMasahiro Yamada #ifdef CONFIG_SPL_BUILD 158cd2e46cbSMasahiro Yamada # define CONFIG_USE_PRIVATE_LIBGCC 159cd2e46cbSMasahiro Yamada #endif 160cd2e46cbSMasahiro Yamada 161dd7f65f6SSimon Glass #define CONFIG_SYS_GENERIC_BOARD 1623efff99fSTom Warren 163a885f852SStephen Warren /* Misc utility code */ 164a885f852SStephen Warren #define CONFIG_BOUNCE_BUFFER 1653efff99fSTom Warren #define CONFIG_CRC32_VERIFY 166dd7f65f6SSimon Glass 16768cf64dbSStephen Warren #ifndef CONFIG_SPL_BUILD 16868cf64dbSStephen Warren #include <config_distro_defaults.h> 16968cf64dbSStephen Warren #endif 17068cf64dbSStephen Warren 171f01b631fSTom Warren #endif /* _TEGRA_COMMON_H_ */ 172