xref: /rk3399_rockchip-uboot/include/configs/tegra-common.h (revision 026baff755cbab0c8bfc12d78e6966718f5325a5)
1f01b631fSTom Warren /*
2f01b631fSTom Warren  *  (C) Copyright 2010-2012
3f01b631fSTom Warren  *  NVIDIA Corporation <www.nvidia.com>
4f01b631fSTom Warren  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6f01b631fSTom Warren  */
7f01b631fSTom Warren 
8bfcf46dbSTom Warren #ifndef _TEGRA_COMMON_H_
9bfcf46dbSTom Warren #define _TEGRA_COMMON_H_
101ace4022SAlexey Brodkin #include <linux/sizes.h>
11f01b631fSTom Warren #include <linux/stringify.h>
12f01b631fSTom Warren 
13f01b631fSTom Warren /*
14f01b631fSTom Warren  * High Level Configuration Options
15f01b631fSTom Warren  */
16f01b631fSTom Warren #define CONFIG_ARMCORTEXA9		/* This is an ARM V7 CPU core */
17f01b631fSTom Warren #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
18f01b631fSTom Warren 
19f01b631fSTom Warren #include <asm/arch/tegra.h>		/* get chip and board defs */
20f01b631fSTom Warren 
2131df9893SRob Herring #define CONFIG_SYS_TIMER_RATE		1000000
2231df9893SRob Herring #define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE
2331df9893SRob Herring 
24f01b631fSTom Warren /*
25f01b631fSTom Warren  * Display CPU and Board information
26f01b631fSTom Warren  */
27f01b631fSTom Warren #define CONFIG_DISPLAY_CPUINFO
28f01b631fSTom Warren #define CONFIG_DISPLAY_BOARDINFO
29f01b631fSTom Warren 
30f01b631fSTom Warren #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
31f01b631fSTom Warren 
32f01b631fSTom Warren /* Environment */
33f01b631fSTom Warren #define CONFIG_ENV_VARS_UBOOT_CONFIG
34f01b631fSTom Warren #define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */
35f01b631fSTom Warren 
36f01b631fSTom Warren /*
37f01b631fSTom Warren  * Size of malloc() pool
38f01b631fSTom Warren  */
39f01b631fSTom Warren #define CONFIG_SYS_MALLOC_LEN		(4 << 20)	/* 4MB  */
40d1e5b406SThierry Reding 
41d1e5b406SThierry Reding #define CONFIG_SYS_NONCACHED_MEMORY	(1 << 20)       /* 1 MiB */
42f01b631fSTom Warren 
43f01b631fSTom Warren /*
44bfcf46dbSTom Warren  * NS16550 Configuration
45f01b631fSTom Warren  */
46858530a8SSimon Glass #ifdef CONFIG_SPL_BUILD
47f01b631fSTom Warren #define CONFIG_SYS_NS16550_SERIAL
48f01b631fSTom Warren #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
49f01b631fSTom Warren #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
50858530a8SSimon Glass #else
51858530a8SSimon Glass #define CONFIG_TEGRA_SERIAL
52858530a8SSimon Glass #endif
53858530a8SSimon Glass #define CONFIG_SYS_NS16550
54f01b631fSTom Warren 
55f01b631fSTom Warren /*
56f175603fSStephen Warren  * Common HW configuration.
57f175603fSStephen Warren  * If this varies between SoCs later, move to tegraNN-common.h
58f175603fSStephen Warren  * Note: This is number of devices, not max device ID.
59f175603fSStephen Warren  */
60f175603fSStephen Warren #define CONFIG_SYS_MMC_MAX_DEVICE 4
61f175603fSStephen Warren 
62f175603fSStephen Warren /*
63f01b631fSTom Warren  * select serial console configuration
64f01b631fSTom Warren  */
65f01b631fSTom Warren #define CONFIG_CONS_INDEX	1
66f01b631fSTom Warren 
67f01b631fSTom Warren /* allow to overwrite serial and ethaddr */
68f01b631fSTom Warren #define CONFIG_ENV_OVERWRITE
69f01b631fSTom Warren #define CONFIG_BAUDRATE			115200
70f01b631fSTom Warren 
71f01b631fSTom Warren /* include default commands */
72f01b631fSTom Warren #include <config_cmd_default.h>
73f01b631fSTom Warren 
74f01b631fSTom Warren /* remove unused commands */
75f01b631fSTom Warren #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect */
76f01b631fSTom Warren #undef CONFIG_CMD_FPGA		/* FPGA configuration support */
77f01b631fSTom Warren #undef CONFIG_CMD_IMI
78f01b631fSTom Warren #undef CONFIG_CMD_IMLS
79f01b631fSTom Warren #undef CONFIG_CMD_NFS		/* NFS support */
80f01b631fSTom Warren #undef CONFIG_CMD_NET		/* network support */
81f01b631fSTom Warren 
82f01b631fSTom Warren /* turn on command-line edit/hist/auto */
83f01b631fSTom Warren #define CONFIG_COMMAND_HISTORY
84f01b631fSTom Warren 
8511d9c030SStephen Warren /* turn on commonly used storage-related commands */
8611d9c030SStephen Warren #define CONFIG_PARTITION_UUIDS
8711d9c030SStephen Warren #define CONFIG_CMD_PART
8811d9c030SStephen Warren 
89f01b631fSTom Warren #define CONFIG_SYS_NO_FLASH
90f01b631fSTom Warren 
91f01b631fSTom Warren #define CONFIG_CONSOLE_MUX
92f01b631fSTom Warren #define CONFIG_SYS_CONSOLE_IS_IN_ENV
93f01b631fSTom Warren 
94f01b631fSTom Warren /*
95f01b631fSTom Warren  * Miscellaneous configurable options
96f01b631fSTom Warren  */
97f01b631fSTom Warren #define CONFIG_SYS_PROMPT		V_PROMPT
98f01b631fSTom Warren /*
99f01b631fSTom Warren  * Increasing the size of the IO buffer as default nfsargs size is more
100f01b631fSTom Warren  *  than 256 and so it is not possible to edit it
101f01b631fSTom Warren  */
102f01b631fSTom Warren #define CONFIG_SYS_CBSIZE		(256 * 2) /* Console I/O Buffer Size */
103f01b631fSTom Warren /* Print Buffer Size */
104f01b631fSTom Warren #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
105f01b631fSTom Warren 					sizeof(CONFIG_SYS_PROMPT) + 16)
106f01b631fSTom Warren #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
107f01b631fSTom Warren /* Boot Argument Buffer Size */
108f01b631fSTom Warren #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
109f01b631fSTom Warren 
110f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
111f01b631fSTom Warren #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
112f01b631fSTom Warren 
1139dacbb27SSimon Glass #ifndef CONFIG_SPL_BUILD
1144270d5afSMarcel Ziswiler #define CONFIG_USE_ARCH_MEMCPY
1159dacbb27SSimon Glass #endif
1164270d5afSMarcel Ziswiler 
117f01b631fSTom Warren /*-----------------------------------------------------------------------
118f01b631fSTom Warren  * Physical Memory Map
119f01b631fSTom Warren  */
120f01b631fSTom Warren #define CONFIG_NR_DRAM_BANKS	1
121f01b631fSTom Warren #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
122f01b631fSTom Warren #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
123f01b631fSTom Warren 
124f01b631fSTom Warren #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
125f01b631fSTom Warren #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
126f01b631fSTom Warren 
127f01b631fSTom Warren #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */
128f01b631fSTom Warren 
129f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
130f01b631fSTom Warren #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
131f01b631fSTom Warren #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
132f01b631fSTom Warren 						CONFIG_SYS_INIT_RAM_SIZE - \
133f01b631fSTom Warren 						GENERATED_GBL_DATA_SIZE)
134f01b631fSTom Warren 
135f01b631fSTom Warren #define CONFIG_TEGRA_GPIO
136f01b631fSTom Warren #define CONFIG_CMD_GPIO
137f01b631fSTom Warren #define CONFIG_CMD_ENTERRCM
138f01b631fSTom Warren 
139f01b631fSTom Warren /* Defines for SPL */
140f01b631fSTom Warren #define CONFIG_SPL_FRAMEWORK
141f01b631fSTom Warren #define CONFIG_SPL_RAM_DEVICE
142f01b631fSTom Warren #define CONFIG_SPL_BOARD_INIT
143f01b631fSTom Warren #define CONFIG_SPL_NAND_SIMPLE
1446ebc3461SAlbert ARIBAUD #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
145f01b631fSTom Warren 						CONFIG_SPL_TEXT_BASE)
146f01b631fSTom Warren #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
147f01b631fSTom Warren 
148f01b631fSTom Warren #define CONFIG_SPL_LIBCOMMON_SUPPORT
149f01b631fSTom Warren #define CONFIG_SPL_LIBGENERIC_SUPPORT
150f01b631fSTom Warren #define CONFIG_SPL_SERIAL_SUPPORT
151f01b631fSTom Warren #define CONFIG_SPL_GPIO_SUPPORT
152f01b631fSTom Warren 
153dd7f65f6SSimon Glass #define CONFIG_SYS_GENERIC_BOARD
154*026baff7SStephen Warren #define CONFIG_BOARD_EARLY_INIT_F
155*026baff7SStephen Warren #define CONFIG_BOARD_LATE_INIT
1563efff99fSTom Warren 
157a885f852SStephen Warren /* Misc utility code */
158a885f852SStephen Warren #define CONFIG_BOUNCE_BUFFER
1593efff99fSTom Warren #define CONFIG_CRC32_VERIFY
160dd7f65f6SSimon Glass 
16168cf64dbSStephen Warren #ifndef CONFIG_SPL_BUILD
16268cf64dbSStephen Warren #include <config_distro_defaults.h>
16368cf64dbSStephen Warren #endif
16468cf64dbSStephen Warren 
165f01b631fSTom Warren #endif /* _TEGRA_COMMON_H_ */
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