1 /* 2 * Copyright (C) 2014 Soeren Moch <smoch@web.de> 3 * 4 * Configuration settings for the TBS2910 MatrixARM board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __TBS2910_CONFIG_H 10 #define __TBS2910_CONFIG_H 11 12 #include "mx6_common.h" 13 14 /* General configuration */ 15 #define CONFIG_SYS_THUMB_BUILD 16 17 #define CONFIG_MACH_TYPE 3980 18 19 #define CONFIG_BOARD_EARLY_INIT_F 20 #define CONFIG_MXC_GPIO 21 #define CONFIG_CMD_GPIO 22 23 #define CONFIG_SYS_LONGHELP 24 #define CONFIG_SYS_HUSH_PARSER 25 #define CONFIG_SYS_PROMPT "Matrix U-Boot> " 26 #define CONFIG_BOOTDELAY 3 27 #define CONFIG_AUTO_COMPLETE 28 #define CONFIG_CMDLINE_EDITING 29 #define CONFIG_SYS_MAXARGS 16 30 #define CONFIG_SYS_CBSIZE 1024 31 #define CONFIG_SYS_HZ 1000 32 33 /* Physical Memory Map */ 34 #define CONFIG_NR_DRAM_BANKS 1 35 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR 36 37 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 38 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 39 #define CONFIG_SYS_INIT_SP_OFFSET \ 40 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 41 #define CONFIG_SYS_INIT_SP_ADDR \ 42 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 43 44 #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) 45 46 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 47 #define CONFIG_SYS_MEMTEST_END \ 48 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) 49 50 #define CONFIG_SYS_TEXT_BASE 0x80000000 51 #define CONFIG_SYS_BOOTMAPSZ 0x6C000000 52 #define CONFIG_SYS_LOAD_ADDR 0x10800000 53 54 /* Serial console */ 55 #define CONFIG_MXC_UART 56 #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ 57 #define CONFIG_BAUDRATE 115200 58 59 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 60 #define CONFIG_CONSOLE_MUX 61 #define CONFIG_CONS_INDEX 1 62 63 /* *** Command definition *** */ 64 #define CONFIG_CMD_BMODE 65 #define CONFIG_CMD_SETEXPR 66 #define CONFIG_CMD_MEMTEST 67 #define CONFIG_CMD_TIME 68 69 /* Filesystems / image support */ 70 #define CONFIG_CMD_EXT4 71 #define CONFIG_CMD_FAT 72 #define CONFIG_DOS_PARTITION 73 #define CONFIG_EFI_PARTITION 74 #define CONFIG_CMD_FS_GENERIC 75 76 #define CONFIG_OF_LIBFDT 77 #define CONFIG_CMD_BOOTZ 78 #define CONFIG_SUPPORT_RAW_INITRD 79 #define CONFIG_FIT 80 81 /* MMC */ 82 #define CONFIG_FSL_ESDHC 83 #define CONFIG_FSL_USDHC 84 #define CONFIG_SYS_FSL_USDHC_NUM 3 85 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 86 87 #define CONFIG_MMC 88 #define CONFIG_CMD_MMC 89 #define CONFIG_GENERIC_MMC 90 #define CONFIG_SUPPORT_EMMC_BOOT 91 #define CONFIG_BOUNCE_BUFFER 92 93 /* Ethernet */ 94 #define CONFIG_FEC_MXC 95 #define CONFIG_CMD_PING 96 #define CONFIG_CMD_DHCP 97 #define CONFIG_CMD_MII 98 #define CONFIG_CMD_NET 99 #define CONFIG_FEC_MXC 100 #define CONFIG_MII 101 #define IMX_FEC_BASE ENET_BASE_ADDR 102 #define CONFIG_FEC_XCV_TYPE RGMII 103 #define CONFIG_ETHPRIME "FEC" 104 #define CONFIG_FEC_MXC_PHYADDR 4 105 #define CONFIG_PHYLIB 106 #define CONFIG_PHY_ATHEROS 107 108 /* Framebuffer */ 109 #define CONFIG_VIDEO 110 #ifdef CONFIG_VIDEO 111 #define CONFIG_VIDEO_IPUV3 112 #define CONFIG_IPUV3_CLK 260000000 113 #define CONFIG_CFB_CONSOLE 114 #define CONFIG_CFB_CONSOLE_ANSI 115 #define CONFIG_VIDEO_SW_CURSOR 116 #define CONFIG_VGA_AS_SINGLE_DEVICE 117 #define CONFIG_VIDEO_BMP_RLE8 118 #define CONFIG_IMX_HDMI 119 #define CONFIG_IMX_VIDEO_SKIP 120 #define CONFIG_CMD_HDMIDETECT 121 #endif 122 123 /* PCI */ 124 #define CONFIG_CMD_PCI 125 #ifdef CONFIG_CMD_PCI 126 #define CONFIG_PCI 127 #define CONFIG_PCI_PNP 128 #define CONFIG_PCI_SCAN_SHOW 129 #define CONFIG_PCIE_IMX 130 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 131 #endif 132 133 /* SATA */ 134 #define CONFIG_CMD_SATA 135 #ifdef CONFIG_CMD_SATA 136 #define CONFIG_DWC_AHSATA 137 #define CONFIG_SYS_SATA_MAX_DEVICE 1 138 #define CONFIG_DWC_AHSATA_PORT_ID 0 139 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 140 #define CONFIG_LBA48 141 #define CONFIG_LIBATA 142 #endif 143 144 /* USB */ 145 #define CONFIG_CMD_USB 146 #ifdef CONFIG_CMD_USB 147 #define CONFIG_USB_EHCI 148 #define CONFIG_USB_EHCI_MX6 149 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 150 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 151 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 152 #define CONFIG_USB_STORAGE 153 #define CONFIG_CMD_USB_MASS_STORAGE 154 #ifdef CONFIG_CMD_USB_MASS_STORAGE 155 #define CONFIG_CI_UDC 156 #define CONFIG_USBD_HS 157 #define CONFIG_USB_GADGET 158 #define CONFIG_USB_GADGET_MASS_STORAGE 159 #define CONFIG_USB_GADGET_DUALSPEED 160 #define CONFIG_USB_GADGET_VBUS_DRAW 0 161 #define CONFIG_USBDOWNLOAD_GADGET 162 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 163 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 164 #define CONFIG_G_DNL_MANUFACTURER "TBS" 165 #endif /* CONFIG_CMD_USB_MASS_STORAGE */ 166 #define CONFIG_USB_KEYBOARD 167 #ifdef CONFIG_USB_KEYBOARD 168 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 169 #define CONFIG_SYS_STDIO_DEREGISTER 170 #define CONFIG_PREBOOT \ 171 "if hdmidet; then " \ 172 "usb start; " \ 173 "run set_con_usb_hdmi; " \ 174 "else " \ 175 "run set_con_serial; " \ 176 "fi;" 177 #endif /* CONFIG_USB_KEYBOARD */ 178 #endif /* CONFIG_CMD_USB */ 179 180 /* RTC */ 181 #define CONFIG_CMD_DATE 182 #ifdef CONFIG_CMD_DATE 183 #define CONFIG_CMD_I2C 184 #define CONFIG_RTC_DS1307 185 #define CONFIG_SYS_RTC_BUS_NUM 2 186 #endif 187 188 /* I2C */ 189 #define CONFIG_CMD_I2C 190 #ifdef CONFIG_CMD_I2C 191 #define CONFIG_SYS_I2C 192 #define CONFIG_SYS_I2C_MXC 193 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 194 #define CONFIG_SYS_I2C_SPEED 100000 195 #define CONFIG_I2C_EDID 196 #endif 197 198 /* Fuses */ 199 #define CONFIG_CMD_FUSE 200 #ifdef CONFIG_CMD_FUSE 201 #define CONFIG_MXC_OCOTP 202 #endif 203 204 #ifndef CONFIG_SYS_DCACHE_OFF 205 #define CONFIG_CMD_CACHE 206 #endif 207 208 /* Environment organization */ 209 #define CONFIG_ENV_IS_IN_MMC 210 #define CONFIG_SYS_MMC_ENV_DEV 2 211 #define CONFIG_SYS_MMC_ENV_PART 1 212 #define CONFIG_ENV_SIZE (8 * 1024) 213 #define CONFIG_ENV_OFFSET (384 * 1024) 214 #define CONFIG_ENV_OVERWRITE 215 216 #define CONFIG_EXTRA_ENV_SETTINGS \ 217 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ 218 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ 219 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \ 220 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \ 221 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \ 222 "${bootargs_mmc3}\0" \ 223 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \ 224 "rdinit=/sbin/init enable_wait_mode=off\0" \ 225 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \ 226 "mmc read 0x10800000 0x800 0x4000; bootm\0" \ 227 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \ 228 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \ 229 "run bootargs_upd; " \ 230 "bootm 0x10800000 0x10d00000\0" \ 231 "console=ttymxc0\0" \ 232 "fan=gpio set 92\0" \ 233 "set_con_serial=setenv stdin serial; " \ 234 "setenv stdout serial; " \ 235 "setenv stderr serial;\0" \ 236 "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \ 237 "setenv stdout serial,vga; " \ 238 "setenv stderr serial,vga;\0" 239 240 #define CONFIG_BOOTCOMMAND \ 241 "mmc rescan; " \ 242 "if run bootcmd_up1; then " \ 243 "run bootcmd_up2; " \ 244 "else " \ 245 "run bootcmd_mmc; " \ 246 "fi" 247 248 #endif /* __TBS2910_CONFIG_H * */ 249