xref: /rk3399_rockchip-uboot/include/configs/tbs2910.h (revision bd42a94268b165a6f298b9ab13be7003e8d96b02)
1 /*
2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3  *
4  * Configuration settings for the TBS2910 MatrixARM board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __TBS2910_CONFIG_H
10 #define __TBS2910_CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 /* General configuration */
15 #define CONFIG_SYS_THUMB_BUILD
16 
17 #define CONFIG_MACH_TYPE		3980
18 
19 #define CONFIG_SYS_HZ			1000
20 
21 #define CONFIG_IMX_THERMAL
22 
23 /* Physical Memory Map */
24 #define CONFIG_NR_DRAM_BANKS		1
25 #define CONFIG_SYS_SDRAM_BASE		MMDC0_ARB_BASE_ADDR
26 
27 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
28 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
29 #define CONFIG_SYS_INIT_SP_OFFSET \
30 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
31 #define CONFIG_SYS_INIT_SP_ADDR \
32 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
33 
34 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
35 
36 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
37 #define CONFIG_SYS_MEMTEST_END \
38 	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
39 
40 #define CONFIG_SYS_BOOTMAPSZ		0x10000000
41 
42 /* Serial console */
43 #define CONFIG_MXC_UART
44 #define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
45 #define CONFIG_BAUDRATE			115200
46 
47 #define CONFIG_CONS_INDEX		1
48 
49 /* *** Command definition *** */
50 #define CONFIG_CMD_BMODE
51 #define CONFIG_CMD_PART
52 
53 /* Filesystems / image support */
54 #define CONFIG_PARTITION_UUIDS
55 
56 /* MMC */
57 #define CONFIG_SYS_FSL_USDHC_NUM	3
58 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
59 #define CONFIG_SUPPORT_EMMC_BOOT
60 
61 /* Ethernet */
62 #define CONFIG_FEC_MXC
63 #define CONFIG_FEC_MXC
64 #define CONFIG_MII
65 #define IMX_FEC_BASE			ENET_BASE_ADDR
66 #define CONFIG_FEC_XCV_TYPE		RGMII
67 #define CONFIG_ETHPRIME			"FEC"
68 #define CONFIG_FEC_MXC_PHYADDR		4
69 #define CONFIG_PHYLIB
70 #define CONFIG_PHY_ATHEROS
71 
72 /* Framebuffer */
73 #ifdef CONFIG_VIDEO
74 #define CONFIG_VIDEO_IPUV3
75 #define CONFIG_IPUV3_CLK		260000000
76 #define CONFIG_VIDEO_BMP_RLE8
77 #define CONFIG_IMX_HDMI
78 #define CONFIG_IMX_VIDEO_SKIP
79 #define CONFIG_CMD_HDMIDETECT
80 #endif
81 
82 /* PCI */
83 #define CONFIG_CMD_PCI
84 #ifdef CONFIG_CMD_PCI
85 #define CONFIG_PCI_SCAN_SHOW
86 #define CONFIG_PCIE_IMX
87 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
88 #endif
89 
90 /* SATA */
91 #define CONFIG_CMD_SATA
92 #ifdef CONFIG_CMD_SATA
93 #define CONFIG_DWC_AHSATA
94 #define CONFIG_SYS_SATA_MAX_DEVICE	1
95 #define CONFIG_DWC_AHSATA_PORT_ID	0
96 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
97 #define CONFIG_LBA48
98 #define CONFIG_LIBATA
99 #endif
100 
101 /* USB */
102 #ifdef CONFIG_CMD_USB
103 #define CONFIG_USB_EHCI
104 #define CONFIG_USB_EHCI_MX6
105 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
106 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
107 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
108 #ifdef CONFIG_CMD_USB_MASS_STORAGE
109 #define CONFIG_USBD_HS
110 #define CONFIG_USB_FUNCTION_MASS_STORAGE
111 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
112 #ifdef CONFIG_USB_KEYBOARD
113 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
114 #define CONFIG_PREBOOT \
115 	"usb start; " \
116 	"if hdmidet; then " \
117 		"run set_con_hdmi; " \
118 	"else " \
119 		"run set_con_serial; " \
120 	"fi;"
121 #endif /* CONFIG_USB_KEYBOARD */
122 #endif /* CONFIG_CMD_USB      */
123 
124 /* RTC */
125 #define CONFIG_CMD_DATE
126 #ifdef CONFIG_CMD_DATE
127 #define CONFIG_RTC_DS1307
128 #define CONFIG_SYS_RTC_BUS_NUM		2
129 #endif
130 
131 /* I2C */
132 #ifdef CONFIG_CMD_I2C
133 #define CONFIG_SYS_I2C
134 #define CONFIG_SYS_I2C_MXC
135 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
136 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
137 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
138 #define CONFIG_SYS_I2C_SPEED		100000
139 #define CONFIG_I2C_EDID
140 #endif
141 
142 /* Environment organization */
143 #define CONFIG_ENV_IS_IN_MMC
144 #define CONFIG_SYS_MMC_ENV_DEV		2 /* overwritten on SD boot */
145 #define CONFIG_SYS_MMC_ENV_PART		1 /* overwritten on SD boot */
146 #define CONFIG_ENV_SIZE			(8 * 1024)
147 #define CONFIG_ENV_OFFSET		(384 * 1024)
148 #define CONFIG_ENV_OVERWRITE
149 
150 #define CONFIG_EXTRA_ENV_SETTINGS \
151 	"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
152 	"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
153 			"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
154 	"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
155 	"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
156 			"${bootargs_mmc3}\0" \
157 	"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
158 			"rdinit=/sbin/init enable_wait_mode=off\0" \
159 	"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
160 			"mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
161 	"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
162 	"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
163 			"run bootargs_upd; " \
164 			"bootm 0x10800000 0x10d00000\0" \
165 	"console=ttymxc0\0" \
166 	"fan=gpio set 92\0" \
167 	"set_con_serial=setenv stdout serial; " \
168 			"setenv stderr serial;\0" \
169 	"set_con_hdmi=setenv stdout serial,vga; " \
170 			"setenv stderr serial,vga;\0" \
171 	"stderr=serial,vga;\0" \
172 	"stdin=serial,usbkbd;\0" \
173 	"stdout=serial,vga;\0"
174 
175 #define CONFIG_BOOTCOMMAND \
176 	"mmc rescan; " \
177 	"if run bootcmd_up1; then " \
178 		"run bootcmd_up2; " \
179 	"else " \
180 		"run bootcmd_mmc; " \
181 	"fi"
182 
183 #endif			       /* __TBS2910_CONFIG_H * */
184