xref: /rk3399_rockchip-uboot/include/configs/tbs2910.h (revision a380ce6e9698257c4e8be4c0711b09c90a8febff)
1 /*
2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3  *
4  * Configuration settings for the TBS2910 MatrixARM board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __TBS2910_CONFIG_H
10 #define __TBS2910_CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 /* General configuration */
15 #define CONFIG_SYS_THUMB_BUILD
16 
17 #define CONFIG_MACH_TYPE		3980
18 
19 #define CONFIG_BOARD_EARLY_INIT_F
20 
21 #define CONFIG_SYS_PROMPT		"Matrix U-Boot> "
22 #define CONFIG_SYS_HZ			1000
23 
24 /* Physical Memory Map */
25 #define CONFIG_NR_DRAM_BANKS		1
26 #define CONFIG_SYS_SDRAM_BASE		MMDC0_ARB_BASE_ADDR
27 
28 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
29 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
30 #define CONFIG_SYS_INIT_SP_OFFSET \
31 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
32 #define CONFIG_SYS_INIT_SP_ADDR \
33 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
34 
35 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
36 
37 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
38 #define CONFIG_SYS_MEMTEST_END \
39 	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
40 
41 #define CONFIG_SYS_BOOTMAPSZ		0x6C000000
42 
43 /* Serial console */
44 #define CONFIG_MXC_UART
45 #define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
46 #define CONFIG_BAUDRATE			115200
47 
48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
49 #define CONFIG_CONSOLE_MUX
50 #define CONFIG_CONS_INDEX		1
51 
52 /* *** Command definition *** */
53 #define CONFIG_CMD_BMODE
54 #define CONFIG_CMD_SETEXPR
55 #define CONFIG_CMD_MEMTEST
56 #define CONFIG_CMD_TIME
57 
58 /* Filesystems / image support */
59 #define CONFIG_EFI_PARTITION
60 #define CONFIG_FIT
61 
62 /* MMC */
63 #define CONFIG_FSL_ESDHC
64 #define CONFIG_FSL_USDHC
65 #define CONFIG_SYS_FSL_USDHC_NUM	3
66 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
67 
68 #define CONFIG_MMC
69 #define CONFIG_CMD_MMC
70 #define CONFIG_GENERIC_MMC
71 #define CONFIG_SUPPORT_EMMC_BOOT
72 #define CONFIG_BOUNCE_BUFFER
73 
74 /* Ethernet */
75 #define CONFIG_FEC_MXC
76 #define CONFIG_CMD_PING
77 #define CONFIG_CMD_DHCP
78 #define CONFIG_CMD_MII
79 #define CONFIG_CMD_NET
80 #define CONFIG_FEC_MXC
81 #define CONFIG_MII
82 #define IMX_FEC_BASE			ENET_BASE_ADDR
83 #define CONFIG_FEC_XCV_TYPE		RGMII
84 #define CONFIG_ETHPRIME			"FEC"
85 #define CONFIG_FEC_MXC_PHYADDR		4
86 #define CONFIG_PHYLIB
87 #define CONFIG_PHY_ATHEROS
88 
89 /* Framebuffer */
90 #define CONFIG_VIDEO
91 #ifdef CONFIG_VIDEO
92 #define CONFIG_VIDEO_IPUV3
93 #define CONFIG_IPUV3_CLK		260000000
94 #define CONFIG_CFB_CONSOLE
95 #define CONFIG_CFB_CONSOLE_ANSI
96 #define CONFIG_VIDEO_SW_CURSOR
97 #define CONFIG_VGA_AS_SINGLE_DEVICE
98 #define CONFIG_VIDEO_BMP_RLE8
99 #define CONFIG_IMX_HDMI
100 #define CONFIG_IMX_VIDEO_SKIP
101 #define CONFIG_CMD_HDMIDETECT
102 #endif
103 
104 /* PCI */
105 #define CONFIG_CMD_PCI
106 #ifdef CONFIG_CMD_PCI
107 #define CONFIG_PCI
108 #define CONFIG_PCI_PNP
109 #define CONFIG_PCI_SCAN_SHOW
110 #define CONFIG_PCIE_IMX
111 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
112 #endif
113 
114 /* SATA */
115 #define CONFIG_CMD_SATA
116 #ifdef CONFIG_CMD_SATA
117 #define CONFIG_DWC_AHSATA
118 #define CONFIG_SYS_SATA_MAX_DEVICE	1
119 #define CONFIG_DWC_AHSATA_PORT_ID	0
120 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
121 #define CONFIG_LBA48
122 #define CONFIG_LIBATA
123 #endif
124 
125 /* USB */
126 #define CONFIG_CMD_USB
127 #ifdef CONFIG_CMD_USB
128 #define CONFIG_USB_EHCI
129 #define CONFIG_USB_EHCI_MX6
130 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
131 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
132 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
133 #define CONFIG_USB_STORAGE
134 #define CONFIG_CMD_USB_MASS_STORAGE
135 #ifdef CONFIG_CMD_USB_MASS_STORAGE
136 #define CONFIG_CI_UDC
137 #define CONFIG_USBD_HS
138 #define CONFIG_USB_GADGET
139 #define CONFIG_USB_GADGET_MASS_STORAGE
140 #define CONFIG_USB_GADGET_DUALSPEED
141 #define CONFIG_USB_GADGET_VBUS_DRAW	0
142 #define CONFIG_USBDOWNLOAD_GADGET
143 #define CONFIG_G_DNL_VENDOR_NUM		0x0525
144 #define CONFIG_G_DNL_PRODUCT_NUM	0xa4a5
145 #define CONFIG_G_DNL_MANUFACTURER	"TBS"
146 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
147 #define CONFIG_USB_KEYBOARD
148 #ifdef CONFIG_USB_KEYBOARD
149 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
150 #define CONFIG_SYS_STDIO_DEREGISTER
151 #define CONFIG_PREBOOT \
152 	"if hdmidet; then " \
153 		"usb start; " \
154 		"run set_con_usb_hdmi; " \
155 	"else " \
156 		"run set_con_serial; " \
157 	"fi;"
158 #endif /* CONFIG_USB_KEYBOARD */
159 #endif /* CONFIG_CMD_USB      */
160 
161 /* RTC */
162 #define CONFIG_CMD_DATE
163 #ifdef CONFIG_CMD_DATE
164 #define CONFIG_CMD_I2C
165 #define CONFIG_RTC_DS1307
166 #define CONFIG_SYS_RTC_BUS_NUM		2
167 #endif
168 
169 /* I2C */
170 #define CONFIG_CMD_I2C
171 #ifdef CONFIG_CMD_I2C
172 #define CONFIG_SYS_I2C
173 #define CONFIG_SYS_I2C_MXC
174 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
175 #define CONFIG_SYS_I2C_SPEED		100000
176 #define CONFIG_I2C_EDID
177 #endif
178 
179 /* Fuses */
180 #define CONFIG_CMD_FUSE
181 #ifdef CONFIG_CMD_FUSE
182 #define CONFIG_MXC_OCOTP
183 #endif
184 
185 #ifndef CONFIG_SYS_DCACHE_OFF
186 #define CONFIG_CMD_CACHE
187 #endif
188 
189 /* Environment organization */
190 #define CONFIG_ENV_IS_IN_MMC
191 #define CONFIG_SYS_MMC_ENV_DEV		2
192 #define CONFIG_SYS_MMC_ENV_PART		1
193 #define CONFIG_ENV_SIZE			(8 * 1024)
194 #define CONFIG_ENV_OFFSET		(384 * 1024)
195 #define CONFIG_ENV_OVERWRITE
196 
197 #define CONFIG_EXTRA_ENV_SETTINGS \
198 	"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
199 	"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
200 			"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
201 	"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
202 	"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
203 			"${bootargs_mmc3}\0" \
204 	"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
205 			"rdinit=/sbin/init enable_wait_mode=off\0" \
206 	"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
207 			"mmc read 0x10800000 0x800 0x4000; bootm\0" \
208 	"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
209 	"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
210 			"run bootargs_upd; " \
211 			"bootm 0x10800000 0x10d00000\0" \
212 	"console=ttymxc0\0" \
213 	"fan=gpio set 92\0" \
214 	"set_con_serial=setenv stdin serial; " \
215 			"setenv stdout serial; " \
216 			"setenv stderr serial;\0" \
217 	"set_con_usb_hdmi=setenv stdin serial,usbkbd; " \
218 			"setenv stdout serial,vga; " \
219 			"setenv stderr serial,vga;\0"
220 
221 #define CONFIG_BOOTCOMMAND \
222 	"mmc rescan; " \
223 	"if run bootcmd_up1; then " \
224 		"run bootcmd_up2; " \
225 	"else " \
226 		"run bootcmd_mmc; " \
227 	"fi"
228 
229 #endif			       /* __TBS2910_CONFIG_H * */
230