xref: /rk3399_rockchip-uboot/include/configs/tbs2910.h (revision 8183058188cd2d9424503b68de8606c5900ba74b)
1 /*
2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3  *
4  * Configuration settings for the TBS2910 MatrixARM board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __TBS2910_CONFIG_H
10 #define __TBS2910_CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 /* General configuration */
15 #define CONFIG_SYS_THUMB_BUILD
16 
17 #define CONFIG_MACH_TYPE		3980
18 
19 #define CONFIG_BOARD_EARLY_INIT_F
20 
21 #define CONFIG_SYS_LONGHELP
22 #define CONFIG_SYS_HUSH_PARSER
23 #define CONFIG_SYS_PROMPT		"Matrix U-Boot> "
24 #define CONFIG_AUTO_COMPLETE
25 #define CONFIG_CMDLINE_EDITING
26 #define CONFIG_SYS_MAXARGS		16
27 #define CONFIG_SYS_CBSIZE		1024
28 #define CONFIG_SYS_HZ			1000
29 
30 /* Physical Memory Map */
31 #define CONFIG_NR_DRAM_BANKS		1
32 #define CONFIG_SYS_SDRAM_BASE		MMDC0_ARB_BASE_ADDR
33 
34 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
35 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
36 #define CONFIG_SYS_INIT_SP_OFFSET \
37 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
38 #define CONFIG_SYS_INIT_SP_ADDR \
39 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
40 
41 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
42 
43 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
44 #define CONFIG_SYS_MEMTEST_END \
45 	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
46 
47 #define CONFIG_SYS_BOOTMAPSZ		0x6C000000
48 
49 /* Serial console */
50 #define CONFIG_MXC_UART
51 #define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
52 #define CONFIG_BAUDRATE			115200
53 
54 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
55 #define CONFIG_CONSOLE_MUX
56 #define CONFIG_CONS_INDEX		1
57 
58 /* *** Command definition *** */
59 #define CONFIG_CMD_BMODE
60 #define CONFIG_CMD_SETEXPR
61 #define CONFIG_CMD_MEMTEST
62 #define CONFIG_CMD_TIME
63 
64 /* Filesystems / image support */
65 #define CONFIG_CMD_EXT4
66 #define CONFIG_CMD_FAT
67 #define CONFIG_DOS_PARTITION
68 #define CONFIG_EFI_PARTITION
69 #define CONFIG_CMD_FS_GENERIC
70 
71 #define CONFIG_OF_LIBFDT
72 #define CONFIG_CMD_BOOTZ
73 #define CONFIG_SUPPORT_RAW_INITRD
74 #define CONFIG_FIT
75 
76 /* MMC */
77 #define CONFIG_FSL_ESDHC
78 #define CONFIG_FSL_USDHC
79 #define CONFIG_SYS_FSL_USDHC_NUM	3
80 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
81 
82 #define CONFIG_MMC
83 #define CONFIG_CMD_MMC
84 #define CONFIG_GENERIC_MMC
85 #define CONFIG_SUPPORT_EMMC_BOOT
86 #define CONFIG_BOUNCE_BUFFER
87 
88 /* Ethernet */
89 #define CONFIG_FEC_MXC
90 #define CONFIG_CMD_PING
91 #define CONFIG_CMD_DHCP
92 #define CONFIG_CMD_MII
93 #define CONFIG_CMD_NET
94 #define CONFIG_FEC_MXC
95 #define CONFIG_MII
96 #define IMX_FEC_BASE			ENET_BASE_ADDR
97 #define CONFIG_FEC_XCV_TYPE		RGMII
98 #define CONFIG_ETHPRIME			"FEC"
99 #define CONFIG_FEC_MXC_PHYADDR		4
100 #define CONFIG_PHYLIB
101 #define CONFIG_PHY_ATHEROS
102 
103 /* Framebuffer */
104 #define CONFIG_VIDEO
105 #ifdef CONFIG_VIDEO
106 #define CONFIG_VIDEO_IPUV3
107 #define CONFIG_IPUV3_CLK		260000000
108 #define CONFIG_CFB_CONSOLE
109 #define CONFIG_CFB_CONSOLE_ANSI
110 #define CONFIG_VIDEO_SW_CURSOR
111 #define CONFIG_VGA_AS_SINGLE_DEVICE
112 #define CONFIG_VIDEO_BMP_RLE8
113 #define CONFIG_IMX_HDMI
114 #define CONFIG_IMX_VIDEO_SKIP
115 #define CONFIG_CMD_HDMIDETECT
116 #endif
117 
118 /* PCI */
119 #define CONFIG_CMD_PCI
120 #ifdef CONFIG_CMD_PCI
121 #define CONFIG_PCI
122 #define CONFIG_PCI_PNP
123 #define CONFIG_PCI_SCAN_SHOW
124 #define CONFIG_PCIE_IMX
125 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
126 #endif
127 
128 /* SATA */
129 #define CONFIG_CMD_SATA
130 #ifdef CONFIG_CMD_SATA
131 #define CONFIG_DWC_AHSATA
132 #define CONFIG_SYS_SATA_MAX_DEVICE	1
133 #define CONFIG_DWC_AHSATA_PORT_ID	0
134 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
135 #define CONFIG_LBA48
136 #define CONFIG_LIBATA
137 #endif
138 
139 /* USB */
140 #define CONFIG_CMD_USB
141 #ifdef CONFIG_CMD_USB
142 #define CONFIG_USB_EHCI
143 #define CONFIG_USB_EHCI_MX6
144 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
145 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
146 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
147 #define CONFIG_USB_STORAGE
148 #define CONFIG_CMD_USB_MASS_STORAGE
149 #ifdef CONFIG_CMD_USB_MASS_STORAGE
150 #define CONFIG_CI_UDC
151 #define CONFIG_USBD_HS
152 #define CONFIG_USB_GADGET
153 #define CONFIG_USB_GADGET_MASS_STORAGE
154 #define CONFIG_USB_GADGET_DUALSPEED
155 #define CONFIG_USB_GADGET_VBUS_DRAW	0
156 #define CONFIG_USBDOWNLOAD_GADGET
157 #define CONFIG_G_DNL_VENDOR_NUM		0x0525
158 #define CONFIG_G_DNL_PRODUCT_NUM	0xa4a5
159 #define CONFIG_G_DNL_MANUFACTURER	"TBS"
160 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
161 #define CONFIG_USB_KEYBOARD
162 #ifdef CONFIG_USB_KEYBOARD
163 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
164 #define CONFIG_SYS_STDIO_DEREGISTER
165 #define CONFIG_PREBOOT \
166 	"if hdmidet; then " \
167 		"usb start; " \
168 		"run set_con_usb_hdmi; " \
169 	"else " \
170 		"run set_con_serial; " \
171 	"fi;"
172 #endif /* CONFIG_USB_KEYBOARD */
173 #endif /* CONFIG_CMD_USB      */
174 
175 /* RTC */
176 #define CONFIG_CMD_DATE
177 #ifdef CONFIG_CMD_DATE
178 #define CONFIG_CMD_I2C
179 #define CONFIG_RTC_DS1307
180 #define CONFIG_SYS_RTC_BUS_NUM		2
181 #endif
182 
183 /* I2C */
184 #define CONFIG_CMD_I2C
185 #ifdef CONFIG_CMD_I2C
186 #define CONFIG_SYS_I2C
187 #define CONFIG_SYS_I2C_MXC
188 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
189 #define CONFIG_SYS_I2C_SPEED		100000
190 #define CONFIG_I2C_EDID
191 #endif
192 
193 /* Fuses */
194 #define CONFIG_CMD_FUSE
195 #ifdef CONFIG_CMD_FUSE
196 #define CONFIG_MXC_OCOTP
197 #endif
198 
199 #ifndef CONFIG_SYS_DCACHE_OFF
200 #define CONFIG_CMD_CACHE
201 #endif
202 
203 /* Environment organization */
204 #define CONFIG_ENV_IS_IN_MMC
205 #define CONFIG_SYS_MMC_ENV_DEV		2
206 #define CONFIG_SYS_MMC_ENV_PART		1
207 #define CONFIG_ENV_SIZE			(8 * 1024)
208 #define CONFIG_ENV_OFFSET		(384 * 1024)
209 #define CONFIG_ENV_OVERWRITE
210 
211 #define CONFIG_EXTRA_ENV_SETTINGS \
212 	"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
213 	"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
214 			"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
215 	"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
216 	"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
217 			"${bootargs_mmc3}\0" \
218 	"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
219 			"rdinit=/sbin/init enable_wait_mode=off\0" \
220 	"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
221 			"mmc read 0x10800000 0x800 0x4000; bootm\0" \
222 	"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
223 	"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
224 			"run bootargs_upd; " \
225 			"bootm 0x10800000 0x10d00000\0" \
226 	"console=ttymxc0\0" \
227 	"fan=gpio set 92\0" \
228 	"set_con_serial=setenv stdin serial; " \
229 			"setenv stdout serial; " \
230 			"setenv stderr serial;\0" \
231 	"set_con_usb_hdmi=setenv stdin serial,usbkbd; " \
232 			"setenv stdout serial,vga; " \
233 			"setenv stderr serial,vga;\0"
234 
235 #define CONFIG_BOOTCOMMAND \
236 	"mmc rescan; " \
237 	"if run bootcmd_up1; then " \
238 		"run bootcmd_up2; " \
239 	"else " \
240 		"run bootcmd_mmc; " \
241 	"fi"
242 
243 #endif			       /* __TBS2910_CONFIG_H * */
244