xref: /rk3399_rockchip-uboot/include/configs/tbs2910.h (revision 7453cb595cc17898a8227777b410b3e34a689c37)
1 /*
2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3  *
4  * Configuration settings for the TBS2910 MatrixARM board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __TBS2910_CONFIG_H
10 #define __TBS2910_CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 /* General configuration */
15 #define CONFIG_SYS_THUMB_BUILD
16 
17 #define CONFIG_MACH_TYPE		3980
18 
19 #define CONFIG_BOARD_EARLY_INIT_F
20 
21 #define CONFIG_SYS_PROMPT		"Matrix U-Boot> "
22 #define CONFIG_SYS_HZ			1000
23 
24 /* Physical Memory Map */
25 #define CONFIG_NR_DRAM_BANKS		1
26 #define CONFIG_SYS_SDRAM_BASE		MMDC0_ARB_BASE_ADDR
27 
28 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
29 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
30 #define CONFIG_SYS_INIT_SP_OFFSET \
31 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
32 #define CONFIG_SYS_INIT_SP_ADDR \
33 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
34 
35 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
36 
37 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
38 #define CONFIG_SYS_MEMTEST_END \
39 	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
40 
41 #define CONFIG_SYS_BOOTMAPSZ		0x6C000000
42 
43 /* Serial console */
44 #define CONFIG_MXC_UART
45 #define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
46 #define CONFIG_BAUDRATE			115200
47 
48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
49 #define CONFIG_CONSOLE_MUX
50 #define CONFIG_CONS_INDEX		1
51 
52 /* *** Command definition *** */
53 #define CONFIG_CMD_BMODE
54 #define CONFIG_CMD_MEMTEST
55 #define CONFIG_CMD_TIME
56 
57 /* Filesystems / image support */
58 #define CONFIG_EFI_PARTITION
59 #define CONFIG_FIT
60 
61 /* MMC */
62 #define CONFIG_SYS_FSL_USDHC_NUM	3
63 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
64 #define CONFIG_SUPPORT_EMMC_BOOT
65 
66 /* Ethernet */
67 #define CONFIG_FEC_MXC
68 #define CONFIG_CMD_PING
69 #define CONFIG_CMD_DHCP
70 #define CONFIG_CMD_MII
71 #define CONFIG_CMD_NET
72 #define CONFIG_FEC_MXC
73 #define CONFIG_MII
74 #define IMX_FEC_BASE			ENET_BASE_ADDR
75 #define CONFIG_FEC_XCV_TYPE		RGMII
76 #define CONFIG_ETHPRIME			"FEC"
77 #define CONFIG_FEC_MXC_PHYADDR		4
78 #define CONFIG_PHYLIB
79 #define CONFIG_PHY_ATHEROS
80 
81 /* Framebuffer */
82 #define CONFIG_VIDEO
83 #ifdef CONFIG_VIDEO
84 #define CONFIG_VIDEO_IPUV3
85 #define CONFIG_IPUV3_CLK		260000000
86 #define CONFIG_CFB_CONSOLE
87 #define CONFIG_CFB_CONSOLE_ANSI
88 #define CONFIG_VIDEO_SW_CURSOR
89 #define CONFIG_VGA_AS_SINGLE_DEVICE
90 #define CONFIG_VIDEO_BMP_RLE8
91 #define CONFIG_IMX_HDMI
92 #define CONFIG_IMX_VIDEO_SKIP
93 #define CONFIG_CMD_HDMIDETECT
94 #endif
95 
96 /* PCI */
97 #define CONFIG_CMD_PCI
98 #ifdef CONFIG_CMD_PCI
99 #define CONFIG_PCI
100 #define CONFIG_PCI_PNP
101 #define CONFIG_PCI_SCAN_SHOW
102 #define CONFIG_PCIE_IMX
103 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
104 #endif
105 
106 /* SATA */
107 #define CONFIG_CMD_SATA
108 #ifdef CONFIG_CMD_SATA
109 #define CONFIG_DWC_AHSATA
110 #define CONFIG_SYS_SATA_MAX_DEVICE	1
111 #define CONFIG_DWC_AHSATA_PORT_ID	0
112 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
113 #define CONFIG_LBA48
114 #define CONFIG_LIBATA
115 #endif
116 
117 /* USB */
118 #define CONFIG_CMD_USB
119 #ifdef CONFIG_CMD_USB
120 #define CONFIG_USB_EHCI
121 #define CONFIG_USB_EHCI_MX6
122 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
123 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
124 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
125 #define CONFIG_USB_STORAGE
126 #define CONFIG_CMD_USB_MASS_STORAGE
127 #ifdef CONFIG_CMD_USB_MASS_STORAGE
128 #define CONFIG_CI_UDC
129 #define CONFIG_USBD_HS
130 #define CONFIG_USB_GADGET
131 #define CONFIG_USB_GADGET_MASS_STORAGE
132 #define CONFIG_USB_GADGET_DUALSPEED
133 #define CONFIG_USB_GADGET_VBUS_DRAW	0
134 #define CONFIG_USBDOWNLOAD_GADGET
135 #define CONFIG_G_DNL_VENDOR_NUM		0x0525
136 #define CONFIG_G_DNL_PRODUCT_NUM	0xa4a5
137 #define CONFIG_G_DNL_MANUFACTURER	"TBS"
138 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
139 #define CONFIG_USB_KEYBOARD
140 #ifdef CONFIG_USB_KEYBOARD
141 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
142 #define CONFIG_SYS_STDIO_DEREGISTER
143 #define CONFIG_PREBOOT \
144 	"if hdmidet; then " \
145 		"usb start; " \
146 		"run set_con_usb_hdmi; " \
147 	"else " \
148 		"run set_con_serial; " \
149 	"fi;"
150 #endif /* CONFIG_USB_KEYBOARD */
151 #endif /* CONFIG_CMD_USB      */
152 
153 /* RTC */
154 #define CONFIG_CMD_DATE
155 #ifdef CONFIG_CMD_DATE
156 #define CONFIG_CMD_I2C
157 #define CONFIG_RTC_DS1307
158 #define CONFIG_SYS_RTC_BUS_NUM		2
159 #endif
160 
161 /* I2C */
162 #define CONFIG_CMD_I2C
163 #ifdef CONFIG_CMD_I2C
164 #define CONFIG_SYS_I2C
165 #define CONFIG_SYS_I2C_MXC
166 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
167 #define CONFIG_SYS_I2C_SPEED		100000
168 #define CONFIG_I2C_EDID
169 #endif
170 
171 /* Fuses */
172 #define CONFIG_CMD_FUSE
173 #ifdef CONFIG_CMD_FUSE
174 #define CONFIG_MXC_OCOTP
175 #endif
176 
177 /* Environment organization */
178 #define CONFIG_ENV_IS_IN_MMC
179 #define CONFIG_SYS_MMC_ENV_DEV		2
180 #define CONFIG_SYS_MMC_ENV_PART		1
181 #define CONFIG_ENV_SIZE			(8 * 1024)
182 #define CONFIG_ENV_OFFSET		(384 * 1024)
183 #define CONFIG_ENV_OVERWRITE
184 
185 #define CONFIG_EXTRA_ENV_SETTINGS \
186 	"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
187 	"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
188 			"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
189 	"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
190 	"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
191 			"${bootargs_mmc3}\0" \
192 	"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
193 			"rdinit=/sbin/init enable_wait_mode=off\0" \
194 	"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
195 			"mmc read 0x10800000 0x800 0x4000; bootm\0" \
196 	"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
197 	"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
198 			"run bootargs_upd; " \
199 			"bootm 0x10800000 0x10d00000\0" \
200 	"console=ttymxc0\0" \
201 	"fan=gpio set 92\0" \
202 	"set_con_serial=setenv stdin serial; " \
203 			"setenv stdout serial; " \
204 			"setenv stderr serial;\0" \
205 	"set_con_usb_hdmi=setenv stdin serial,usbkbd; " \
206 			"setenv stdout serial,vga; " \
207 			"setenv stderr serial,vga;\0"
208 
209 #define CONFIG_BOOTCOMMAND \
210 	"mmc rescan; " \
211 	"if run bootcmd_up1; then " \
212 		"run bootcmd_up2; " \
213 	"else " \
214 		"run bootcmd_mmc; " \
215 	"fi"
216 
217 #endif			       /* __TBS2910_CONFIG_H * */
218